There are three different ways to represent signed integer (article). a: Signed bit, b: 1’s Complement, and c: 2’s Complement. Let’s try to understand how these methods have derived and why 2’s complement is preferred over others.
As we know that data are stored in bits. How can we store signed integer in the memory? To solve this problem, first we will develop a naïve solution and then will iterate it till we have the best solution for our problem.
a) Signed bit
When trying to store a signed integer, it seems obvious to reserve the left most bit for sign and use remaining bits to actually store the values. For example: in 4-bit system, first bit from left will be reserved for sign (0 represent positive whereas 1 represent negative) and other 3 bits will be used to store the values. Similarly in 8-bit system, first bit from left will be used for sign and remaining 7 will be used for values.
Sr. No.
| Binary Representation
| Decimal Value
|
A
| 0000
| +0
|
B
| 0001
| +1
|
C
| 0010
| +2
|
D
| 0011
| +3
|
E
| 0100
| +4
|
F
| 0101
| +5
|
G
| 0110
| +6
|
H
| 0111
| +7
|
I
| 1000
| -0
|
J
| 1001
| -1
|
K
| 1010
| -2
|
L
| 1011
| -3
|
M
| 1100
| -4
|
N
| 1101
| -5
|
O
| 1110
| -6
|
P
| 1111
| -7
|
By using this approach, we are successfully able to represent signed integer. But when we analysis it more closely, we could observe following drawbacks:
1) Two representations of zero:
In 4-bit system, we should be able to store 16 (24) values, but +1 to +7 and -1 to -7 are only 14 values. Where are remaining two values? When we observe the table carefully, we will find out that those two values converge to 0. Thus, we have two representations of zero, that means, one representation for +0 and another for -0.
But are two representations of 0 a big concern? So what? Instead of 16 unique values, we are only able to store 15 values. We can afford to reduce the range by 1, isn’t it? To the software developer, it might not concern but for a circuit designer it might be very frustrating to first check if value is +0 and then to check if it -0.
2) Signed extension doesn’t work for negative numbers:
Size of the data is increasing rapidly. Some time we need to extend the bit system so that we can increase the range of data that can be stored. In 2014, Gangnam Style video overflowed YouTube view limit and it forced YouTube to upgrade view count from 32-bits to 64-bits signed integer. Similarly, 32-bit Unix clock will overflow on 19 Jan 2038 because it records time in seconds in a 32-bit signed integer.
So, it is equally important that our representation system should be extendable easily which is not possible with this representation system.
Decimal
| 4-bit
| 5-bit
| 6-bit
|
+2
| 0010
| 00010
| 000010
|
+7
| 0111
| 00111
| 000111
|
-2
| 1010
| 10010 (! = 11010)
| 100010 (! = 111010)
|
-7
| 1111
| 10111 (! = 11111)
| 100111 (! = 111111)
|
3) Binary addition doesn’t work:
Let's try to add two binary numbers:
| Binary
| Decimal
|
| Binary
| Decimal
|
| Binary
| Decimal
|
Number-1
| 0010
| +2
|
| 0111
| +7
|
| 1101
| -5
|
Number-2
| 1010
| -2
|
| 1010
| -2
|
| 0011
| +3
|
Binary addition
| 1100
| -4
|
| 0001
| +1
|
| 0000
| +0
|
Decimal addition
|
| +0
|
|
| +5
|
|
| -2
|
Why is a simple binary addition not working here? The reason is that the sign bit (left most) is not an ordinary bit and not part of actual number. Imagine the situation where one has to design the hardware circuitry to ignore the sign bit to perform addition and then append the sign bit.
So, this was a naïve way to represent signed integer. The main problem with this approach is that we have mapped negative numbers down up. If we change our mapping system to top down them some of above issue will be resolved.
b) 1’s Complement
If we remap our negative numbers from top-down, then we will be getting following binary table:
S. No.
| Binary Representation
| Decimal Value
|
1's complement
| Signed bit
|
A
| 0000
| +0
| +0
|
B
| 0001
| +1
| +1
|
C
| 0010
| +2
| +2
|
D
| 0011
| +3
| +3
|
E
| 0100
| +4
| +4
|
F
| 0101
| +5
| +5
|
G
| 0110
| +6
| +6
|
H
| 0111
| +7
| +7
|
I
| 1000
| -7
| -0
|
J
| 1001
| -6
| -1
|
K
| 1010
| -5
| -2
|
L
| 1011
| -4
| -3
|
M
| 1100
| -3
| -4
|
N
| 1101
| -2
| -5
|
O
| 1110
| -1
| -6
|
P
| 1111
| -0
| -7
|
How to get binary representation of an integer in 1’s complement method?
- Positive numbers are represented similar to signed integer method
- Negative numbers are represented by inverting every bit of corresponding positive number (inverting can easily be done by using NOT gate during hardware design)
Let's analyze this closely to see if we have achieved some improvement.
1) Two representations of zero:
In this approach also we have two representations of zero.
2) Signed extension doesn’t work for negative numbers:
Signed extension works perfectly for negative numbers.
Decimal
| 4-bit
| 5-bit
| 6-bit
|
+2
| 0010
| 00010
| 000010
|
+7
| 0111
| 00111
| 000111
|
-2
| 1101
| 11101
| 111101
|
-7
| 1000
| 11000
| 111000
|
3) Binary addition works with modified rules:
| Binary
| Decimal
|
| Binary
| Decimal
|
| Binary
| Decimal
|
Number-1
| 0010
| +2
|
| 0111
| +7
|
| 1010
| -5
|
Number-2
| 1101
| -2
|
| 1101
| -2
|
| 0011
| +3
|
Binary addition
| 1111
| -0
|
| 0100
| +4
|
| 1101
| -2
|
Decimal addition
|
| +0
|
|
| +5
|
|
| -2
|
The answer is not always correct, but it is very close to the right answer. We can make it work if we follow the rule that if you have generated carry forward on your left most bit, then don't throw it away instead bring it back and add it to the right most bit.
| Binary
| Decimal
|
| Binary
| Decimal
|
| Binary
| Decimal
|
Number-1
| 0111
| +7
|
| 1110
| -1
|
| 0111
| +7
|
Number-2
| 1101
| -2
|
| 1001
| -6
|
| 1011
| -4
|
Binary addition
| (1) 0100
| +4
|
| (1) 0111
| +7
|
| (1) 0010
| +2
|
Adding carry forward back
| 0101
| +5
|
| 1000
| -7
|
| 0011
| +3
|
Definitely 1's complement method is better than signed bit. Our major concerns are resolved but remain issue (having two representations of zero) and our hack in binary addition give clues to improve 1's complement method. Let's rephrase those sentences to make it easier.
- We have an extra representation of zero which is unnecessary
- While addition two binary numbers, if we have a carry forward in left most bit, then we have to add +1 to the result i.e., the right answer can be found by traversing down to next row in the binary table.
Both of them direct us that an extra representation of zero is the root cause of issue. So, let's remove this extra zero and shift all negative values to the next row (-7 will move from I -> J, -6 will move from J -> K and so on...)
c) 2’s Complement
When we remove -0 from the 1's complement table and shift all negative values one row below, then we will get following table which is called 2's complement:
S. No.
| Binary Representation
| Decimal Value
|
2's complement
| 1's complement
| Signed bit
|
A
| 0000
| +0
| | +0
| +0
|
B
| 0001
| +1
| | +1
| +1
|
C
| 0010
| +2
| | +2
| +2
|
D
| 0011
| +3
| | +3
| +3
|
E
| 0100
| +4
| | +4
| +4
|
F
| 0101
| +5
| | +5
| +5
|
G
| 0110
| +6
| | +6
| +6
|
H
| 0111
| +7
| | +7
| +7
|
I
| 1000
| -8
| | -7
| -0
|
J
| 1001
| -7
| = inverse of 7 + 1-bit
| -6
| -1
|
K
| 1010
| -6
| = inverse of 6 + 1-bit
| -5
| -2
|
L
| 1011
| -5
| = inverse of 5 + 1-bit
| -4
| -3
|
M
| 1100
| -4
| = inverse of 4 + 1-bit
| -3
| -4
|
N
| 1101
| -3
| = inverse of 3 + 1-bit
| -2
| -5
|
O
| 1110
| -2
| = inverse of 2 + 1-bit
| -1
| -6
|
P
| 1111
| -1
| = inverse of 1 + 1-bit
| -0
| -7
|
How to get binary representation of an integer in 2’s complement method?
- Positive numbers are represented similar to signed integer method
- Negative numbers are represented by inverting every bit of corresponding positive number then adding 1 bit to it
1) One representation of zero:
Now we have only one representation of zero and it allows us to store total 16 unique values (+0 to +7 and -1 to -8).
2) Signed extension works for negative numbers:
Signed extension works perfectly for negative numbers.
Decimal
| 4-bit
| 5-bit
| 6-bit
|
+2
| 0010
| 00010
| 000010
|
+7
| 0111
| 00111
| 000111
|
-2
| 1110
| 11110
| 111110
|
-7
| 1001
| 11001
| 111001
|
3) Binary addition:
| Binary
| Decimal
|
| Binary
| Decimal
|
| Binary
| Decimal
|
| Binary
| Decimal
|
Number-1
| 0010
| +2
|
| 0111
| +7
|
| 1011
| -5
|
| 1111
| -1
|
Number-2
| 1110
| -2
|
| 1110
| -2
|
| 0011
| +3
|
| 1010
| -6
|
Answer
| 0000
| +0
|
| 0101
| +5
|
| 1110
| -2
|
| 1001
| -7
|
4) First bit is a signed bit:
2's complement has this nice property that first bit is a sign bit because all positive starts with 0 whereas all negative with 1.
5) Memory overflow check:
While doing addition, we made sure that our answer is within the range but while designing hardware, memory overflow needs to be detected. It will be very bad idea for hardware designers to check magnitude to catch overflow. 2's complement method provides a very simple way to detect memory overflow. If carry in to signed bit is not equal to carry out of signed bit, then it is case of memory overflow i.e., if carry in to signed bit is 0 but carry out is 1 or if carry in 1 but carry out is 0, then it is case of memory overflow.
| Binary
| Decimal
|
| Binary
| Decimal
|
| Binary
| Decimal
|
| Binary
| Decimal
|
Number-1
| 1011
| -5
|
| 0010
| 2
|
| 0111
| +7
|
| 1011
| -5
|
Number-2
| 1100
| -4
|
| 0110
| 6
|
| 1110
| -2
|
| 0011
| 3
|
Addition
| (1) 0111
|
|
| (0)1000
|
|
| (1)0101
|
|
| (0)1110
|
|
carry in to sign bit
| 0
| overflow
|
| 1
| overflow
|
| 1
| no
|
| 0
| no
|
carry out to sign bit
| 1
|
| 0
|
| 1
|
| 0
|
Similar Reads
One's Complement
In digital electronics, the binary system is one of the most common number representation techniques. As its name suggest binary number system deals with only two number 0 and 1, this can be used by any device which is operating in two states. The binary number system has two complements 1's and 2's
4 min read
C++ program to implement Half Adder
Prerequisite : Half Adder in Digital Logic We are given with two inputs A and B. Our task is to implement Half Adder circuit and print the outputs sum and carry of two inputs. Introduction : The Half adder is a combinational circuit which add two1-bit binary numbers which are augend and addend to gi
2 min read
Functionally Complete Operations
Prerequisite - Functional Completeness A switching function is expressed by binary variables, the logic operation symbols, and constants 0 and 1. When every switching function can be expressed by means of operations in it, then only a set of operation is said to be functionally complete. The set (AN
3 min read
Python program to implement Half Adder
Prerequisite: Half Adder in Digital LogicGiven two inputs of Half Adder A, B. The task is to implement the Half Adder circuit and Print output i.e sum and carry of two inputs.Half Adder: A half adder is a type of adder, an electronic circuit that performs the addition of numbers. The half adder is a
5 min read
Digital Electronics - Radix and Diminished Radix Complements
Prerequisite - Complement of a Number The use of complements is to mainly perform Subtraction. We can easily perform addition in contrast if we would like to implement subtraction using logic gates we require more (because we need to consider borrowing that kind of stuff). So if we somehow make it i
4 min read
Arithmetic Operations of 2's Complement Number System
We all know how to perform arithmetic operations of binary number systems. However, computer system generally stores numbers in 2's complement format. So it becomes necessary for us to know how arithmetic operations are done in 2's complement. Addition:In 2's complement, we perform addition the same
3 min read
Implementation of XOR Gate from AND, OR and NOT Gate
In this article, we will discuss the implementation of XOR gate using AND, OR and NOT Gate. We will discuss about the AND, OR, XOR and NOT gates, and with it, we will discuss about their operations, logic diagrams and truth table. After understanding the gates and their operation we will use those g
5 min read
Code Converters - BCD(8421) to/from Excess-3
Prerequisite - Number System and base conversions Excess-3 binary code is an unweighted self-complementary BCD code. Self-Complementary property means that the 1's complement of an excess-3 number is the excess-3 code of the 9's complement of the corresponding decimal number. This property is useful
5 min read
Implementation of Full Adder Using Half Adders
Implementation of full adder from half adders is possible because the half adders add two 1-bit inputs in full adder we add three 1-bit inputs. To obtain a full adder from a half adder we take the first two inputs and add them and use the sum and carry outputs and the third input to get the final su
5 min read
4-bit binary Adder-Subtractor
In Digital Circuits, A Binary Adder-Subtractor is can do both the addition and subtraction of binary numbers in one circuit itself. The operation is performed depending on the binary value the control signal holds. It is one of the components of the ALU (Arithmetic Logic Unit). What is Binary Adder?
6 min read