Amazon Web Services (AWS)’s commitment to UALink reinforces the future of open, interoperable AI infrastructure. UALink provides a memory semantic, low latency, high bandwidth scale-up AI fabric that can efficiently connect 100s of GPUs together. Astera Labs is proud to work alongside AWS and other industry leaders in advancing UALink technology. #UALink #AWS Ultra Accelerator Link Consortium #ScaleUpAI #AI #reInvent
Astera Labs
Semiconductor Manufacturing
Santa Clara, CA 39,183 followers
Purpose-Built Connectivity for Rack-Scale AI
About us
Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe®, CXL®, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com.
- Website
-
http://www.asteralabs.com
External link for Astera Labs
- Industry
- Semiconductor Manufacturing
- Company size
- 201-500 employees
- Headquarters
- Santa Clara, CA
- Type
- Public Company
- Founded
- 2017
- Specialties
- Connectivity solutions, Signal Conditioning, PCIe, Heterogeneous Compute, Hyper-scale Data Center, NVMe, Ethernet, CXL, AI, ML, Connectivity, and Data Center
Locations
Employees at Astera Labs
Updates
-
Big news from Astera Labs! We’ve expanded our connectivity portfolio with NVLink Fusion-based custom connectivity solutions. We are addressing the increasing complexity and diversity of next-gen AI infrastructure, enabling heterogeneous systems that integrate diverse accelerators into unified, high-performance rack-scale platforms – and giving hyperscalers the flexibility to innovate at speed. Ashish Karandikar, VP of Engineering, NVIDIA shares: “NVLink Fusion, combined with Astera Labs’ purpose-built connectivity solutions, gives customers access to the industry’s best scale-up interconnect with NVLink in a proven rack-scale architecture. With Astera Labs joining our growing NVLink Fusion ecosystem, innovators have more choice in bringing semi-custome AI systems to market faster – with higher bandwidth, lower latency performance.” Sanjay Gajendra adds: “Our collaboration with NVIDIA enables greater flexibility for XPU connectivity through NVLink Fusion enabled solutions. With NVLink Fusion support, our custom connectivity solutions will be engineered to sustain multiple terabytes per second of low-latency data throughput and are expected to be additive to our overall footprint in next-generation heterogenous AI infrastructure.” Learn more: https://buff.ly/cz8cHN2 #NVLink #AI #NVIDIA #NVLinkFusion #AIInnovation #XPU #GPU
-
-
From startup to a public company with offices worldwide - our journey has been fast, focused, and fueled by one mission: Eliminate bottlenecks and unlock the full potential of AI. What powers us isn’t just technology - it’s culture. Customer-obsessed. Curious. Collaborative. A team that takes action, owns outcomes, and builds beyond job titles. As we scale globally, we stay grounded in giving back, mentoring future innovators, and delivering real impact for our customers. And we’re just getting started.🚀 #CompanyCulture #TechInnovation #AIInfrastructure #ScalingUp #Leadership #TeamCulture #HyperGrowth #CustomerObsessed
-
We’re hiring! 🚀 Astera Labs is seeking an experienced Emulation Engineer to help drive the verification and validation of complex SoCs that power next-generation rack-scale AI infrastructure at San Jose, CA. What You’ll Do ✅ Develop and execute emulation test benches and test plans. ✅ Lead the full emulation lifecycle, from planning to system-level testing. ✅ Build scalable, platform-agnostic methodologies across DV, emulation, and post-silicon bring-up. ✅ Collaborate with software, system, and validation teams to execute cross-functional test plans. Qualifications Required ✅ Bachelor’s in EE required, Master’s preferred . ✅ 10+ years verifying complex SoCs for server, storage, or networking. ✅ Strong experience with simulators, regressions, and revision control tools. ✅ Ability to independently develop test plans, debug issues, and create stimuli using C/SystemVerilog. Bonus: Python/Perl scripting, SystemVerilog/UVM/C/C++, SystemC, and experience with PCIe, Ethernet, DDR, NVMe, or transactors. 👉 Apply now: https://lnkd.in/gwHxvHjn #NowHiring #VerificationEngineering #Emulation #ASICDesign #Semiconductors #AIInfrastructure #Connectivity #CXL #PCIe #Ethernet #NVMe #TechCareers #JoinUs
-
-
This Thanksgiving, we’re thankful for our incredible team and community — the innovators, collaborators, and customers who inspire us every day. Wishing you and your loved ones a wonderful holiday! 🍂🦃 #Thanksgiving #Thankful #Gratitude #Leadership #Partners #Innovation
-
-
EE Times | Electronic Engineering Times, Taiwan recently sat down with our team in Taipei, and Susan Hong captured the story behind how Astera Labs is helping usher in AI Infrastructure 2.0. “The rack is no longer just housing servers—it is the computing unit.” This shift is only possible with purpose-built connectivity designed for AI at scale and within open ecosystems, and Astera Labs’ solutions are enabling this transformation. 👉 Read Susan’s in-depth article to see how Astera Labs is leading AI Infrastructure 2.0: https://buff.ly/fbtuggm #AIInfrastructure #RackScaleComputing #Semiconductors #OpticalInterconnect #DataCenter #Hyperscale #Connectivity #CXL #PCIe #UALink #TechInnovation
-
-
Streamline, Automate, and Accelerate Your Hardware Workflows Validation delays are costly, and a fragmented tool landscape doesn’t help. That’s where COSMOS Tools come in. ⚡️ From bring-up to system validation, manufacturing, and field ops, COSMOS CLI and Explorer give engineers instant access to diagnostics, monitoring, and automation workflows, with no custom scripts required. 👉 Explore the blog by Wanjohi M. to see how it can transform your hardware workflows - https://buff.ly/kgxIbmd #HardwareValidation #Semiconductors #SystemValidation #Automation #EngineeringTools #Diagnostics #ChipDesign #DataCenter #Hyperscale #Firmware #SiliconEngineering #HardwareTesting #TechInnovation
-
🌿 A refreshing escape for the Astera Labs India team. The India team enjoyed a fun-filled day at Dr. Shivananda Koteshwar’s farmhouse — and the pictures don’t even begin to capture the energy! 😄 From fruit picking and cricket to hiking and delicious meals, the day was packed with laughter and great memories. #TeamAstera #AsteraLabsIndia #TeamOuting #WeekendGetaway #LifeAtAstera
-
🚀 We’re Hiring: Principal Business Manager | San Jose, CA Astera Labs is seeking an experienced Principal Business Manager to drive growth and strategic partnerships across the next generation of rack-scale AI infrastructure. In this high-impact role, you’ll collaborate with hyperscalers and ecosystem partners to accelerate revenue, shape commercial strategies, and scale our connectivity solutions. What we’re looking for: ✅ 10+ years in semiconductor industry roles (product marketing, sales, or operations) ✅ Proven experience in deal negotiation and customer engagement ✅ Strong strategic and analytical mindset ✅ Excellent communication and leadership skills ✅ Broad understanding of high-speed protocols like PCIe (CXL/ Ethernet is a plus) If you’re passionate about shaping the future of rack-scale AI connectivity, we want to hear from you! 👉 Apply now: https://buff.ly/6ps7QE8 #Hiring #BusinessManager #AIInfrastructure #Semiconductors #Leadership #CareerGrowth #DataConnectivity #SiliconValleyJobs #AI #PCIe #CXL #Ethernet #UALink
-
-
AI clusters are only as strong as their weakest link! Without granular visibility, performance bottlenecks can hide in plain sight. Solving this requires insight at the lane level, which is exactly what COSMOS Explorer provides - delivering deep visibility and control across Active Electrical Cables, Active Optical Cables, and Smart Retimers to keep scale-up fabrics operating at peak efficiency. 👉 Watch the video where Chuang Liang shows how COSMOS Explorer simplifies link management for rack-scale AI connectivity: https://buff.ly/TSNHCOi #AIInfrastructure #RackScaleAI #Connectivity #PCIe #SignalIntegrity #RAS #SmartRetimers #AEC #AOC #COSMOSExplorer #LinkMonitoring #LinkManagement