Encore Semi, Inc.

We're #hiring a new Sr Design Verification Engineer ( Remote) in Austin, Texas. Apply today or share this post with your network.

🔧 Encore Semi – Experts in Low-Latency IP Porting & Cross-Foundry Migration 🔧   Are you planning a complex IP migration or facing challenges with latency, foundry transitions, or tight tapeout timelines?   At Encore Semi, we specialize in IP porting and migration with a proven track record of delivering high-quality, on-time results for the world’s most advanced semiconductor projects. 🎯 What We Deliver: 🚀 Core Expertise: SerDes IP (USB, PCIe, MIPI, HDMI) – Low-latency performance: 0.6 ns/mm (based on 10mm link) PLLs, DLLs, ADCs, DACs Custom & Standard Digital IP   🔁 Specialized in Complex Transitions: Cross-Foundry Migrations (e.g., TSMC → Samsung) Technology Shrinks (e.g., TSMC 5nm → 3nm) Full Platform Porting (e.g., TSMC 3nm → Intel 18A)   🧠 Comprehensive Engineering Augmentation Support: Our U.S.-based engineering team brings 15+ years of experience across mixed-signal and digital domains. RTL, Microarchitecture, Verification & Physical Design Software & Firmware Development Hardware Bring-Up & System Debug DFT & Functional Safety (ISO 26262) RFIC, Analog Design & Layout   📞 Looking for an engineering partner to accelerate your SoC roadmap? Connect with Sri R. ( https://lnkd.in/dVeZSgFr ) at Encore Semi — and let’s discuss how to meet your latency and performance goals with confidence.   #Semiconductor #IPPorting #ASICDesign #MixedSignal #SerDes #RTLDesign #FoundryMigration #EncoreSemi #ChipDesign #3nm #Intel18A #LowLatency #HighPerformanceDesign #SerDes #SemiconductorIP #ASICDesign #ChipPerformance #MixedSignalDesign #LatencyOptimization #SoCDesign #SignalIntegrity #Semiconductors #ChipDesign #EDA #SemiconductorEngineering #IPPorting #TechInnovation #FoundryMigration #LowLatency #HighPerformanceDesign #SerDes #SemiconductorIP #ASICDesign #ChipPerformance #MixedSignalDesign #LatencyOptimization #SoCDesign #SignalIntegrity #Semiconductors #ChipDesign #EDA #SemiconductorEngineering #IPPorting #TechInnovation #FoundryMigration #RFIC: #RFdesign #RadioFrequency #Wireless #MillimeterWave #5G #AnalogDesign: #AnalogCircuit #ADC #DAC #PLL #LNA #PowerManagement #Layout: #AnalogLayout #CustomLayout #Virtuoso #Calibre #IClayout #DesignForTest #ATPG #ScanChain #BIST #JTAG #FunctionalSafety #ISO26262 #ASIL #AutomotiveSafety #FaultInjection #FMEA #HardwareBringUp #BoardBringUp #SystemValidation #JTAG #Oscilloscope #LogicAnalyzer #SystemDebug #HardwareDebug #RootCauseAnalysis #PostSiliconValidation #SoftwareDevelopment #EmbeddedSystems #Firmware #BareMetal #RTOS #LinuxKernel #Cprogramming #Assembly #FirmwareDevelopment #DeviceDrivers #Bootloader #EmbeddedC #FirmwareEngineer #RTL #RTLdesign #Verilog #VHDL #SystemVerilog #FPGA #ASIC #Microarchitecture #ComputerArchitecture #CPUdesign #Processor #InstructionSet #Pipeline #Verification: #FunctionalVerification #UVM #SystemVerilogAssertion #FormalVerification #Simulation #PhysicalDesign: #PlaceAndRoute #TimingClosure #STA #ClockTreeSynthesis #VLSI

🔧 We Are an Engineering Organization — Built by Engineers, Led by Engineers At Encore Semi, we help semiconductor innovators move faster and design smarter. Our expert engineering teams — 100% U.S.-based and ITAR-compliant — integrate directly with your teams to deliver tangible results across the entire silicon lifecycle, from RTL to GDSII. 💡 Now Supporting IP & Digital Block Porting Across Foundries and Nodes Encore Semi engineers bring deep expertise in complex IP migration and block porting, including: • High-Speed SerDes (USB, PCIe, MIPI, HDMI) • PLLs / DLLs for precision timing • Mixed-Signal Interfaces (ADC, DAC) • Digital IP across toolchains and PDKs ✅ U.S.-Based Engineering Talent (15+ Years of Hands-On Experience) • RTL Design Engineers – Micro-architecture, low-power design, synthesis, STA, CDC. • Physical Design / STA Engineers – Advanced nodes (3nm / 5nm / 7nm), timing closure, signoff. • Software Engineers – Modern C++ (17/20), Python3, Linux, CI/CD (Jenkins, GitHub Runners). • Hardware Debug / Board Bring-Up Engineers – JTAG, bootloaders, system validation. • Functional Safety Architects – ISO 26262, system-level safety, patented FuSa solutions. • Design Verification Engineers – UVM, SystemVerilog, testbench development, coverage. • RFIC Engineers – RF front-end, analog/digital integration, PDK adaptation. • DFT Engineers – Scan, ATPG, MBIST, boundary scan, test strategy & bring-up. • Analog Circuit Design Engineers & Custom Layout Designers– Custom circuits, SerDes, PLLs, 2nm–5nm process nodes and High Voltage 🎯 Tight Deadlines? Resource Gaps? Complex Porting or Verification Challenges? Encore Semi delivers trusted engineering execution with the leadership, reliability, and results that top semiconductor innovators depend on. #SemiconductorDesign #EngineeringLeadership #IPPorting #SoCDesign #EncoreSemi #MadeInUSA #ITARCompliant For further details, please contact Sri R.