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MIPS

MIPS

Semiconductor Manufacturing

San Jose, California 20,759 followers

Advancing the next wave of Physical AI

About us

MIPS is accelerating compute density in the automotive, cloud and embedded markets. Giving customers the freedom to build unique products for specific workloads, MIPS’ industry-leading cores are configurable, efficient and easy to implement. Its multi-threading methodology delivers advanced scalability and the ability to efficiently move and process data faster. The company’s compute DNA spans more than two decades with billions of MIPS-based chips shipped to date. For more information, visit MIPS.com.

Industry
Semiconductor Manufacturing
Company size
11-50 employees
Headquarters
San Jose, California
Type
Privately Held
Founded
1998
Specialties
Semiconductor IP

Locations

Employees at MIPS

Updates

  • View organization page for MIPS

    20,759 followers

    MIPS Cheol Kim will be speaking on Chatbots to Robots at the RISC-V International Tokyo day this week. Cheol will explore the essential technologies needed to implement Physical AI, examining the four core computing challenges: Sense, Think, Act, and Communicate. Cheol will highlight how integrating these capabilities into edge platforms can unlock new markets, enable smarter products, and drive greater efficiency. Learn more at the link in the comments. #RISCV

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  • View organization page for MIPS

    20,759 followers

    HyperFRAME Research’s whitepaper shares how the MIPS I8500 processor IP is transforming data movement for the Physical AI era. Built on a proven data-movement microarchitecture now evolved to a native RISC-V architecture, the I8500 integrates control and data-plane processing into a highly scalable, multithreaded system. Paired with GlobalFoundries’ foundry-scale validation and the Atlas Explorer software-hardware co-design platform, the I8500 gives customers unmatched design freedom, ecosystem credibility, and rapid time-to-market.

  • View organization page for MIPS

    20,759 followers

    The MIPS Atlas Explorer bridges the gap between hardware and software, accelerating development and ensuring scalable, long-term product lifecycles. Learn more about our digital twin and system-level optimization tool in the video. 

  • View organization page for MIPS

    20,759 followers

    MIPS will have multiple speakers at IPCCC in Austin starting on Friday. Pratik Kedar and Mayank Mangla will present "Accelerating TensorFlow Lite Micro on Embedded RISC-V Platforms via Multi-Hart Execution” during the Edge AI session on Friday. Thanks to Mukunda Aprameya for co-authoring this paper. On Saturday, Kathlene Magnus will be moderating a panel session of women tech leaders, focusing on "The Future of Work: AI, Hybrid Work and Workplace Culture." MIPS' Anubha Tewari will be a panelist sharing her thoughts on adaptability as a value. Don’t miss our inspiring and knowledgeable MIPS speakers at IPCCC.

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  • View organization page for MIPS

    20,759 followers

    The MIPS I8500 delivers efficient throughput for real-time, event-driven applications across automotive, industrial, data center, and communications markets. With four threads per core, scalable multi-cluster deployment, the I8500 enables intelligent, low-latency data orchestration for Physical AI systems.

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  • View organization page for MIPS

    20,759 followers

    📢 Ralf Herrmann from the MIPS EMEA team will be speaking on the transition from chatbots to robots at SPS – Smart Production Solutions, exploring the four computing aspects of physical AI: Sense, Think, Act, and Communicate. Stop by his session in Hall 1 and at our booth 429 to learn how MIPS RISC-V processors are enabling the next generation of Physical AI for industrial automation. Learn more and schedule a meeting with MIPS at the link below. #SPSExpo #SmartProductSolutions

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  • View organization page for MIPS

    20,759 followers

    MIPS P8700 processors are redefining performance, scalability, and safety for next generation #ADAS and autonomous driving #SoCs. P8700 clusters deliver high throughput real-time response with ASIL-B functional safety, enabling automakers and chip developers to scale efficiently from Level 1 to Level 5 autonomy. With support for simultaneous multithreading, advanced I/O coherence, and a scalable multi-core architecture, the P8700 is built to keep complex automotive workloads safe and efficient. Learn more in our whitepaper.

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Funding

MIPS 1 total round

Last Round

Series unknown
See more info on crunchbase