Semiconductor Engineering

Designing resilient chips with SLM can help combat aging effects, security threats, and get to market faster with higher yields. By Ann Mutschler. https://lnkd.in/gffkr_ui #siliconlifecyclemanagement #SLM #chiparchitectures #semiconductor #EDA Simon Rance Keysight Technologies Noam Brousard proteanTecs Randy Fish Synopsys Inc Geir Eide Siemens Digital Industries Software Andy Nightingale Arteris Vikram Karvat Movellus Inc. Dan Trock #DFT Nilanjan Mukherjee Meta Blaize William Yang Wang ChipAgents #predictivemaintenance

3DKs: Making Headway On Chiplet Standards: https://lnkd.in/gzivVfZV Validating design kits requires investment and collaboration across the supply chain, but it pays off in fewer layout respins and lower risk. By Laura Peters. #chiplets #standards #semiconductor #PDKs #ADKs #PADKs Open Compute Project Foundation Tony Mastroianni Ruben Fuentes Amkor Technology, Inc. Lihong Cao ASE Global #advancedpackaging HRL Laboratories, LLC Siemens Digital Industries Software Picture Credit: OCPSUMMIT24/Creative Commons ShareAlike 4.0 International License

AI-Driven Collaboration In Chip Manufacturing: https://lnkd.in/gvpVBnrF Semiconductor Engineering's latest Tech Talk How agents can shorten time to market through secure sharing of data by machines. 3D chips and multi-die assemblies can offer significant improvements in performance and power, but the tradeoff is the increased amount of time and money it takes to generate working silicon. There are more process steps, more interactions between processes, and more data to manage throughout the manufacturing flow — so much, in fact, that it has now reached well beyond what even the best engineers can manage. This is where agentic AI can really shine. John Kibarian, CEO of PDF Solutions, talks about how AI agents fit into this picture, how they can shorten time to market by completely removing humans from some interactions, and how this can improve data security in a multi-vendor environment. #semiconductor #semiconductormanufacturing #AgenticAI #3Dchips #multidieassemblies

New technical papers recently added to Semiconductor Engineering’s library https://lnkd.in/guS4zGga #semiconductor #edgeAI #AgenticAI #automotive #InMemoryComputing #neuralnetworks #RISCV #glasssubstrate Stanford University Jon S., Avanika Narayan, Shang Zhu Sungkyunkwan University Chungbuk National University FZI Research Center for Information Technology KIT Maximilian Kirschner, Konstantin Dudzik, Ben Mattes KrusekampJuergen Becker Tampere University Kapil Bhardwaj, Ella Paasio Sayani Majumdar Meta Seoul National University University of Illinois Urbana-Champaign Michael Jaemin Kim, Seungmin Baek, Hwayong Nam, Jung Ho Ahn Università degli Studi di Firenze, Meccanica 42 Alessio Anticaglia Renzo Capitani Claudio Annicchiarico Princeton University, The Hong Kong University of Science and Technology, North Carolina State University Eren Kurshan

Latest news: Nvidia’s $2B investment in Synopsys, plus multi-year collaboration (12/1 update); Micron's new HBM plant; China’s DDR5/LPDDR5X; global government fundings climb; GF’s latest photonics deal; Rapidus’ infusion; GPU versus TPU; TSMC’s 2nm fabs; ASIC acquisition; diamond chip foundry; data sharing in IC manufacturing; how Americans use AI; open-source chiplets and more... https://lnkd.in/gm6v7twV #semiconductor #DRAM ChangXin Memory Technologies, Inc. SK hynix Diamond Foundry Rapidus Corporation onsemiGlobalFoundries Rensselaer Polytechnic Institute Meta Google Cadence National Institute of Standards and Technology (NIST) Analog Devices Semitech TSMC imec Applied Materials FUJIFILM Corporation Lam Research Faramarz Fekri Sumitomo Chemical Presto Engineering NcodiN SPhotonix Inc shinephi Chris McGuire Angela Luna Alex Burlak Princeton University Brewer Science Massachusetts Institute of Technology Guillermo A. Hernandez-Mendoza Khaled Hamidouche Tachyum Beneq Kneron GigaDevice Semiconductor Inc. Infineon Technologies SEALSQ Subhash Sethumurugan Dr.-Ing.

Growing use cases include life science AI, reducing memory and I/O bottlenecks, data prepping, wireless networking, and as insurance for evolving protocols. By Liz Allan. https://lnkd.in/gcCJdaZT #semiconductor #FPGA #AI #FPGAprototyping Venkat Yadavalli Altera Rob B. AMD Andy Nightingale Arteris Mo Faisal Movellus Inc. ChipAgents Nandan Nayampally Baya Systems Russell Klein Siemens Digital Industries Software BigCat Wireless Pvt Ltd #6G Scott Best Rambus Dana Neustadter Synopsys Inc Andy Jaros QuickLogic Corporation

Tech Talk: Challenges In Testing Photonics In Chips: The impact of combining electrical and optical test in a single device. Aftkhar A., CEO of yieldWerx Semiconductor, talks with Semiconductor Engineering about the new challenges that photonics brings, including a lack of standards about what needs to be measured and how that should be done, what to do with multi-modal signatures that are no longer a single Gaussian distribution, and the overall impact on test time in the fab. #photonics #photonicstest #DataAnalytics #semiconductor https://lnkd.in/gwypxmQq

The application of AI into design tools and flows will take several forms, each independent, but all potentially working together. By Brian Bailey. https://lnkd.in/gHUjDgTk #AI #EDA #semiconductor #chipdesign #LLMs #verification Amit Gupta Anand Thiruvengadam Michal Siwinski Arteris Vamshi Balanaga ChipAgents #AgenticAI Partcl Rob Knoth Cadence Benjamin Prautsch Fraunhofer IIS, Division Engineering of Adaptive Systems Arvind Srinivasan Normal Computing Rich Goldman Ansys Siemens Digital Industries Software Synopsys Inc

New Panel Production Efforts Target Interposer Costs https://lnkd.in/gXzD94hF The rising cost of increasingly large interposers is spurring renewed interest in panel-level manufacturing, which for years has hobbled along due to the massive and collective effort required by the chip industry to change formats. By Bryon Moyer. #semiconductor #PanelLevelPackaging #advancedpackaging #Joint3 #semiconductormanufacturing Pax Wang United Microelectronics Corporation (UMC) Anshu Bahadur SEMI Samer Bahou Hidenori Abe Resonac #interposers Mark da Silva Poupak Khodabandeh Brewer Science Lam Research Synopsys Inc Ansys Andy Heinig Fraunhofer IIS, Division Engineering of Adaptive Systems Ravi Mahajan Intel Corporation William Chen ASE Global Picture credit: Resonac

Why digital and analog engineers must now find common ground. In this SemiEngineering Tech Talk, Chandrashekar Chetput, software engineering group director at Cadence, discusses what’s needed on both the digital and the analog sides in order to speed up mixed signal simulations and improve the reliability of these very complex and expensive devices. https://lnkd.in/guKhgxur #EDA #verification #mixedsignal #analog #MultiDieAssemblies