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BenQ PD25 Schematic Overview

1. The document is a schematic block diagram for a Tahiti laptop that shows the high level connections between major components like the CPU, memory, displays, and I/O. 2. It includes indexes that provide page numbers for descriptions of components like the Dothan CPU, Alviso chipset, and ICH6 chip. Power and ground labels are also shown. 3. Low level signal connections are depicted between the CPU and northbridge for functions like arbitration, snoop, and response phases of operation. Thermal sensors and reset signals are also detailed.
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
80 views47 pages

BenQ PD25 Schematic Overview

1. The document is a schematic block diagram for a Tahiti laptop that shows the high level connections between major components like the CPU, memory, displays, and I/O. 2. It includes indexes that provide page numbers for descriptions of components like the Dothan CPU, Alviso chipset, and ICH6 chip. Power and ground labels are also shown. 3. Low level signal connections are depicted between the CPU and northbridge for functions like arbitration, snoop, and response phases of operation. Thermal sensors and reset signals are also detailed.
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 47

1

DRAM Power
1.8V, 0.9V
PG 43

DC/DC
+3V_SRC
+5VSUS

TAHITI-INTEGRATED

PG 44

Dothan

AC/BATT
CONNECTOR

PG 47

BATT
SELECTOR

PG 40

BATT
CHARGER

PG 41

SYSTEM
RESET CKT

CLOCKS

(478 Micro-FCPGA)

PG 15

PG 39

PG 3,4

Panel Connector

PG 46

PG 17
4X133MHZ

LVDS

POWER DC/DC
B

DDR2-SODIMM1

sDVO

Alviso-GM

400/533 MHZ DDR II

DVI

SI1362
PG 16

TVOUT

S-Video
PG 18

PG 13,14
1257 PCBGA

400/533 MHZ DDR II

VGA

PG 18

PG 13,14

USB2.0 (P5,P7)
DMI interface

PATA

USB2.0 (P4,P6)
USB2.0 (P1)

2 Rear Ports

PG 32

2 right Side

PG 32

SATA

88SA8040

33MHz PCI

PG 19

PG 19

Internal Media Bay


CD-ROM PG 19

CRT

PG 5,6,7,8,9

DDR2-SODIMM2

PATA - HDD

DOCKING
CONNECTOR

ICH6-M

ATA 66/100

LAN (100/10) 1394 CONN


BCM4401

609 BGA

USB2.0 1 port(P0)
AC97

PG 22

PG 35

PG 10,11,12

CARDBUS
PCI4515
PG 21

PCMCIA
CON.
PG 21

E-Switch
PI3L110Q
LPC
USB2.0 (P2)
AUDIO

MDC

PG 31,32

PG 24

Bluetooth

Audio
Jacks
PG 34

RJ11 to
DOCK
PG 38

PG 38
C

PG 23

I/O Board CONN


PG 32

PG 36

DOCK LPC

PG 25,26

Tip
Ring
PG 24

IrDA
PG 37

Wireless LAN

SIO(Macallan 3)

X-Bus
D

PS/2

MINI-PCI

PG 30

256 Pins LBGA


S/PDIF to
DOCK
PG 38

PG 45

RUN POWER
SW

1.5VSUS, 1.05V

CPU VR
PG 42

Keyboard
PG 26

Serial
PG 27

Parallel
PG 28

Touchpad

Flash

PG 30

PG 29

SWTICH & LED &


IO CONN

FAN & THERMAL

PG 32

PG 31

QUANTA
COMPUTER

Title

Schematic Block Diagram1


Size

Document Number
Tahiti

Date:

, 29, 2005
7

R ev
1A
Sheet

of

1
8

49

INDEX
Pg#
1

Description

Front Page

3-4

Dothan

5-9

Alviso

10-12

ICH6

13-14

DDRII SO-DIMM(200P)

SI1362

17

LCD Conn. & SSP

18

CRT & TV Conn.

19

SATA & IDE Conn.

20

PAD & Screw Hole

21

TI PIC4510

22

CB/1394 CONN

23

Mini PCI Conn.

24

MDC Conn.

25-26

Parallel Port

28

Serial Port

29

Flash ROM

30

Touch Pad CONN.& Bluetooth CONN

31
C

Switch Board Conn. & LED & IO Board


FAN & Thermal

32

Audio CODEC (STAC9751) & Phone Jack

35-36

LAN Interface

PBATT+

MAIN BATTERY + (10~17V)

PWR_SRC

MAIN POWER (10~20V)

VHCORE

CPU CORE POWER (1.25/1.15V) RUNPWROK

1.05V

AGTL+ POWER (1.05V) I/O

RUNPWROK

+3VRUN

SLP_S3# CTRLD POWER

RUN_ON

+3VSUS

SLP_S5# CTRLD POWER

SUS_ON

+5VALW

8051 POWER (5V)

+5VRUN

SLP_S3# CTRLD POWER

RUN_ON

+5VSUS

SLP_S5# CTRLD POWER

SUS_ON

+5VHDD

HDD POWER (5V)

HDDC_EN#

+5VMOD

MODULE POWER (5V)

MODC_EN#

STRB#/5V

EXTERNAL FDD POWER (5V)

FDD/LPT#

+5VRUN

FAN POWER (5V)

FAN_OFF/ON#

VDDA

AUDIO ANALOG POWER (5V)

RUN_ON

1_8VSUS

RESUME WELL IN ICH

1_8VRUN

SLP_S3# CTRLD POWER

+3VALW

8051 POWER (3V)

V1_5RUN

ALVISO POWER Non-CPU I/O

GND

ALL PAGES

COMBO CONN GND

MISCELLANEA

39

Docking Conn.

40

SYSTEM RESET/POWER GOOD


Battery Selector & Charger

43

CPU Power

44

1.8VSUS/0.9V

45

1.5V/1.05V

46

D/D Power

47

RUN Power Switch

48

RUN POWER SW

QUANTA
COMPUTER

Title

DIGITAL GROUND

FIR

38

41-42

AC ADAPTER (20V)

33-34

37

Control Signal

Description

DC_IN+

SIO (LPC47N354)

27

Pg#

Label

Clock Generator

16

Power & Ground

15

DNI LIST

Schematic Block Diagram 1

Index, DNI, Power & Ground

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

2
8

49

VCCP

HD#[0..63]

U7A

ADS#

N2

IERR#

BREQ0#
BPRI#
BNR#
LOCK#

ARBITRATION
PHASE
SIGNALS

5
5
5

HIT#
HITM#
DEFER#

K3
K4
L4

HIT#
HITM#
DEFER#

SNOOP PHASE
SIGNALS

C8
B8
A9
C9
M3
H1
K1
L2

BPM0#
BPM1#
BPM2#
BPM3#
TRDY#
RS0#
RS1#
RS2#

RESPONSE
PHASE
SIGNALS

A20M#
FERR#
IGNNE#
CPUPWRGD
SMI#

C2
D3
A3
E4
B4

A20M#
FERR#
IGNNE#
PWRGOOD
SMI#

PC
COMPATIBILITY
SIGNALS

TCK
TDO
TDI
TMS
TRST#

A13
A12
C12
C11
B13
A16
A15
B10
A10
A7

TCK
TDO
TDI
TMS
TRST#
ITP_CLK0
ITP_CLK1
PREQ#
PRDY#
DBR#

DIAGNOSTIC
& TEST
SIGNALS

D1
D4
C6
A6
B7
G1

LINT0
LINT1
STPCLK#
SLP#
DPSLP#
DPRSTP#

EXECUTION
CONTROL
SIGNALS

B18
A18

THERMDA
THERMDC

HTRDY#
RS#0
RS#1
RS#2

T11 PAD
T7
PAD

39
10
10
10
5,10
10

DBR#
INTR
NMI
STPCLK#
CPUSLP#
DPSLP#

PREQ#
PR DY#
DBR#

STPCLK#
CPUSLP#
DPSLP#

DPRSTP#
31
31

IERR#

N4
J3
L1
J2

10
A20M#
10
FERR#
10
IGNNE#
10 CPUPWRGD
10
SMI#

G1: NC for
Dothan and
DPRSTP# for
Yonah

A4

ERROR
SIGNALS

HBREQ0#
BPRI#
BNR#
HLOCK#

5
5
5
5

10

ADS#

5
5
5
5

BPM0#
BPM1#
BPM2#
BPM3#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

THERMDA
THERMDC

31 THERMTRIP#

THERMDA
THERMDC
THERMTRIP#

C17

CPU_PROCHOT# B17

THERMTRIP#

+3VALW

R22
*1.5K_NC

R34
*330_NC
1

VCCP
PROCHOT# 26
3

R24
56

R23
2

Q11
*3904_NC

1 2
*330_NC

CPU_PROCHOT#

Q12
*RHU002N06_NC

Thermal Level Shift


ITP disable guidelines
Signal

Resistor Value

Connect To

TDI

150 ohm +/- 5%

VTT

Within 2.0" of the CPU

Resistor Placement

TMS

39 ohm +/- 5%

VTT

Within 2.0" of the CPU

680 ohm +/- 5%

GND

Within 2.0" of the CPU

TCK

27 ohm +/- 5%

GND

Within 2.0" of the CPU

VTT

Within 2.0" of the CPU

Open

Note: Populate All NC component


ITP connector is populated.
VCCP

R236
54.9/F

HDSTBN0#
HDSTBP0#
HDSTBN1#
HDSTBP1#
HDSTBN2#
HDSTBP2#
HDSTBN3#
HDSTBP3#

TDI
TMS
TCK
TDO
TRST#

5
5
5
5
5
5
5
5

R238 R239
54.9/F 39.2/F

15
15

5
5
5
5

DBSY#
DRDY#

M2
H2

DBSY#
DRDY#

5
5

BCLK1
BCLK0

B14
B15

HCLK_CPU# 15
HCLK_CPU 15

B5

CPUINIT#
CPURST#

DPWR#

C19

1
R235

TCK

HDBI0#
HDBI1#
HDBI2#
HDBI3#

B11

when

VCCP

R240
150
JITP2

1
2
5
7
1
2
R237 *22.6/F_NC3

CPURST#

D25
J26
T24
AD20

RESET#

TRST#
TDO

DINV0#
DINV1#
DINV2#
DINV3#

INIT#

THERMAL DIODE

+3VRUN

C23
C22
K24
L24
W25
W24
AE24
AE25

200
2

DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#

R31
1

680

VCCP

TDI
TMS
TCK
TDO
TRST#

VTT0
VTT1
VTAP

27
28
26

+3VSUS

R2
P3
T2
P1
T1

CPUPWRGD

R28

C359

R234
150

*.1U_10V_NC
2

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

56
2

5
5
5
5
5

DATA
PHASE
SIGNALS

R30
1

U3
AE5

REQUEST
PHASE
SIGNALS

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

27.4/F
2
2

1
1

HADSTB0#
HADSTB1#

1 OF 3

A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26

2
2

ADSTB0#
ADSTB1#

5
5

Dothan

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

R29
1
1

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#

P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
AA3
Y3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1

TCK
TRST#

1
1

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

IERR#

HD#[0..63] 5

HA#[3..31]

HA#[3..31]

56
2

2
2

THERMTRIP#

R25
1

12
2
*22.6/F_NC RESET#
11

HCLK_ITP#
HCLK_ITP

DBR#
DBA#

25
24

BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#

23
21
19
17
15
13

DBR#

FBO

8
9

BCLKN
BCLKP

10
14
16
18
20
22

GND0
GND1
GND2
GND3
GND4
GND5

NC0
NC1

BPM0#
BPM1#
BPM2#
BPM3#
PR DY#
PREQ#

4
6

*ITP700_NC

ITP DEBUG PORT

CPUINIT# 10
CPURST# 5
DPWR#

PROCHOT#

QUANTA
COMPUTER

Dothan Processor
Title

Dothan Processor (HOST)

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

3
8

49

COMP0
COMP1
COMP2
COMP3

GTLREF0

R15
2K/F

TEST1
TEST2

C5
F23

Dothan
2 OF 3

TEST1
TEST2

T9
PAD
T47 PAD

VCCP

B2

T10 PAD
PAD
PAD
PAD
PAD

NC1

C3
AF7
AC1
E26

RSVD2
RSVD3
RSVD4
RSVD5

AC26
N1
B1
F26

VCCA3
VCCA2
VCCA1
VCCA0

CPU_VCCA
C42

C41

10U_4V

+1_5VRUN

.01U

R21

VHCORE

1
0_0603

CPU_VCCA

VHCORE
D6
D8
D18
D20
D22
E5
E7
E9
E17
E19
E21
F6
F8
F18
F20
F22
G5
G21
H6
H22
J5
J21
K22
U5
V6
V22
W5
W21
Y6
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18

VHCORE

1
2
1

10U_4V

C308

10U_4V

C304

10U_4V

C306

10U_4V

C289

10U_4V

C330

10U_4V

C332

10U_4V

C336

10U_4V

C283

10U_4V

C278

10U_4V

C333

VHCORE

C309

10U_4V

C291

10U_4V

C281

10U_4V

10U_4V

VHCORE

1
1

10U_4V

C285

10U_4V

C26

10U_4V

C335

C329

10U_4V

C307

10U_4V

C310

C284

10U_4V

VHCORE

10U_4V

10U_4V

C34

VHCORE

C280

C288

10U_4V

C302

10U_4V

C31

10U_4V

C286

10U_4V

C290

10U_4V

C334

10U_4V

C287

10U_4V

C282

10U_4V

C305

10U_4V

C303

10U_4V

C331

10U_4V

C279

VHCORE

10U_4V

VHCORE
Total caps = 1670 uF > 1430 uF (Intel Recommendation)
ESR = 9m ohm/4 // 5m ohm/35 ---> = 0.1343m ohm
VCCP

C323

C316

C317

C313

C324

.1U_10V .1U_10V .1U_10V .1U_10V .1U_10V


2

.1U_10V

C321

.1U_10V

C315

.1U_10V

C322

.1U_10V

C325

.1U_10V

C43
150U/6.3V

C314

VCCP

POWER,
GROUND,
RESERVED
SIGNALS

VCC00
VCC01
VCC02
VCC03
VCC04
VCC05
VCC06
VCC07
VCC08
VCC09
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71

VSS00
VSS01
VSS02
VSS03
VSS04
VSS05
VSS06
VSS07
VSS08
VSS09
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99

A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4

SELPSB2_CLK
SELPSB1_CLK

6,15 SELPSB2_CLK
6,15 SELPSB1_CLK

D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21
P23
W4

42
42
42
42
42
42

E2
F2
F3
G3
G4
H4

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5

Differential ProbeT3
Test Using
T4

SELPSB2_CLK R26
SELPSB1_CLK
R27

AE7
AF6

PAD
PAD

1
1
R32

PSI

0
2 BSEL0 C16
2 BSEL1 C14
0
*0_NC
2
1
E1
R33
*0_NC

11,15,42 STP_CPU#

NO PSI (Power Saving


Indicator )

R26

DothanA

DothanB

NC

Install

R6
R22
R25
T3
T5
T21
T23
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22

Dothan
3 OF 3

VID

QUANTA
COMPUTER

Title

W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24

VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
POWER, GROUND AND NC VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VCCQ0
VSS147
VCCQ1
VSS148
VSS149
VSS150
VID0
VSS151
VID1
VSS152
VID2
VSS153
VID3
VSS154
VID4
VSS155
VID5
VSS156
VSS157
VSS158
VSS159
VSS160
VCCSENSE
VSS161
VSSSENSE
VSS162
VSS163
VSS164
VSS165
BSEL0
VSS166
BSEL1
VSS167
VSS168
VSS169
PSI
VSS170
VSS171
VSS100
VSS172
VSS101
VSS173
VSS102
VSS174
VSS103
VSS175
VSS104
VSS176
VSS105
VSS177
VSS106
VSS178
VSS107
VSS179
VSS108
VSS180
VSS109
VSS181
VSS110
VSS182
VSS111
VSS183
VSS112
VSS184
VSS113
VSS185
VSS114
VSS186
VSS115
VSS187
VSS116
VSS188
VSS117
VSS189
VSS118
VSS190
VSS119
VSS191
VCCP0
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24

Dothan Processor

Dothan Processor (POWER)

Dothan Processor

C, mF---------ESR, mW-----------ESL, nH
1 x 150 mF-----42 mW (typ) / 2--------2.5 nH / 12
10 x 0.1 mF----16 mW (typ) / 10-------0.6 nH / 10
1

U7C

P25
P26
AB2
AB1

GTLREF0 AD26

T8
T2
T5
T6

C328

2
R16
1K/F

COMP0
COMP1
COMP2
COMP3

Z0 = 55 ohm, 25 mils
spacing for switching
signals

R212
54.9/F

18mils Trace Width of COMP0,2


5mils Trace Width of COMP1,3

10U_4V

U7B

R211
27.4/F

R19
54.9/F

R20
27.4/F

VCCP

COMP0
COMP1
COMP2
COMP3

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

4
8

49

U11A

VCCP

HXSWING

R50
100/F

R48
221/F

C72

.1U_10V

Signal voltage
level =
0.3125*VCCP.
C1a=0.1 F. C1b=0.1
F.Trace should be
10-mil wide with
20-mil spacing..

H YRCOMP
1

One pulled-down
resistor per pin.
Trace should be
10-mil wide with
20-mil spacing.

R63
24.9/F

VCCP

R51
54.9/F
C

HYSCOMP

VCCP

HYSW ING

R56
100/F

R53
221/F

C82

Signal voltage
level =
0.3125*VCCP.
C1a=0.1 F. C1b=0.1
F.Trace should be
10-mil wide with
20-mil spacing..

C1
C2
D1
T1
L1
P1

HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING

HA#[3..31] 3

G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13

HADS#
HADSTB0#
HADSTB1#
HVREF
HBNR#
HBPRI#
BREQ0#
HCPURST#

F8
B9
E13
J11
A5
D5
E7
H10

ADS#
3
HADSTB0# 3
HADSTB1# 3

HCLKINN
HCLKINP

AB1
AB2

HCLK_MCH# 15
HCLK_MCH 15

HDBSY#
HDEFER#
HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDPWR#
HDRDY#
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#
HEDRDY#
HHIT#
HHITM#
HLOCK#
HPCREQ#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HRS0#
HRS1#
HRS2#
HCPUSLP#
HTRDY#

C6
E6
H8
K3
T7
U5
G6
F7
G4
K1
R3
V3
G5
K2
R2
W4
F6
D4
D6
B3
A11
A7
D7
B8
C7
A8
A4
C5
B4
G8
B5

DBSY#
3
DEFER# 3
HDBI0#
3
HDBI1#
3
HDBI2#
3
HDBI3#
3
DPWR#
3
DRDY#
3
HDSTBN0# 3
HDSTBN1# 3
HDSTBN2# 3
HDSTBN3# 3
HDSTBP0# 3
HDSTBP1# 3
HDSTBP2# 3
HDSTBP3# 3

VCCP

R284
100/F

BNR#
BPRI#
HBREQ0#
CPURST#

HCPUSLP#_GMCH

ALVISO

Signal voltage level = 2/3 of


VCCP. One 0.1 F decoupling
capacitor should be placed 100
mils or less from GMCH pin.

HVREF

3
3
3
3

C381
.1U_10V

R276
200/F

HIT#
HITM#
HLOCK#

3
3
3

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
RS#0
RS#1
RS#2

3
3
3
3
3
3
3
3

HTRDY#

Concern about HVREF


Trace Length & Width

T77
PAD

T15
PAD

R37
1

CPUSLP# 3,10

Do not install R37 for Dothan-A and


install for Dothan-B

.1U_10V

HXRCOMP
HXSCOMP
HXSWING
H YRCOMP
HYSCOMP
HYSW ING

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HXSCOMP

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

R43
54.9/F

E4
E1
F4
H7
E2
F1
E3
D3
K7
F2
J7
J8
H6
F3
K8
H5
H1
H2
K5
K6
J4
G3
H3
J1
L5
K4
J5
P7
L7
J3
P5
L3
U7
V6
R6
R5
P3
T8
R7
R8
U8
R4
T4
T5
R1
T3
V8
U6
W6
U3
V5
W8
W7
U2
U1
Y5
Y2
V4
Y7
W1
W3
Y3
Y6
W2

VCCP

HA#[3..31]
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HD#[0..63]

R44
24.9/F

HD#[0..63]

One pulled-down
resistor per pin.
Trace should be
10-mil wide with
20-mil spacing.

HOST

HXRCOMP

Concern about Trace Length and Width

QUANTA
COMPUTER

Title

Alviso (Host)

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

5
8

49

VCCP
1

R254
2.2K
2

R286
10K

11
11
11
11

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

Y33
AA37
AB33
AC37

DMITXP0
DMITXP1
DMITXP2
DMITXP3

13 CLK_SDRAM0
13 CLK_SDRAM1
PAD T94
13 CLK_SDRAM3
13 CLK_SDRAM4
PAD T89

AM33
AL1
CLK_SDRAM2 AE11
AJ34
AF6
CLK_SDRAM5 AC10

SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5

13 CLK_SDRAM0#
13 CLK_SDRAM1#
PAD T90
13 CLK_SDRAM3#
13 CLK_SDRAM4#
PAD T91

AN33
AK1
CLK_SDRAM2# AE10
AJ33
AF5
CLK_SDRAM5# AD10

SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#

CKE0
CKE1
CKE2
CKE3

13,14
13,14
13,14
13,14

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

CKE0
CKE1
CKE2
CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

R314
*40.2/F_NC

13,14
13,14
13,14
13,14

M_ODT0
M_ODT1
M_ODT2
M_ODT3
M_RCOMPN
M_RCOMPP

SMDDR_VREF

*40.2/F_NC

SMXSLEW
SMYSLEW

1
T48
T67
T49
T71
T75

PAD
PAD
PAD
PAD
PAD

Low=DMIx2
High=DMIx4
+2.5VRUN

*1K_NC
*1K_NC
T138

PAD

VCCP

TV_COMP
TV_Y/G
TV_C/R
R241
1
R248
1
R243
1

1
150/F
2
150/F
2
150/F
2

A15
C16
A17
J18
B15
B16
B17

2
R277
4.99K/F

E24
E23
E21
D21
C20
B20
A19
B19
2 39 H21
2 39 G21
J20
2

18 CLK_DDC2
18 DAT_DDC2
R267 *150/F_NC
18,38 VGA_BLU
1
2
R251
*150/F_NC
18,38 VGA_GRN
1
2
R242
*150/F_NC
18,38 VGA_RED
1
2
R275 1
18 VGAVSYNC
R274 1
18 VGAHSYNC
1

AN16
AM14
AH15
AG16

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

AF22
AF16

SM_OCDCOMP0
SM_OCDCOMP1

AP14
AL15
AM11
AN10

SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

AK10
AK11
AF37
AD1
AE27
AE28
AF9
AF10

SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT

BM_BUSY#
EXT_TS0#
EXT_TS1#
THRMTRIP#
PWROK
RSTIN#
DREF_CLKN
DREF_CLKP
DREF_SSCLKN
DREF_SSCLKP
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11

J23
J21
H22
F5
AD30
AE29
A24
A23
C37
D37
AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37

PLTRST#_R

1
R312

DOT96# 15
DOT96 15

17 TXLCLKOUT17 TXLCLKOUT+

B30
B29
C25
C24

LACLKN
LACLKP
LBCLKN
LBCLKP

TP_NC1
TP_NC2
TP_NC3
TP_NC4
TP_NC5
TP_NC6
TP_NC7
TP_NC8
TP_NC9
TP_NC10
TP_NC11

17
17
17

TXLOUT0TXLOUT1TXLOUT2-

B34
B33
B32

LADATAN0
LADATAN1
LADATAN2

17
17
17

TXLOUT0+
TXLOUT1+
TXLOUT2+

A34
A33
B31

LADATAP0
LADATAP1
LADATAP2

C29
D28
C27

LBDATAN0
LBDATAN1
LBDATAN2

C28
D27
C26

LBDATAP0
LBDATAP1
LBDATAP2

BIA_PWM
FPBACK

17 DDC_CLK
17 DDC_DATA
17,26
FPVCC
1

THERMTRIP_GMCH# 31
IMVP_PWRGD 11,39,42
PLTRST# 10,11,16,19,25

2
100

DOT96#
DOT96

2
R247
1.5K/F

REFCLK/SSCLK
DREFSSCLK#_R
DREFSSCLK_R

T40 PAD
T39 PAD
T42 PAD
T98 PAD
T41 PAD
T97 PAD
T16 PAD
T17 PAD
T12 PAD
T14 PAD
T13 PAD

RP2
1
3

DREFSSCLK#_R
DREFSSCLK_R

2
4

DREFSSCLK# 17
DREFSSCLK 17

EXP_COMPI
EXP_ICOMPO

D36
D34

EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34

EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34

EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36

SDVOB_R-_C
SDVOB_G-_C
SDVOB_B-_C
SDVOB_CLK-_C

EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36

SDVOB_R+_C
SDVOB_G+_C
SDVOB_B+_C
SDVOB_CLK+_C

24.9/F
2

SDVOB_INT- 16

SDVOB_INT+ 16

RP12
DREFSSCLK#_R
DREFSSCLK_R

Place these 2 Caps near


Alviso SMVREF pins.

3
1

4
2

DOT100#_SS 15
DOT100_SS 15

4P2R-S-0

Populate RP2 if using CK-SSCD.


Populate Rp12 if using CK410M

SDVOB_R-_C
SDVOB_G-_C
SDVOB_B-_C
SDVOB_CLK-_C

C67
C49
C69
C51

1
1
1
1

2
2
2
2

.1U_10V
.1U_10V
.1U_10V
.1U_10V

SDVOB_R+_C
SDVOB_G+_C
SDVOB_B+_C
SDVOB_CLK+_C

C66
C48
C68
C50

1
1
1
1

2
2
2
2

.1U_10V
.1U_10V
.1U_10V
.1U_10V

+2.5VRUN

+1_8VSUS

R326
80.6/F
2

R268
VCC3G_PCIE_R 1

ALVISO

*4P2R-S-0_NC

C715
.1U_10V

DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET

LBKLT_CTRL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

PM_BMBUSY# 11

PM_EXTTS#0
PM_EXTTS#1

SMDDR_VREF

R282
1

10K

R283
1

10K

PM_EXTTS#0

PM_EXTTS#1

SDVOB_R- 16
SDVOB_G- 16
SDVOB_B- 16
SDVOB_CLK- 16
SDVOB_R+ 16
SDVOB_G+ 16
SDVOB_B+ 16
SDVOB_CLK+ 16

SDVO Output

M_RCOMPN
M_RCOMPP

For Memory throttling

TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC

E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27

25
17

ALVISO

C714
.1U_10V

SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP

R285
255/F
56

NC

R315
2

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

R273
*2.2K_NC

H24
H25
AB29
AC29

SDVO_CTRLDATA
SDVO_CTRLCLK
CLK_MCH_3GPLL#
CLK_MCH_3GPLL

R49

M_OCDCOMP0
M_OCDCOMP1

AP21
AM21
AH21
AK21

T59 PAD
T53 PAD
T74 PAD

18,38
18,38
18,38

16
16
15
15

LVDS

13,14
13,14
13,14
13,14

T66 PAD
T68 PAD

DMITXN0
DMITXN1
DMITXN2
DMITXN3

SELPSB1_CLK 4,15
SELPSB2_CLK 4,15

AA33
AB37
AC33
AD37

CFG0
SELPSB1_CLK
SELPSB2_CLK
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
R269
CFG19
R271
CFG20

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

CFG/RSVD

11
11
11
11

PM

DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3

LCK

Y31
AA35
AB31
AC35

DMI

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25

VGA

11
11
11
11

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

TV

DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3

DDR MUXING

AA31
AB35
AC31
AD35

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

U11F

MISC

11
11
11
11

VCC3G_PCIE

Low=DDR2
High=DDR1

U11C

PCI-EXPRESS GRAPHICS

CFG[2:0]
001=FSB533
010=FSB800
101=FSB400

CFG6

R318
80.6/F

QUANTA
COMPUTER

External Thermal Sensor Input


Title

Alviso (VGA,DMI)

On-Die OCD driver


compensation (DDR2 only)

Size
CustomDocument Number
Tahiti(DM3L)
Date:

, 29, 2005
7

R ev
1A
Sheet

of

6
8

49

13 R_B_MD[0..63]

AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5

SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63

DDR SYSTEM MEMORY A

U11B
R_A_MD0
R_A_MD1
R_A_MD2
R_A_MD3
R_A_MD4
R_A_MD5
R_A_MD6
R_A_MD7
R_A_MD8
R_A_MD9
R_A_MD10
R_A_MD11
R_A_MD12
R_A_MD13
R_A_MD14
R_A_MD15
R_A_MD16
R_A_MD17
R_A_MD18
R_A_MD19
R_A_MD20
R_A_MD21
R_A_MD22
R_A_MD23
R_A_MD24
R_A_MD25
R_A_MD26
R_A_MD27
R_A_MD28
R_A_MD29
R_A_MD30
R_A_MD31
R_A_MD32
R_A_MD33
R_A_MD34
R_A_MD35
R_A_MD36
R_A_MD37
R_A_MD38
R_A_MD39
R_A_MD40
R_A_MD41
R_A_MD42
R_A_MD43
R_A_MD44
R_A_MD45
R_A_MD46
R_A_MD47
R_A_MD48
R_A_MD49
R_A_MD50
R_A_MD51
R_A_MD52
R_A_MD53
R_A_MD54
R_A_MD55
R_A_MD56
R_A_MD57
R_A_MD58
R_A_MD59
R_A_MD60
R_A_MD61
R_A_MD62
R_A_MD63

SA_BS0#
SA_BS1#
SA_BS2#

AK15
AK16
AL21

R_A_BS0#
R_A_BS1#
R_A_BS2#

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

AJ37
AP35
AL29
AP24
AP9
AP4
AJ2
AD3

R_A_DM0
R_A_DM1
R_A_DM2
R_A_DM3
R_A_DM4
R_A_DM5
R_A_DM6
R_A_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

AK36
AP33
AN29
AP23
AM8
AM4
AJ1
AE5

R_A_DQS0
R_A_DQS1
R_A_DQS2
R_A_DQS3
R_A_DQS4
R_A_DQS5
R_A_DQS6
R_A_DQS7

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

AK35
AP34
AN30
AN23
AN8
AM5
AH1
AE4

R_A_DQS#0
R_A_DQS#1
R_A_DQS#2
R_A_DQS#3
R_A_DQS#4
R_A_DQS#5
R_A_DQS#6
R_A_DQS#7

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

AL17
AP17
AP18
AM17
AN18
AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15

R_A_MA0
R_A_MA1
R_A_MA2
R_A_MA3
R_A_MA4
R_A_MA5
R_A_MA6
R_A_MA7
R_A_MA8
R_A_MA9
R_A_MA10
R_A_MA11
R_A_MA12
R_A_MA13

SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#

AN15 R_A_SCASA#
AP16 R_A_SRASA#
AF29
PAD
AF28
AP15 R_A_BMWEA#

U11G
R_B_MD0
R_B_MD1
R_B_MD2
R_B_MD3
R_B_MD4
R_B_MD5
R_B_MD6
R_B_MD7
R_B_MD8
R_B_MD9
R_B_MD10
R_B_MD11
R_B_MD12
R_B_MD13
R_B_MD14
R_B_MD15
R_B_MD16
R_B_MD17
R_B_MD18
R_B_MD19
R_B_MD20
R_B_MD21
R_B_MD22
R_B_MD23
R_B_MD24
R_B_MD25
R_B_MD26
R_B_MD27
R_B_MD28
R_B_MD29
R_B_MD30
R_B_MD31
R_B_MD32
R_B_MD33
R_B_MD34
R_B_MD35
R_B_MD36
R_B_MD37
R_B_MD38
R_B_MD39
R_B_MD40
R_B_MD41
R_B_MD42
R_B_MD43
R_B_MD44
R_B_MD45
R_B_MD46
R_B_MD47
R_B_MD48
R_B_MD49
R_B_MD50
R_B_MD51
R_B_MD52
R_B_MD53
R_B_MD54
R_B_MD55
R_B_MD56
R_B_MD57
R_B_MD58
R_B_MD59
R_B_MD60
R_B_MD61
R_B_MD62
R_B_MD63

R_A_BS0# 13,14
R_A_BS1# 13,14
R_A_BS2# 13,14
R_A_DM[0..7] 13

R_A_DQS[0..7] 13

R_A_DQS#[0..7] 13

R_A_MA[0..13] 13,14

R_A_SCASA# 13,14
R_A_SRASA# 13,14
T123
R_A_BMWEA# 13,14

ALVISO

AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AJ9
AK9
AJ7
AK6
AJ4
AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5

SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

DDR SYSTEM MEMORY B

13 R_A_MD[0..63]

SB_BS0#
SB_BS1#
SB_BS2#

AJ15
AG17
AG21

R_B_BS0#
R_B_BS1#
R_B_BS2#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

AF32
AK34
AK27
AK24
AJ10
AK5
AE7
AB7

R_B_DM0
R_B_DM1
R_B_DM2
R_B_DM3
R_B_DM4
R_B_DM5
R_B_DM6
R_B_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

AF34
AK32
AJ28
AK23
AM10
AH6
AF8
AB4

R_B_DQS0
R_B_DQS1
R_B_DQS2
R_B_DQS3
R_B_DQS4
R_B_DQS5
R_B_DQS6
R_B_DQS7

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5

R_B_DQS#0
R_B_DQS#1
R_B_DQS#2
R_B_DQS#3
R_B_DQS#4
R_B_DQS#5
R_B_DQS#6
R_B_DQS#7

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15

R_B_MA0
R_B_MA1
R_B_MA2
R_B_MA3
R_B_MA4
R_B_MA5
R_B_MA6
R_B_MA7
R_B_MA8
R_B_MA9
R_B_MA10
R_B_MA11
R_B_MA12
R_B_MA13

SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#

R_B_BS0# 13,14
R_B_BS1# 13,14
R_B_BS2# 13,14
R_B_DM[0..7] 13

R_B_DQS[0..7] 13

R_B_DQS#[0..7] 13

R_B_MA[0..13] 13,14

AH14 R_B_SCASA#
AK14 R_B_SRASA#
AF15
PAD
AF14
AH16 R_B_BMWEA#

R_B_SCASA# 13,14
R_B_SRASA# 13,14
T124
R_B_BMWEA# 13,14

ALVISO

QUANTA
COMPUTER

Title

Alviso (DDR)

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

7
8

49

C346
.022U

R231
1

0
2

1
2

C345
.1U_10V

*10U_4V_NC

RB751V

C723

10

VCCA_CRTDAC

C353
*22nF_3P_NC

C380
.1U_10V

VCCP

+2.5VRUN

C60
1

.47U_10V
VCCP_GMCH_CAP1
2

1.05V(VTT - FSB POWER SUPPLY)


VCCP

C59
C409
2.2U_6.3V

C54
4.7U_10V_0805

.47U_10V
2

.22U_10V VCCP_GMCH_CAP2
VCCP_GMCH_CAP3
2

C84
C73

.22U_10V
VCCP_GMCH_CAP4
1
2
4

2
1

1
BLM18PG181SN1

+3VRUN

L30

0
2

1
2
L15

VCCQ_TVDAC

C64

.022U

C61
*22nF_3P_NC

+3VRUN

2
0
2

3
+1_8VSUS

10
1

D6
RB751V

C342
.1U_10V

R38
1

VCCQ_TVDAC_R

C347

.022U

C428 .1U_10V
1
2

2.2U_6.3V

2
3

C352
*22nF_3P_NC

C47
.1U_10V

VCCD_TVDAC
1

C415 .1U_10V
1
2

.022U

R35
2

V1.8_DDR_CAP2

VCCD_TVDAC_R

0
2

V1.8_DDR_CAP1

C58
*22nF_3P_NC

1
1

R227
1

L13
2
1
+3VRUN
BLM18PG181SN1
C716

VCC_TVBG
C46

+3VRUN

C343
.1U_10V

3
VSS_TVBG

C53
10U_4V

1
BLM18PG181SN1

R36
1

.022U

C351
*22nF_3P_NC

C344

1
2

C367
.1U_10V

C425 .1U_10V
1
2

V1.8_DDR_CAP5

C52
.1U_10V

VCC_TVDACC
1

1
C361
.1U_10V

1
2

2
2

1
2

+2.5VRUN

C107
10U_4V

C106
10U_4V

1
BLM18PG181SN1

+1_5VRUN

C63
.1U_10V

Note: Choose the Inductor with Low-DC loss and


High-Impedance at over 100MHz to isolate
SSN/SN(Switch Noise) from other aggressor .
L20
VCC_DDRDLL

1
+1_5VRUN
BLM18PG330SN1

C412
.1U_10V

+ C110
100U

Note: All VCCSM pins


shorted internally.

VCC3G_PCIE
L34

V1.8_DDR_CAP6
V1.8_DDR_CAP3
V1.8_DDR_CAP4

1
+1_5VRUN
BLM18PG330SN1

+ C74
150U_2V_L

R278

C423 .1U_10V
1
2
C91
1

C77
10U_4V

.1U_10V
2

C76
10U_4V

C422
1

VCC3G_PCIE

Note: All VCCSM pins


shorted internally.

VCCA_3GPLL

.1U_10V
2

C408
.1U_10V

L33
2

VCCA_3GPLL_R 2

1
+1_5VRUN
BLM18PG181SN1

0.5/F
C376
10U_4V

+2.5VRUN

VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3

AF20
AP19
AF19
AF18

VCC_DDRDLL

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

AE37
W37
U37
R37
N37
L37
J37

VCC3G_PCIE

VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2

Y29
Y28
Y27

VCCA_3GPLL

VCCA_3GBG
VSSA_3GBG

F37
G37

0
2

VCC_TVBG_R

B28
A28
A27

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

.022U

1
2
1
2

VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51

C62
*22nF_3P_NC

R226
1

+2.5VRUN
C355

C65

+ C96
150U_2V_L

L31
2
1
BLM18PG181SN1
R230
1 2

K13
J13
K12
W11
V11
U11
T11
R11
P11
N11
M11
L11
K11
W10
V10
U10
T10
R10
P10
N10
M10
K10
J10
Y9
W9
U9
R9
P9
N9
M9
L9
J9
N8
M8
N7
M7
N6
M6
A6
N5
M5
N4
M4
N3
M3
N2
M2
B2
V1
N1
M1
G1

VCC_TVDACC_R

.01U

+3VRUN

C45
10U_4V

1
C90
.1U_10V
2

1
D16

VCC_SYNC

C363
.1U_10V

1
BLM18PG181SN1

L14

+1_5VRUN

C338
.1U_10V

VCC_TVDACB

VCCA_MPLL

2
VCCP

H20

AM37
AH37
AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9
AP8
AM1
AE1

.022U

0
2

+ C86
150U_2V_L
2

1
2

C88
.1U_10V

1
BLM11A121S

+2.5VRUN

VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC

1
BLM11A121S

L19
2

F19
E19
G19

R39
1

C339

C373
.1U_10V

VCCA_3GBG
C57
4.7U_10V_0805

+2.5VRUN
1

VCCA_CRTDAC_R

ALL PLL POWER


Needs To Have
Clear Power(No
Any Noise)

L18

VCCH_MPLL1
VCCH_MPLL0
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

U11H
ALVISO

C340
*22nF_3P_NC

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64

VCC_TVDACA

VSSA_3GBG

VCCA_HPLL

AC2
AC1
B23
C35
AA1
AA2

B22
B21
A21

L29

+ C341
470U_4V
2

C368
.1U_10V

A35

VCCHV0
VCCHV1
VCCHV2

10uH

VCCA_LVDS

0
2

VCCA_DPLLB

1
1

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

B26
B25
A25

VCC_TVDACB_R

L16

VCCD_TVDAC_R
VCCQ_TVDAC_R

1
+ C44
470U_4V
2

C366
.1U_10V

D19
H17

VCCA_DPLLA

10uH

VCCD_TVDAC
VCCDQ_TVDAC

L12

VCC_TVBG_R
VSS_TVBG

R219
1

VCC_TVDACC_R

+1_5VRUN

H18
G18

VCC_TVDACA_R

VCCA_TVBG
VSSA_TVBG

VCC_TVDACB_R

C56
10U_4V

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCC_TVDACA_R

C78
10U_4V

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48

F17
E17
D18
C18
F18
E18

1
C55
10U_4V

1
C388
.1U_10V

C385
.1U_10V

1
2

C393
.1U_10V

T29
R29
N29
M29
K29
J29
V28
U28
T28
R28
P28
N28
M28
L28
K28
J28
H28
G28
V27
U27
T27
R27
P27
N27
M27
L27
K27
J27
H27
K26
H26
K25
J25
K24
K23
K22
K21
W20
U20
T20
K20
V19
U19
K19
W18
V18
T18
K18
K17

POWER

VCCP

C354
.1U_10V

ALL PLL POWER


Needs To Have
Clear Power(No
Any Noise)
Title

VCCA_3GBG
VSSA_3GBG

QUANTA
COMPUTER
Alviso (Power)

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

R ev
1A
Sheet
1

of

49

U11D
ALVISO

5
4
3

VTT_NCTF17
VTT_NCTF16
VTT_NCTF15
VTT_NCTF14
VTT_NCTF13
VTT_NCTF12
VTT_NCTF11
VTT_NCTF10
VTT_NCTF9
VTT_NCTF8
VTT_NCTF7
VTT_NCTF6
VTT_NCTF5
VTT_NCTF4
VTT_NCTF3
VTT_NCTF2
VTT_NCTF1
VTT_NCTF0

VSS_NCTF68
VSS_NCTF67
VSS_NCTF66
VSS_NCTF65
VSS_NCTF64
VSS_NCTF63
VSS_NCTF62
VSS_NCTF61
VSS_NCTF60
VSS_NCTF59
VSS_NCTF58
VSS_NCTF57
VSS_NCTF56
VSS_NCTF55
VSS_NCTF54
VSS_NCTF53
VSS_NCTF52
VSS_NCTF51
VSS_NCTF50
VSS_NCTF49
VSS_NCTF48
VSS_NCTF47
VSS_NCTF46
VSS_NCTF45
VSS_NCTF44
VSS_NCTF43
VSS_NCTF42
VSS_NCTF41
VSS_NCTF40
VSS_NCTF39
VSS_NCTF38
VSS_NCTF37
VSS_NCTF36
VSS_NCTF35
VSS_NCTF34
VSS_NCTF33
VSS_NCTF32
VSS_NCTF31
VSS_NCTF30
VSS_NCTF29
VSS_NCTF28
VSS_NCTF27
VSS_NCTF26
VSS_NCTF25
VSS_NCTF24
VSS_NCTF23
VSS_NCTF22
VSS_NCTF21
VSS_NCTF20
VSS_NCTF19
VSS_NCTF18
VSS_NCTF17
VSS_NCTF16
VSS_NCTF15
VSS_NCTF14
VSS_NCTF13
VSS_NCTF12
VSS_NCTF11
VSS_NCTF10
VSS_NCTF9
VSS_NCTF8
VSS_NCTF7
VSS_NCTF6
VSS_NCTF5
VSS_NCTF4
VSS_NCTF3
VSS_NCTF2
VSS_NCTF1
VSS_NCTF0

L12
M12
N12
P12
R12
T12
U12
V12
W12
L13
M13
N13
P13
R13
T13
U13
V13
W13

Y12
AA12
Y13
AA13
L14
M14
N14
P14
R14
T14
U14
V14
W14
Y14
AA14
AB14
L15
M15
N15
P15
R15
T15
U15
V15
W15
Y15
AA15
AB15
L16
M16
N16
P16
R16
T16
U16
V16
W16
Y16
AA16
AB16
R17
Y17
AA17
AB17
AA18
AB18
AA19
AB19
AA20
AB20
R21
Y21
AA21
AB21
Y22
AA22
AB22
Y23
AA23
AB23
Y24
AA24
AB24
Y25
AA25
AB25
Y26
AA26
AB26
U11E
ALVISO

VCCSM_NCTF31
VCCSM_NCTF30
VCCSM_NCTF29
VCCSM_NCTF28
VCCSM_NCTF27
VCCSM_NCTF26
VCCSM_NCTF25
VCCSM_NCTF24
VCCSM_NCTF23
VCCSM_NCTF22
VCCSM_NCTF21
VCCSM_NCTF20
VCCSM_NCTF19
VCCSM_NCTF18
VCCSM_NCTF17
VCCSM_NCTF16
VCCSM_NCTF15
VCCSM_NCTF14
VCCSM_NCTF13
VCCSM_NCTF12
VCCSM_NCTF11
VCCSM_NCTF10
VCCSM_NCTF9
VCCSM_NCTF8
VCCSM_NCTF7
VCCSM_NCTF6
VCCSM_NCTF5
VCCSM_NCTF4
VCCSM_NCTF3
VCCSM_NCTF2
VCCSM_NCTF1
VCCSM_NCTF0

VCC_NCTF78
VCC_NCTF77
VCC_NCTF76
VCC_NCTF75
VCC_NCTF74
VCC_NCTF73
VCC_NCTF72
VCC_NCTF71
VCC_NCTF70
VCC_NCTF69
VCC_NCTF68
VCC_NCTF67
VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF63
VCC_NCTF62
VCC_NCTF61
VCC_NCTF60
VCC_NCTF59
VCC_NCTF58
VCC_NCTF57
VCC_NCTF56
VCC_NCTF55
VCC_NCTF54
VCC_NCTF53
VCC_NCTF52
VCC_NCTF51
VCC_NCTF50
VCC_NCTF49
VCC_NCTF48
VCC_NCTF47
VCC_NCTF46
VCC_NCTF45
VCC_NCTF44
VCC_NCTF43
VCC_NCTF42
VCC_NCTF41
VCC_NCTF40
VCC_NCTF39
VCC_NCTF38
VCC_NCTF37
VCC_NCTF36
VCC_NCTF35
VCC_NCTF34
VCC_NCTF33
VCC_NCTF32
VCC_NCTF31
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28
VCC_NCTF27
VCC_NCTF26
VCC_NCTF25
VCC_NCTF24
VCC_NCTF23
VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF19
VCC_NCTF18
VCC_NCTF17
VCC_NCTF16
VCC_NCTF15
VCC_NCTF14
VCC_NCTF13
VCC_NCTF12
VCC_NCTF11
VCC_NCTF10
VCC_NCTF9
VCC_NCTF8
VCC_NCTF7
VCC_NCTF6
VCC_NCTF5
VCC_NCTF4
VCC_NCTF3
VCC_NCTF2
VCC_NCTF1
VCC_NCTF0

VSS135
VSS134
VSS133
VSS132
VSS131
VSS130
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VSS0

VSS271
VSS270
VSS269
VSS268
VSS267
VSS266
VSS265
VSS264
VSS263
VSS262
VSS261
VSS260
VSS259
VSS258
VSS257
VSS256
VSS255
VSS254
VSS253
VSS252
VSS251
VSS250
VSS249
VSS248
VSS247
VSS246
VSS245
VSS244
VSS243
VSS242
VSS241
VSS240
VSS239
VSS238
VSS237
VSS236
VSS235
VSS234
VSS233
VSS232
VSS231
VSS230
VSS229
VSS228
VSS227
VSS226
VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS210
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS203
VSS202
VSS201
VSS200
VSS199
VSS198
VSS197
VSS196
VSS195
VSS194
VSS193
VSS192
VSS191
VSS190
VSS189
VSS188
VSS187
VSS186
VSS185
VSS184
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136

VSSALVDS

B36
Y1
D2
G2
J2
AL24
AN24
A26
E26
G26
J26
B27
L2
P2
T2
V2
AD2
AE2
AH2
AL2
AN2
A3
C3
AA3
AB3
AC3
AJ3
C4
H4
L4
P4
U4
Y4
AF4
AN4
E5
W5
AL5
AP5
B6
J6
L6
P6
T6
AA6
AC6
AE6
AJ6
G7
V7
AA7
AG7
AK7
AN7
C8
E8
L8
P8
Y8
AL8
A9
H9
K9
T9
V9
AA9
AC9
AE9
AH9
AN9
D10
L10
Y10
AA10
F11
H11
Y11
AA11
AF11
AG11
AJ11
AL11
AN11
B12
D12
J12
A14
B14
F14
J14
K14
AG14
AJ14
AL14
AN14
C15
K15
A16
D16
H16
K16
AL16
C17
G17
AF17
AJ17
AN17
A18
B18
U18
AL18
C19
H19
J19
T19
W19
AG19
AN19
A20
D20
E20
F20
G20
V20
AK20
C21
F21
AF21
AN21
A22
D22
E22
J22
AH22
AL22
H23
AF23

AB12
AC12
AD12
AB13
AC13
AD13
AC14
AD14
AC15
AD15
AC16
AD16
AC17
AD17
AC18
AD18
AC19
AD19
AC20
AD20
AC21
AD21
AC22
AD22
AC23
AD23
AC24
AD24
AC25
AD25
AC26
AD26

L17
M17
N17
P17
T17
U17
V17
W17
L18
M18
N18
P18
R18
Y18
L19
M19
N19
P19
R19
Y19
L20
M20
N20
P20
R20
Y20
L21
M21
N21
P21
T21
U21
V21
W21
L22
M22
N22
P22
R22
T22
U22
V22
W22
L23
M23
N23
P23
R23
T23
U23
V23
W23
L24
M24
N24
P24
R24
T24
U24
V24
W24
L25
M25
N25
P25
R25
T25
U25
V25
W25
L26
M26
N26
P26
R26
T26
U26
V26
W26

B24
D24
F24
J24
AG24
AJ24
E27
G27
W27
AA27
AB27
AF27
AG27
AJ27
AL27
AN27
E28
W28
AA28
AB28
AC28
A29
D29
E29
F29
G29
H29
L29
P29
U29
V29
W29
AA29
AD29
AG29
AJ29
AM29
C30
Y30
AA30
AB30
AC30
AE30
AP30
D31
E31
F31
G31
H31
J31
K31
L31
M31
N31
P31
R31
T31
U31
V31
W31
AD31
AG31
AL31
A32
C32
Y32
AA32
AB32
AC32
AD32
AJ32
AN32
D33
E33
F33
G33
H33
J33
K33
L33
M33
N33
P33
R33
T33
U33
V33
W33
AD33
AF33
AL33
C34
AA34
AB34
AC34
AD34
AH34
AN34
B35
D35
E35
F35
G35
H35
J35
K35
L35
M35
N35
P35
R35
T35
U35
V35
W35
Y35
AE35
C36
AA36
AB36
AC36
AD36
AE36
AF36
AJ36
AL36
AN36
E37
H37
K37
M37
P37
T37
V37
Y37
AG37

5
3
2

VCCP

Title

Size
Document Number
Tahiti(DM3L)

Date:
, 29, 2005
Sheet
1

VSS

C
C

All NCTF Pin is to enchance the


solder Joint Characteristic
Thermal Expansion (CTE) mismatch
of the Die to package interface.

NCTF
B

VCCP
+1_8VSUS

A
A

QUANTA
COMPUTER

Alviso (VSS,NCTF)
R ev
1A

of
49

C228 15P
2
1

R150
10M

C222 15P
2
1

31 SM_INTRUDER#

R153
100K

RTCX1
RTCX2

RTC_RST#

AA2

RTCRST#

SM_INTRUDER#

AA3
AA5

INTRUDER#
INTVRMEN

C227
1U_10V

LAD0
LAD1/FB1
LAD2/FB2
LAD3/FB3
LDRQ0#
LDRQ1#/GPI41
LFRAME#

P2
N3
N5
N4
N6
P4
P3

LAD0/FWH0 25
LAD1/FWH1 25
LAD2/FWH2 25
LAD3/FWH3 25
LPC_DRQ0# 26
LPC_DRQ1# 25
LFRAME#/FWH4 25

LPC_DRQ0#
LPC_DRQ1#

11
ICH6_GPI7
11,21,25 SERIRQ
+3VRUN

SERIRQ

PME#
PCICLK
PCIRST#
PLTRST#
CLKRUN#/GPIO32

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

AD14
AF15
AF14
AD12
AE14
AC11
AD11
AB11
AE13
AF13
AB12
AB13
AC13
AE15
AG15
AD13

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

2
PLTRST#_1

7SH32

21,23,35 AD[0..31]

ICH_PME#

PCLK_ICH
2

21,23,35 PCIRST#
21,23,25,35 CLKRUN#
R422
*33_NC
2 1

1
10K

C546
*18P_NC

X1,X2 Docking
IAC_SYNC Port X Line

1
0

R144
STUFF

1X2,2X1

UNSTUFF

4X1

PDCS1# AD16
PDCS3# AE17
PDA0
AC16
PDA1
AB17
PDA2
AC17
PDIOR# AE16
PDIOW# AC14
PIO RDY AF16
IRQ14
AB16
PDDREQ AB14
PDDACK# AB15

+3VRUN

R144
*1K_NC
1

R143 39
1
IAC_SYNC

R142 39

R135
*47_NC

J3
A3
J2
C3
J1
E1
G5
E3
C5

PLOCK#

FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PAR
SERR#
PERR#
PLOCK#

21,23,35
21,23,35
21,23,35
21,23,35
21,23,35
21,23,35
21,23,35
21,23,35

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#/GPI40
REQ5#/GPI1
REQ6#/GPI0

L5
B5
M5
B8
F7
E8
B7

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
REQ5#
LAMP_STAT

GNT0#
GNT1#
GNT2#
GNT3#
GNT4#/GPO48
GNT5#/GPO17
GNT6#/GPO16

C1
B6
F1
C8
E7
F6
D8

1
*0_NC
1
*0_NC

2
R399
2
R126

CPUSLP# 3,5
DPRSTP# 3

PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPI2
PIRQF#/GPI3
PIRQG#/GPI4
PIRQH#/GPI5

N2
L2
M1
L3
D9
C7
C6
M3

AE3
AD3
AG2
AF2

SATA2_RXN
SATA2_RXP
SATA2_TXN
SATA2_TXP

AD7
AC7
AF6
AG6

PCI Pullups

+3VRUN

RP33
FRAME#
TR DY#
PLOCK#
REQ1#

R501
*10K_NC

6
7
8
9
10

+3VRUN
LAMP_STAT

5
4
3
2
1

+3VRUN

RP34

REQ3#
REQ4#

PIRQD#
PIRQA#
REQ2#

21

REQ1 : Card Bus


23 REQ3 : MINI PCI
35 REQ4 : BCM4401 LAN

SERR#
REQ5#
REQ4#

10P8R-8.2K

PCI Pullups

REQ1#

6
7
8
9
10

+3VRUN

5
4
3
2
1

PIRQC#
PIRQB#
REQ0#
STOP#

LAMP_STAT 17

GNT3#
GNT4#

GNT1#

21

GNT3#
GNT4#

23
35

PIRQA#
PIRQB#
PIRQC#
PIRQD#
ICH_GPIO2
ICH_GPIO3
ICH_GPIO4
ICH_GPIO5

PIRQA#
PIRQB#
PIRQC#
PIRQD#

AC19

SATA0_RXN
SATA0_RXP
SATA0_TXN
SATA0_TXP

+3VRUN

10P8R-8.2K
GNT1#

R421 NP boot from FWH,


populate boot from
MiniPCI.
1
R421

2
*1K_NC

23
21,35
21,23

+3VRUN
RP7
ICH_GPIO2
ICH_GPIO3
ICH_GPIO4
ICH_GPIO5
FERR#

7
5
3
1
1

8
6
4
2

8P4R-8.2K
2

R128

VCCP

56

SATA_LED# 32
C

SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C

Distance between the ICH-6 M and cap


on the "P" signal should be identical
distance between the ICH-6 M and cap
on the "N" signal for same pair.

PAD T45
PAD T44

AC2
AC1
AG11
AF11

CLK_PCIE_SATA# 15
CLK_PCIE_SATA 15
R412
SATABIAS 1

SATA_RXN0_C

24.9/F
2

SATA_RXN0_C 19

SATA_RXP0_C

SATA_RXP0_C 19

Place within 500mils of ICH6 ball


ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#

C10
IAC_SYNC
B9
A10 IAC_RESET#

IAC_BITCLK_ICH 33

ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ACZ_SDO

F11
F10
B10
C9 IAC_SDATAO

IAC_SDATAIN0 33
IAC_SDATAIN1 24
PAD T43

SATA_TXN0_C

C226 3900P
1
2

SATA_TXN0 19

SATA_TXP0_C

C225 3900P
1
2

SATA_TXP0 19

SATA
D

IAC_SDATAO_MDC 24

R138
2

39
1

R136
2

39
1

QUANTA
COMPUTER

IAC_RESET#_MDC 24

IAC_RESET#

IAC_RESET#_AUDIO 33
1

IAC_SDATAO_AUDIO 33

C212
*10P_NC

FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PAR
SERR#
PERR#
PLOCK#

C209
*22P_NC

1
1

DCS1#
DCS3#
DA0
DA1
DA2
DIOR#
DIOW#
IORDY
IDEIRQ
DDREQ
DDACK#

R141 39
2
1

AC97-MDC & AUDIO

21,23,35
21,23,35
21,23,35
21,23,35

SATARBIAS#
SATARBIAS

IAC_SDATAO

C216
*10P_NC

C/BE0#
C/BE1#
C/BE2#
C/BE3#

SATA_CLKN
SATA_CLKP

R140 39
2
1

2 1

2
1

1
2

C214
22P

33 IAC_SYNC_AUDIO

Install R399 for Dothan-A and don't


install for Dothan-B

ICH6-M

IAC_BITCLK_ICH

J6
H6
G4
G2

SATALED#

24 IAC_SYNC_MDC

DPSLP#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

PCI

IDE

AC-Terminator

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

2
R133

+3VRUN

R_CPUSLP#

C213
10P

C211
*10P_NC

Title

25

1 R130
2
75
SMI#
3
STPCLK# 3

*56_NC

CPUPWRGD 3 VCCP
THERMTRIP#_ICH

AG25
AE22
AE23
AG27
AE26
AE27
AD27
AE24

PCIRST#
PLTRST#_1

P6
G6
R2
R5
AF19

.047U

U17

15

Install R126 for Dothan-B and don't


install for Dothan-A
E2
E5
C2
F5
F3
E9
F2
D6
E6
D3
A2
D2
D5
H3
B4
J5
K2
K5
D4
L6
G3
H4
H2
H5
B3
M6
B2
K6
K3
A5
L1
K4

C215
2
1

6,11,16,19,25 PLTRST#

CPU

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

+3VSUS

Reset Circuit
(NB/PCI/PCIE)

CPUPWRGD/GPO49
INIT3_3V#
THRMTRIP#
SMI#
STPCLK#
CPUSLP#
DPSLP#/TP[2]
DPRSLP#/TP[4]

VCCP

PDDREQ
PDIOW#
PDIOR#
PIO RDY
PDDACK#
IRQ14
PDA1
PDA0
PDCS1#
PDA2
PDCS3#

PDDREQ
PDIOW#
PDIOR#
PIORDY
PDDACK#
IRQ14
PDA1
PDA0
PDCS1#
PDA2
PDCS3#

NMI
A20M#
FERR#
IGNNE#
INTR
INIT#
RCIN#
A20GATE

SATA

1
R127

AF25
AF23
2R_FERR# AF24
56
AG26
AG24
AF27
AD23
AF22

AC-97/
AZALIA

NMI
A20M#
FERR#
IGNNE#
INTR
CPUINIT#
RCIN#
GATEA20

IRD Y#
DEVSEL#
PERR#
IRQ14

10P8R-8.2K
DPRSTP#

2
19
19
19
19
19
19
19
19
19
19
19

PDD[0..15]

PDD[0..15]

5
4
3
2
1

R125
3
3
3
3
3
3
25
26

SM_INTRUDER#

19

+3VRUN

RP9
6
7
8
9
10

REQ3#
Y1
Y2

CLK_32KX2

20K/F

PCI Pullups
U16A

RTC

R154

32.768KHZ
W2

LPC

VCCRTC

CLK_32KX1

ICH6-M (CPU,PCI,IDE,SATA,AC97)
C210
*10P_NC

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

10
8

49

CLK48_USB

U16B

C200
10P
19
19

USB_VD0+
USB_VD0-

For Bluetooth 30

30

USB_VD2+
USB_VD2-

32
32
32
32
32
32

USB_VD4+
USB_VD4OC4#
USB_VD6+
USB_VD6OC6#

For USB FDD

AC terminator
+3VSUS

To IO/B

RP36
7
5
3
1

8
6
4
2

PDAT_SMB
PCLK_SMB
SMB_LINK_ALERT#
SMBALERT#

15

+3VSUS
RP35
7
5
3
1

8
6
4
2

ICH _RI#
SYS_RESET#
BATLOW#

8P4R-10K

USBP0P
USBP0N
OC0#
USBP2P
USBP2N
OC2#
USBP4P
USBP4N
OC4#/GPI9
USBP6P
USBP6N
OC6#/GPI14

CLK48_USB

A27

CLK48

OC0#
OC2#
OC4#

CLK48_USB

8P4R-2.2K

OC6#

D21
C21
C27
C19
D19
B26
D17
E17
C23
D15
C15
C25

+3VRUN

R152 10K
1
2
1
2

AB24
AB23
AA27
AA26

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

6
6
6
6

6
6
6
6

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

V25
V24
U27
U26

DMI1_RXN
DMI1_RXP
DMI1_TXN
DMI1_TXP

DMI3_RXN
DMI3_RXP
DMI3_TXN
DMI3_TXP

AD25
AC25

DMI_CLKN
DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP

F24
F23

HSIN2
HSIP2
HSON2
HSOP2

M25
M24
L27
L26

HSIN3
HSIP3
HSON3
HSOP3

P24
P23
N27
N26

PCLK_SMB
PDAT_SMB

SMBALERT#

ICH_PWROK
SUSPWROK

DMI

H25
H24
G27
G26

HSIN0
HSIP0
HSON0
HSOP0

K25
K24
J27
J26

HSIN1
HSIP1
HSON1
HSOP1

Y4
W5
W6

SMBCLK
SMBDATA
SMBALERT#/GPI11

PCI-EXPRESS

SM&SMI

SMLINK0
SMLINK1
LINKALERET#

W4
U6
Y5

OC3#

USB_VD1+ 38
USB_VD1- 38

To Dock

USB_VD3+ 21
USB_VD3- 21

Cardbus-USB card

OC0#
OC3#
OC1#
OC2#

6
7
8
9
10

+3VSUS
USB_VD5+ 32
USB_VD5- 32
OC5#
32
USB_VD7+ 32
USB_VD7- 32
OC7#
32

OC5#
OC7#

5
4
3
2
1

R129
2

USBRBIAS

ICH _RI#
THRM#
ICH_PWROK

25
THRM#
31,39 ICH_PWROK
DPRSLPVR
2

BATLOW#
25
PWRBTN#
21,31,39 SUSPWROK
6,39,42 IMVP_PWRGD
6 PM_BMBUSY#
T103 PAD
T100 PAD

SUSPWROK
IMVP_PWRGD

14M_ICH
33
10
25
25
25

22.6/F
1

Place within 500mils


of ICH-6

Place within 500mils


of ICH-6
R396
2

DMI_COMP

24.9/F
1

+1_5VRUN
B

SMLINK0
SMLINK1
SMB_LINK_ALERT#

*10P_NC

C525

EXT_SMI#
EXT_WAK#
EXT_SCI#

T146 PAD

RI#
THRM#
PWROK
DPRSLPVR/TP1
BATLOW#/TP0
PWRBTN#
RSMRST#
VRMPWRGD
BM_BUSY#/GPIO6
SUS_STAT#/LPCPD#
SUSCLK

E10
F8
AE19
R1
M2
R6
AB21
AD20
AD21
V3

CLK14
SPKR
GPI7
GPI8
GPI12
GPI13
GPO19
GPO21
GPO23
GPIO24

SLP_S3#
SLP_S4#
SLP_S5#

PM

T4
T5
T6

R415
ICH_PCIE_WAKE# 1

680
2

SMLINK0

R424
1

10K
2

SMLINK1

R416
1

10K
2

R131
1

SYS_RESET#
WAKE#
MCH_SYNC#

U2
U5
AG21

STP_PCI#/GPO18
STP_CPU#/GPO20
SERIRQ

AC21
AD22
AB20

GPIO25
SATA0GP/GPIO26
GPIO27
GPIO28
SATA1GP/GPIO29
SATA2GP/GPIO30
SATA3GP/GPIO31

P5
AF17
R3
T3
AE18
AF18
AG18

GPIO33
GPIO34

AF20
AC18

MISC&GPIO

T126 PAD
T128 PAD
T130 PAD
T132 PAD

D12
B12
D11
F13

AC5
AD5
AF4
AG4
AC9

EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5

10K
2

+3VSUS

+3VRUN

SLP_S3# 25
PAD T99
SLP_S5# 25
SYS_RESET#
MCH_SYNC#

ICH_PCIE_WAKE# 25
STP_PCI# 15
STP_CPU# 4,15,42
SERIRQ 10,21,25
PAD

T101

PAD
PAD

T102
T104

UAI_8040 19
UAO_8040 19

R407
33

2 1

R405
*33_NC

SPKR
ICH6_GPI7
EXT_SMI#
EXT_WAK#
EXT_SCI#

T2
AC20
AA1
AE20
V2
U1
Y3
AF21
AD19
W3
V6

+3VSUS
OC4#
OC5#
OC7#
OC6#

10P8R-10K

To IO/B

MCH_SYNC#

2
C

6
6
6
6

DMI0_RXN
DMI0_RXP
DMI0_TXN
DMI0_TXP

15
15

R503
100K

15

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

T25
T24
R27
R26

THRM#

R151 10K
42

Y25
Y24
W27
W26

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

8.2K
2

DMI2_RXN
DMI2_RXP
DMI2_TXN
DMI2_TXP

6
6
6
6

15 CLK_PCIE_ICH#
15 CLK_PCIE_ICH

R132
1

USB

B20
A20
B27
B18
A18
C26
A16
B16
D23
B14
A14
C24
B22
A22

OC1#

RP31

USBP1P
USBP1N
OC1#
USBP3P
USBP3N
OC3#
USBP5P
USBP5N
OC5#/GPI10
USBP7P
USBP7N
OC7#/GPI15
USBRBIAS
USBRBIAS#

LAN

LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
LAN_RST#
LAN_CLK
LAN_RSTSYNC

E12
E11
C13
C12
C11
E13
V5
F12
B11

RSVD6
RSVD7
RSVD8
RSVD9

AD9
AF8
AG8
U3

RESERVED

PAD
PAD
PAD
PAD
PAD
PAD

T125
T127
T129
T131
T133
T134

PAD
PAD

T136
T137

1 2

R124
10

PLTRST#

PLTRST# 6,10,16,19,25

ICH6-M

QUANTA
COMPUTER

Title

ICH6-M (USB,DMI,LPC)

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

11
8

49

L21

VCCDMIPLL
C497

.1U_10V

C521

+3VRUN
2

C208

.1U_10V

C529

.1U_10V .1U_10V

C524

.1U_10V

+3_3V_PCI

C539

+3VRUN
C540

C528

.1U_10V .1U_10V .1U_10V

+3_3V_ICH
2

+3VRUN
C220

C523

.1U_10V .1U_10V

+1_5VSUS
C541
.1U_10V

G19

VCCSUS1_5_2
VCCSUS1_5_3

R7
U7

VCC1_5_67

G8

VCC1_5_68
VCC1_5_69
VCC1_5_70
VCC1_5_71
VCC1_5_72
VCC1_5_73
VCC1_5_74
VCC1_5_75
VCC1_5_76
VCC1_5_77
VCC1_5_78

D24
D25
D26
D27
E20
E21
E22
E23
E24
F20
G20

VCC2_5_2
VCC2_5_4

P7
AB18

V5REF1
V5REF2

A8
AA18

V5REF

V5REF_SUS

F21

V5REF_SUS

VCCUSBPLL
VCCSUS3_3_20

A25
A24

VCCSUS1_5_1

VCCLAN3_3/VCCSUS3_3_1
VCCLAN3_3/VCCSUS3_3_2
VCCRTC
VCCLAN3_3/VCCSUS3_3_3
VCCLAN3_3/VCCSUS3_3_4
VCCLAN1_5/VCCSUS1_5_1
VCCSUS3_3_1
VCCLAN1_5/VCCSUS1_5_2
VCCSUS3_3_2
VCCSUS3_3_3
V_CPU_IO1
VCCSUS3_3_4
V_CPU_IO2
VCCSUS3_3_5
V_CPU_IO3
VCCSUS3_3_6
VCCSUS3_3_13
VCCSUS3_3_7
VCCSUS3_3_14
VCCSUS3_3_8
VCCSUS3_3_15
VCCSUS3_3_9
VCCSUS3_3_16
VCCSUS3_3_10
VCCSUS3_3_17
VCCSUS3_3_11
VCCSUS3_3_18
VCCSUS3_3_12
VCCSUS3_3_19

+1_5VSUS
C517

+1_5VRUN

C542

1
2

.1U_10V .1U_10V

VCCSATAPLL
VCC3_3_22

A17
B17
C17
F18
G17
G18

+3VSUS
2

AE1
AG10

A11
U4
V1
V7
W2
Y7

+3VRUN

VCCDMIPLL
VCC3_3_1

A13
F14
G13
G14

.1U_10V

C535

AC27
E26

.1U_10V .1U_10V .1U_10V .1U_10V .01U

+1_5VRUN
C550

C538

.1U_10V .1U_10V

+2.5VRUN
C518

.1U_10V

+1_5VRUN
+3VSUS

AB3

VCCRTC

G10
G11

+1_5VRUN

+3VRUN +1_5VRUN

A1
A12
A15
A19
A21
A23
A26
A4
A7
A9
AA11
AA13
AA16
AA4
AB1
AB10
AB19
AB2
AB7
AB9
AC10
AC12
AC22
AC23
AC24
AC26
AC3
AC6
AD1
AD10
AD15
AD18
AD2
AD24
AD6
AE10
AE11
AE12
AE2
AE21
AE25
AE6
AE7
AF1
AF10
AF12
AF26
AF3
AF7
AG1
AG12
AG14
AG17
AG20
AG22
AG3
AG7
B13
B15
B19
B21
B23
B24
B25
C14
C18
C20
C22
C4
D1
D10
D13
D14
D18
D20
D22
D7
E14
E15
E18
E19
E25
F17
F19
F22
F4

C217

C207
.01U

.1U_10V

.01U

10U_4V

C536

C496

VCC1_5_56
VCC1_5_57
VCC1_5_58
VCC1_5_59
VCC1_5_60
VCC1_5_61
VCC1_5_62
VCC1_5_63
VCC1_5_64
VCC1_5_65

C515

BLM11A121S

1R
C203

AA7
AA8
AA9
AB8
AC8
AD8
AE8
AE9
AF9
AG9

C522

+1_5VRUN

VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18
VCC3_3_19
VCC3_3_20
VCC3_3_21

AA12
AA14
AA15
AA17
AC15
AD17
AG13
AG16
AG19
AA10

C547

+1_5V_SATA_TX
L42

R394

A6
B1
E4
H1
H7
J7
L4
L7
M7
P1

C205

R395 1R
2

VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
VCC3_3_7
VCC3_3_8
VCC3_3_9
VCC3_3_10
VCC3_3_11

C201

.1U_10V

+1_5VRUN

VCC1_5_46
VCC1_5_47
VCC1_5_48
VCC1_5_49
VCC1_5_50
VCC1_5_51
VCC1_5_52
VCC1_5_53
VCC1_5_54
VCC1_5_55

AA19
AA20
AA21
L11
L12
L14
L16
L17
M11
M17
P11
P17
T11
T17
U11
U12
U14
U16
U17
F9

.1U_10V

C544

AA6
AB4
AB5
AB6
AC4
AD4
AE4
AE5
AF5
AG5

VCC

VCC1_5_79
VCC1_5_80
VCC1_5_81
VCC1_5_82
VCC1_5_83
VCC1_5_84
VCC1_5_85
VCC1_5_86
VCC1_5_87
VCC1_5_88
VCC1_5_89
VCC1_5_90
VCC1_5_91
VCC1_5_92
VCC1_5_93
VCC1_5_94
VCC1_5_95
VCC1_5_96
VCC1_5_97
VCC1_5_98

1
2
1

+1_5VRUN

+1_5V_SATA_RX

VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4
VCC1_5_5
VCC1_5_6
VCC1_5_7
VCC1_5_8
VCC1_5_9
VCC1_5_10
VCC1_5_11
VCC1_5_12
VCC1_5_13
VCC1_5_14
VCC1_5_15
VCC1_5_16
VCC1_5_17
VCC1_5_18
VCC1_5_19
VCC1_5_20
VCC1_5_21
VCC1_5_22
VCC1_5_23
VCC1_5_24
VCC1_5_25
VCC1_5_26
VCC1_5_27
VCC1_5_28
VCC1_5_29
VCC1_5_30
VCC1_5_31
VCC1_5_32
VCC1_5_33
VCC1_5_34
VCC1_5_35
VCC1_5_36
VCC1_5_37
VCC1_5_38
VCC1_5_39
VCC1_5_40
VCC1_5_41
VCC1_5_42
VCC1_5_43
VCC1_5_44
VCC1_5_45

AB22
AD26
AG23

VCCP
2

Sequence :

C204

C16
D16
E16
F15
F16
G15
G16

C206

VSS001
VSS002
VSS003
VSS004
VSS005
VSS006
VSS007
VSS008
VSS009
VSS010
VSS011
VSS012
VSS013
VSS014
VSS015
VSS016
VSS017
VSS018
VSS019
VSS020
VSS021
VSS022
VSS023
VSS024
VSS025
VSS026
VSS027
VSS028
VSS029
VSS030
VSS031
VSS032
VSS033
VSS034
VSS035
VSS036
VSS037
VSS038
VSS039
VSS040
VSS041
VSS042
VSS043
VSS044
VSS045
VSS046
VSS047
VSS048
VSS049
VSS050
VSS051
VSS052
VSS053
VSS054
VSS055
VSS056
VSS057
VSS058
VSS059
VSS060
VSS061
VSS062
VSS063
VSS064
VSS065
VSS066
VSS067
VSS068
VSS069
VSS070
VSS071
VSS072
VSS073
VSS074
VSS075
VSS076
VSS077
VSS078
VSS079
VSS080
VSS081
VSS082
VSS083
VSS084
VSS085
VSS086

GND

VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172

G1
G12
G21
G7
G9
H23
H26
H27
J23
J24
J25
J4
K1
K23
K26
K27
K7
L13
L15
L23
L24
L25
M12
M13
M14
M15
M16
M23
M26
M27
M4
N1
N11
N12
N13
N14
N15
N16
N17
N7
P12
P13
P14
P15
P16
P22
R11
R12
R13
R14
R15
R16
R17
R23
R24
R25
R4
T1
T12
T13
T14
T15
T16
T23
T26
T27
T7
U13
U15
U23
U24
U25
V23
V26
V27
V4
W1
W23
W24
W25
W7
Y23
Y26
Y27
Y6
E27

.1U_10V

+3VSUS

+5VSUS

+5VALW

+3VRUN

C516

AA22
C199
AA23
150U_2V
.1U_10V .1U_10V .1U_10V AA24
AA25
AB25
AB26
AB27
R146
*10_NC
F25
F26
1
2
F27
G22
R145
100
G23
G24
1
2
G25
H21
D10
H22
V5REF
J21
2
1
J22
RB751V
K21
C218
C219
K22
.1U_10V
.1U_10V
L21
L22
M21
M22
N21
R406
*10_NC
N22
N23
1
2
N24
N25
R404
10
P21
1
2
P25
P26
P27
D17
R21
V5REF_SUS
R22
2
1
T21
RB751V
T22
C512
C511
U21
.1U_10V
.1U_10V
U22
V21
V22
W21
W22
Reference Volatge ---> Core Volatge
Y21
Y22
2

+5VRUN

U16D
+1_5VRUN

C202

+5VSUS
A

U16C

+1_5V_PCIE
2

BLM41P600SPG

+1_5VRUN

ICH6-M

ICH6-M
+3VSUS
2

VCCRTC
C520

C543

.1U_10V .1U_10V

C553

QUANTA
COMPUTER

.1U_10V

3.3V Can drop to 2.0V


min. in G3 state)

Title

ICH6-M (POWER&GND)

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

12
8

49

R_A_MD30
R_A_MD31

R_B_MD26
R_B_MD27

R_A_MD32
R_A_MD33
R_A_DQS#4
R_A_DQS4

R_A_MD34
R_A_MD35
R_A_MD40
R_A_MD41
R_A_DM5
R_A_MD42
R_A_MD43
R_A_MD48
R_A_MD49

R_A_DQS#6
R_A_DQS6
R_A_MD50
R_A_MD51
R_A_MD56
R_A_MD57
R_A_DM7
R_A_MD58
R_A_MD59

CGDAT_SMB
CGCLK_SMB
+3VRUN

M_ODT0 6,14

R_B_SCASA#
SM_CS3#

7,14 R_B_SCASA#
6,14
SM_CS3#
6,14

M_ODT3

M_ODT3

R_A_MD36
R_A_MD37

R_B_MD32
R_B_MD33

R_A_DM4

R_B_DQS#4
R_B_DQS4

R_A_MD38
R_A_MD39

R_B_MD34
R_B_MD35

R_A_MD44
R_A_MD45

R_B_MD40
R_B_MD41

R_A_DQS#5
R_A_DQS5

R_B_DM5

R_A_MD46
R_A_MD47

R_B_MD42
R_B_MD43

R_A_MD52
R_A_MD53

R_B_MD48
R_B_MD49

CLK_SDRAM1
CLK_SDRAM1#

CLK_SDRAM1 6
CLK_SDRAM1# 6

R_A_DM6

R_B_DQS#6
R_B_DQS6

R_A_MD54
R_A_MD55

R_B_MD50
R_B_MD51

R_A_MD60
R_A_MD61

R_B_MD56
R_B_MD57

R_A_DQS#7
R_A_DQS7

R_B_DM7
R_B_MD58
R_B_MD59

R_A_MD62
R_A_MD63

CGDAT_SMB
CGCLK_SMB

15,17 CGDAT_SMB
15,17 CGCLK_SMB
R466
10K

+3VRUN
R467
10K

CKE 0,1

CKE 2,3

C675

C676

1
2

C677

C678

C679

R_B_MD36
R_B_MD37
R_B_DM4

+1_8VSUS

Place these Caps near So-Dimm2.

R_B_MD38
R_B_MD39
R_B_MD44
R_B_MD45

C680

C681

C682

C683

.1U_10V .1U_10V .1U_10V .1U_10V

R_B_DQS#5
R_B_DQS5
R_B_MD46
R_B_MD47

+3VRUN

SMDDR_VREF

R_B_MD52
R_B_MD53

C684

CLK_SDRAM4
CLK_SDRAM4#

CLK_SDRAM4 6
CLK_SDRAM4# 6

.1U_10V

C685
2.2U_6.3V

C686

C687

2.2U_6.3V .1U_10V

R_B_DM6
R_B_MD54
R_B_MD55

Place these Caps near So-Dimm2.


No Vias Between the Trace of
PIN to CAP.

R_B_MD60
R_B_MD61
R_B_DQS#7
R_B_DQS7

R_B_MD62
R_B_MD63

R469
10K

SMbus address A4

SMbus address A0
1

Place these Caps near So-Dimm2.

M_ODT2 6,14

2.2U_6.3V 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V

R468
10K

+3VRUN

M_ODT2
R_B_MA13

PC4800 DDR2_R

CLOCK 3,4,5

+1_8VSUS

R_B_BS1# 7,14
R_B_SRASA# 7,14
SM_CS2# 6,14

M_ODT0
R_A_MA13

R_B_BS1#
R_B_SRASA#
SM_CS2#

R_B_MA10
R_B_BS0#
R_B_BMWEA#

R_A_BS1# 7,14
R_A_SRASA# 7,14 7,14 R_B_BS0#
SM_CS0# 6,14
7,14 R_B_BMWEA#

R_B_MA4
R_B_MA2
R_B_MA0

R_B_MA5
R_B_MA3
R_B_MA1

R_A_BS1#
R_A_SRASA#
SM_CS0#

PC4800 DDR2

CLOCK 0,1,2

R_A_MA4
R_A_MA2
R_A_MA0

R_B_MA11
R_B_MA7
R_B_MA6

M_ODT1

R_B_MA12
R_B_MA9
R_B_MA8

6,14

M_ODT1

R_B_BS2#

R_A_MA11
R_A_MA7
R_A_MA6

CKE3

6,14

R_A_SCASA#
SM_CS1#

R_B_BS2#

CKE3

7,14 R_A_SCASA#
6,14
SM_CS1#

R_A_MA10
R_A_BS0#
R_A_BMWEA#

7,14

CKE2

CKE2

C674

2.2U_6.3V .1U_10V

7,14 R_A_BS0#
7,14 R_A_BMWEA#

6,14

C673

R_B_MD30
R_B_MD31

R_A_MA5
R_A_MA3
R_A_MA1

6,14

2.2U_6.3V

R_B_DQS#3
R_B_DQS3

R_A_MA12
R_A_MA9
R_A_MA8

CKE1

C672

Place these Caps near So-Dimm1.


No Vias Between the Trace of
PIN to CAP.

R_B_MD28
R_B_MD29

QUANTA
COMPUTER

R_A_BS2#

CKE1

R_B_MD22
R_B_MD23

R_A_BS2#

CKE0

.1U_10V

R_B_DM2

7,14

CKE0

6,14

C671

R_B_MD20
R_B_MD21

R_A_MD26
R_A_MD27

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

R_B_DM3

VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1

R_A_DQS#3
R_A_DQS3

+3VRUN

SMDDR_VREF

R_B_MD24
R_B_MD25

CLK_SDRAM3 6
CLK_SDRAM3# 6

R_B_MD14
R_B_MD15

R_A_MD28
R_A_MD29

CLK_SDRAM3
CLK_SDRAM3#

R_B_MD18
R_B_MD19

VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

C670

R_A_MD22
R_A_MD23

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

C669

.1U_10V .1U_10V .1U_10V .1U_10V

R_B_DQS#2
R_B_DQS2

C667 C668

R_B_DM1

R_A_DM2

R_B_MD12
R_B_MD13

R_B_MD16
R_B_MD17

Place these Caps near So-Dimm1.

R_A_MD20
R_A_MD21

PC4800 DDR2 SDRAM


SO-DIMM (200P)

R_A_DM3
B

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

R_A_MD24
R_A_MD25

VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1

R_A_MD18
R_A_MD19

VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

R_A_DQS#2
R_A_DQS2

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

PC4800 DDR2 SDRAM


SO-DIMM (200P)

R_A_MD16
R_A_MD17

C666

+1_8VSUS
R_B_MD6
R_B_MD7

R_B_MD10
R_B_MD11

C665

R_B_DM0

R_B_DQS#1
R_B_DQS1

CLK_SDRAM0 6
CLK_SDRAM0# 6

R_A_MD14
R_A_MD15

C664

CLK_SDRAM0
CLK_SDRAM0#

C663

2.2U_6.3V 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V

R_B_MD8
R_B_MD9

R_A_DM1

R_B_MD4
R_B_MD5

R_A_MD12
R_A_MD13

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

R_B_MD2
R_B_MD3

VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54

R_B_DQS#0
R_B_DQS0

R_A_MD6
R_A_MD7

VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50

R_A_MD10
R_A_MD11

R_B_MD0
R_B_MD1

R_A_DM0

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

R_A_DQS#1
R_A_DQS1

R_A_MD4
R_A_MD5

R_A_MD8
R_A_MD9

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

R_A_MD2
R_A_MD3

VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54

Place these Caps near So-Dimm1.


C662

R_A_DQS#0
R_A_DQS0

+1_8VSUS

JDIM2

VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50

R_A_MD0
R_A_MD1

R_B_DM[0..7] 7
R_B_MD[0..63] 7
R_B_DQS[0..7] 7
R_B_DQS#[0..7] 7
R_B_MA[0..13] 7,14

SMDDR_VREF

JDIM1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

+1_8VSUS

R_A_DM[0..7] 7
R_A_MD[0..63] 7
R_A_DQS[0..7] 7
R_A_DQS#[0..7] 7
R_A_MA[0..13] 7,14

SMDDR_VREF

SMDDR_VREF

+1_8VSUS

+1_8VSUS

SMDDR_VREF

+1_8VSUS

Title

System DRAM Expansion (200P-DDR_SODIMM X 2)


Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

13
8

49

DDRII DUAL CHANNEL A,B.


DDRII A CHANNEL

DDRII B CHANNEL

R_A_MA[0..13] 7,13

7,13 R_A_SRASA#
7,13
R_A_BS1#

2
RP41 4
2
RP43 4
2
RP45 4

C713

1
3 4P2R-S-56
1
3 4P2R-S-56
1
3 4P2R-S-56

7,13 R_B_SRASA#
7,13
R_B_BS1#

R_B_SRASA#
R_B_BS1#
R_B_MA12
R_B_MA9
R_B_MA8
R_B_MA5

2
RP42 4
2
RP44 4
2
RP46 4

R_B_MA3
R_B_MA1
R_B_MA10
R_B_BS0#
R_B_BMWEA#
SM_CS3#
R_B_MA7
R_B_MA11

2
4
2
4
2
4
2
4

1
3 4P2R-S-56
1
3 4P2R-S-56
1
3 4P2R-S-56
B

R_A_MA13
M_ODT0
R_A_BS2#
R_A_MA12
R_A_MA9
R_A_MA8
R_A_MA5
R_A_MA3

M_ODT0
R_A_BS2#

RP47
RP49
RP51
RP53

2
4
2
4
2
4
2
4

1
3
1
3
1
3
1
3

SMDDR_VTERM

4P2R-S-56
4P2R-S-56

7,13 R_B_BS0#
7,13 R_B_BMWEA#
6,13
SM_CS3#

4P2R-S-56
4P2R-S-56

RP48
RP50
RP52
RP54

1
3
1
3
1
3
1
3

4P2R-S-56
4P2R-S-56
4P2R-S-56
4P2R-S-56

SMDDR_VTERM
R_A_MA10
2
R_A_BS0#
RP55 4
R_A_BMWEA#
2
R_A_SCASA# RP57 4
R_A_MA0
2
R_A_MA2
RP59 4

7,13 R_A_BS0#
7,13 R_A_BMWEA#
7,13 R_A_SCASA#

SMDDR_VTERM

1
3 4P2R-S-56
1
3 4P2R-S-56
1
3 4P2R-S-56

6,13

R_B_MA4
R_B_MA6
R_B_MA0
R_B_MA2
R_B_MA13
M_ODT2

M_ODT2

2
RP56 4
2
RP58 4
2
RP60 4

1
3 4P2R-S-56
1
3 4P2R-S-56
1
3 4P2R-S-56

SMDDR_VTERM
R_A_MA1

R470
1

SMDDR_VTERM

56
2

7,13

R_B_BS2#

R_B_BS2#

R471
1

56
2

M_ODT3

R473
1

56
2

SMDDR_VTERM
C

6,13

C712

Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.

SMDDR_VTERM

6,13
7,13

C711

C710

C709

C708

C707

C706

C705

C704

C703

C702

.1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V
2

Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.


R_A_MA7
R_A_MA11
R_A_MA4
R_A_MA6
R_A_SRASA#
R_A_BS1#

C701

.1U_10V

C700

No Vias Between the Trace of PIN to CAP.

C699

C698

C697

C696

C695

C694

C693

C692

C691

C690

C689

.1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V
2

C688

.1U_10V

SMDDR_VTERM

No Vias Between the Trace of PIN to CAP.

SMDDR_VTERM

R_B_MA[0..13] 7,13

M_ODT1

M_ODT1

R472
1

SMDDR_VTERM

56
2

6,13

M_ODT3

SMDDR_VTERM

6,13

CKE0

6,13

CKE1

CKE0

R474
1

56
2

6,13

CKE2

CKE1

R476
1

56
2

6,13

CKE3

SM_CS0#

R479
1

56
2

6,13

SM_CS2#

SM_CS1#

R481
1

56
2

CKE2

R475
1

56
2

CKE3

R477
1

56
2

SM_CS2#

R478
1

56
2

R_B_SCASA#

R480
1

56
2

SMDDR_VTERM

6,13

SM_CS0#

6,13

SM_CS1#

SMDDR_VTERM

SMDDR_VTERM

7,13 R_B_SCASA#

SMDDR_VTERM
SMDDR_VTERM

QUANTA
COMPUTER

Title

DDR RES.ARRAY

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

14
8

49

133

100

33

166

100

33

200

100

33

266

100

33

333

100

33

400

100

RSVD

33

100

Y3

33
C451 27P
2
1

R368 *10K_NC
R358
1
2 SELPSB0_CLK
1

10K

R351 *0_NC
R350
1
2 SELPSB1_CLK
1

*0_NC
2

R337
1

VDDA_CR
XIN
1

C448 27P
2
1

*0_NC
R342
2 SELPSB2_CLK
1

U30

14.318MHZ
XOUT

+3VRUN

CLK_EN#

17,42 CLK_EN#
11
STP_PCI#
4,11,42 STP_CPU#

VCCP

*10K_NC
2

SMbus address D2
R367 33
2

Depop R337 for Dothan-B


11

CLK48_USB

CGCLK_SMB
CGDAT_SMB
SELPSB0_CLK
SELPSB1_CLK
SELPSB2_CLK

4,6 SELPSB1_CLK
4,6 SELPSB2_CLK

VDDREF_CR
CLKVDD

C455

C436

.047U

.047U

49

XTAL_OUT

10
55
54

VTT_PWRGD#/PD#
PCI_STOP#
CPU_STOP#

SCLK
SDATA

12
16
53

FSA/USB_48
FSB/TEST_MODE
FSC/TEST_SEL

VDD_PCI_1
VDD_PCI_2

CLKVDD

21
28
34

VDD_SRC0
VDD_SRC1
VDD_SRC2

11

VDD_48

39

IREF

DOT96
DOT96#

DOT96
DOT96#

4P2R-S-33

C446

4.7U_10V_0805

.047U

14M_REF
4
2

CPU1
CPU1#

41
40

R_HCLK_CPU
R_HCLK_CPU#

4
2

CPU2_ITP/SRC7
CPU2#_ITP/SRC7#

36
35

R_HCLK_ITP
R_HCLK_ITP#

4
2

3 RP24
1
4P2R-S-33
3 RP23
1
4P2R-S-33
3 RP22
1
4P2R-S-33

SRC6
SRC6#

33
32

SRC5
SRC5#

31
30

R_MCH_3GPLL
R_MCH_3GPLL#

4
2

SRC4
SRC4#

26
27

R_PCIE_SATA
R_PCIE_SATA#

2
4

SRC3
SRC3#

24
25

R_PCIE_ICH
R_PCIE_ICH#

2
4

SRC2
SRC2#

22
23

SRC1
SRC1#

19
20

R_DOT100_SS
R_DOT100#_SS

2
4

SRC0
SRC0#

17
18
R_PCLK_PCM
R_PCLK_SIO
R_PCLK_DOCK
R_PCLK_MINI
R_PCLK_ICH
R_PCLK_LAN

R353 1

PCI5
PCI4
PCI3
PCI2
PCIF1
PCIF0/ITP_EN

5
4
3
56
9
8

R339
1

24
2

CLK_SSC_IN 17

R340
1

24
2

14M_SIO

26

R341
1

24
2

14M_ICH

11

HCLK_MCH 5
HCLK_MCH# 5

C429
*10P_NC

C430
*10P_NC

HCLK_CPU 3
HCLK_CPU# 3
HCLK_ITP 3
HCLK_ITP# 3

3 RP21
1
4P2R-S-33
1 RP26
3
4P2R-S-33
1 RP27
3
4P2R-S-33

CLK_MCH_3GPLL 6
CLK_MCH_3GPLL# 6
CLK_PCIE_SATA 10
CLK_PCIE_SATA# 10
CLK_PCIE_ICH 11
CLK_PCIE_ICH# 11
B

RP28
1
3

DOT100_SS
DOT100#_SS

DOT100_SS 6
DOT100#_SS 6

4P2R-S-33
2 39
R354 1
2 39
R343 1
2 39
R492 1

R355 1
R352 1

PCLK_PCM 21
PCLK_SIO 26
PCLK_DOCK 38
PCLK_MINI 23
PCLK_ICH 10
PCLK_LAN 35

2 39
2 39
2 39

C435

14
15

2 49.9/F
2 49.9/F

R_HCLK_MCH
R_HCLK_MCH#

GND_48
GND_REF
GND_PCI_1
GND_PCI_2
GND_SRC
GND_CPU

6
6

VDDA_CR

R_DOT96
R_DOT96#

3
1

R331 1
R330 1

44
43

13
51
2
6
29
45

2.2
2

R346
1

4
2

2 49.9/F
2 49.9/F

CPU0
CPU0#

Iref=5mA, Ioh=4*Iref
RP29

R335 1
R334 1

52

VDD_REF
VDD_CPU

1
7

2 49.9/F
2 49.9/F

REF

CK-410M

46
47

CLKVDD1

VDD48_CR
R338
475/F
1
2 I REF

C421

4.7U_10V_0805

.047U

C454

.047U

C434

1 2 0 o h m s @ 100Mhz

+3VRUN

XTAL_IN

48
42

CLKVDD
1

L36
1
2
ACB2012L-120

50

R333 1
R332 1

Place these termination to


close CK410M. Cause those
Pin-out is for Current-Mode.

33

100

100

38

PCI

VSSA

SRC

37

CPU

VDDA

FSC FSB FSA

R357
*10K_NC

ICS954201/CY28411

250mA ( MAX. )
L37

+3VRUN
C457

.047U

C458
.047U

CLKVDD1
C459
4.7U_10V_0805

1
ACB2012L-120

1 2 0 o h m s @ 100Mhz

+3VRUN

+3VRUN
VDD48_CR

SMBus

C460

2
4

.047U

C456

4.7U_10V_0805

2 49.9/F
2 49.9/F

CLK_PCIE_SATA
CLK_PCIE_SATA#

R360 1
R359 1

2 49.9/F
2 49.9/F

CLK_PCIE_ICH
CLK_PCIE_ICH#

R362 1
R361 1

2 49.9/F
2 49.9/F

2.2
2

R356
1

CLK_MCH_3GPLL R329 1
CLK_MCH_3GPLL# R328 1

1
3

VDDREF_CR
11

C437
.047U

PDAT_SMB

Q37

1R
2

RP25
4P2R-S-10K
R336
1

CGDAT_SMB

CGDAT_SMB 13,17

2
3

1
1

2 49.9/F
2 49.9/F

DOT100_SS
DOT100#_SS

R364
R363

1
1

2 49.9/F
2 49.9/F

Place these termination to


close CK410M. Cause those
Pin-out is for Current-Mode.

Split Power Plane to avoid SSN/SN.

PCLK_SMB

R366
R365

2N7002

+3VRUN

11

DOT96
DOT96#

CGCLK_SMB

CGCLK_SMB 13,17

Q36

2N7002

QUANTA
COMPUTER

These are for backdrive issue

Title

CLOCK GENERATOR

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

15
8

49

+2.5VRUN

R195 5.6K
2

SDVO_CTRLCLK

+2.5VRUN

R202 5.6K
2

SDVO_CTRLDATA

+5VRUN

R186
2

2.2K
1

+5VRUN

R193
2

2.2K
1

1
2

C29
.1U_10V

Placed this Bypass


capacitor close to
+3VRUN
OVCC.
C32
10U_6.3V

6
6

SDVOB_R+
SDVOB_R-

DVI_SDAT

6
6

SDVOB_G+
SDVOB_G-

DVI_SCLK

6
6

SDVOB_B+
SDVOB_B-

INT-

C295
1

.1U_10V
2

SDVOB_INT- 6

INT+

C293
1

.1U_10V
2

SDVOB_INT+ 6

6 SDVOB_CLK+
6 SDVOB_CLK-

DVI_SCLK
DVI_SDAT

1
C296
10U_6.3V

1
C24
.1U_10V

DVI_VCC
C23
.1U_10V

C25
.1U_10V
SI1362

DVI_SVCC
INTINT+

C33
.1U_10V

R482

10K

R13
EXT_RES 2

DVI_DETECT 38

1K
1

C267
10U_6.3V

38
38

DVI_CLKDVI_CLK+

38
38

DVI_TX0DVI_TX0+

38
38

DVI_TX1DVI_TX1+

38
38

DVI_TX2DVI_TX2+

L7
BLM11A601S
2

+3VRUN

1
C19
.1U_10V

1
C18
.1U_10V

1
2

1
2

C22
.1U_10V

R8
100

DVI_PVCC2
1

+3VRUN

+1_8VRUN

C36
10U_6.3V

DVI_AVCC
L27
BLM11A601S
1
2

L9
BLM18PG181SN1
2

1
C37
.1U_10V

EXT_RES

36
35
34
33
32
31
30
29
28
27
26
25

SVCC1
EXT_RES
VCC3
SDVOB_INTSDVOB_INT+
GND2
TEST
HTPLG
VCC2
PGND2
PVCC2
EXT_SWING

6,10,11,19,25 PLTRST#
C262
6 SDVO_CTRLDATA
10U_6.3V
6 SDVO_CTRLCLK

OVCC
RESET#
SPGND
SDSDA
SDSCL
A1
GND1
SCLDDC
SDADCC
VCC1
PVCC1
AGND

1
2
3
4
5
6
7
8
9
10
11
12

TXCTXC+
AVCC1
TX0TX0+
AGND1
TX1TX1+
AVCC2
TX2TX2+
AGND2

+3VRUN

38
38

L28
BLM11A601S
1
2
1

+1_8VRUN

C21
.1U_10V

R11
1K

DVI_PVCC1

+3VRUN

+3VRUN

L26
BLM11A601S
1
2

SPVCC
SDVOB_CLKSDVOB_CLK+
SGND2
SDVOB_BSDVOB_B+
SVCC2
SDVOB_GSDVOB_G+
SGND1
SDVOB_RSDVOB_R+

U5
R12
*1K_NC

48
47
46
45
44
43
42
41
40
39
38
37

C40
10U_6.3V

13
14
15
16
17
18
19
20
21
22
23
24

C35
.1U_10V

DVI_SPVCC
1

+3VRUN

L8
BLM11A601S
1
2

C17
10U_6.3V

DVI_TX0+
DVI_TX1+
DVI_TX2+
DVI_CLK+

R190
R182
R189
R183

1
1
1
1

2
2
2
2

110/F
110/F
110/F
110/F

C273
C263
C272
C264

1
1
1
1

2
2
2
2

.1U_10V
.1U_10V
.1U_10V
.1U_10V

DVI_TX0DVI_TX1DVI_TX2DVI_CLK-

Put these 4 Resistors and 4


Capacitors close to the TX pin of
SDVO device

Title

QUANTA
COMPUTER
SIL 1362 DVI

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

R ev
1A
Sheet
1

16

of

49

+3VRUN

LCDVCC

6,26

LCD_TST

6
6

.01U

Q8
2N7002

6
6

TXLOUT2TXLOUT2+

TXLOUT0TXLOUT0+

LCDVCC

15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

VEDID_PWR

+3VRUN
PBAT_SMBDAT 26,41,47
PBAT_SMBCLK 26,41,47

FPBACK_C
+5VALW
TXLOUT1- 6
TXLOUT1+ 6

C724
47P

C725
47P

TXLCLKOUT- 6
TXLCLKOUT+ 6

LCDVCC

FPVCC

25

.01U

30
29
28
27
26
25
24
23
22
21
20
19
18
17
16

R498
0
1
DDC_DATA_V
DDC_CLK_V

2
1

22U

C271

C277

Q9
BSS138

Q21
2N7002

C266

LAMP_STAT

LCDVCC_ON
R18
47K
3

R14
47_0805

1
R17
*47K_NC

10
2

2
+3VALW

+3VRUN

J3
1770302-1
INV_PWR_SRC

6
5
2
1

Q20
FDC653N
R187
330K

15V

FPBACK_EN

2
4

FPBACK_C

1
2

7SH08

C301
.1U_50V

2
2

D15
1
C

PBAT_SMBCLK

2
DA204U

INV_PWR_SRC_ON_R

Slave Adress : 58H

R201
2.2K

3
Q25
BSS138

DA204U
2

D14
R213
47K

+3VRUN

+2.5VRUN

+5VALW

Q24
BSS138

R209
2.2K

INV_PWR_SRC_ON

3 PBAT_SMBDAT

DDC_CLK_V

DDC_DATA

+5VALW
C298

.1U_50V

R191
2.2K

+2.5VRUN

C297

.1U_50V

+2.5VRUN

R208
2.2K

DDC_CLK

1
R214
100K

+3VRUN

6
5
2
1

+2.5VRUN

LCD CONN

Q26
AO6405

PW R_SRC

.047U
U23

25

C311
2

5
FPBACK

2
INV_PWR_SRC
1

C274

.1U_10V

+3VRUN

Back Light Enable


controller

C39

C38

.1U_10V .047U

Panel Core Power

+3VRUN

+3VRUN

Q27
2N7002

Diode Terminator/ ESD Protector

DDC_DATA_V

I2C Bus

L17
*BLM21B331SB_NC +3VRUN
1
2
C71
*.1U_10V_NC

R54
*10K_NC

SSCD_VDD

C75
*10U_6.3V_NC

U8

15,42
33

S3
S2
S1

VDDA
VDD

16
9

CLKOUT
CLKOUT#

12
11

7
8

SCLK
SDATA

5
6

IREF

14

VSSIREF
PWRDWN
VSS
REFOUT/SELVSSA

13
10
15

RP3
R_DREFSSCLK
R_DREFSSCLK#

CLK_EN#
14M_AC97

2
R55

1
*33_NC

CLK_SSC_IN

4
2

3
1

DREFSSCLK 6
DREFSSCLK# 6

*4P2R-S-33_NC
R46
*49.9/F_NC
R45
*475/F_NC

R47
*49.9/F_NC

*MK1493-05GT_NC

CLKIN

2
3
4

13,15 CGCLK_SMB
R61
R62
13,15 CGDAT_SMB
*10K_NC *10K_NC *10K_NC
1

R60

SSC_S3
SSC_S2
SSC_S1

CLK_SSC_IN

15

R58
*33_NC

Spread
spectrum(LVDS)
5

C83
*10P_NC

33

14M_AC97

R59
0

CLK_SSC_IN 15

1 2

Title

QUANTA
COMPUTER
LCD CONN&CK-SSCD

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

R ev
1A
Sheet
1

17

of

49

+5VRUN

+2.5VRUN
D2
RB500V-40
1

PAD

CRT_VCC
JVGA_NC

+2.5VRUN
3
1

CRT_VCC

T46

4P2R-S-2.2K

4
2

38

VGA_BLU

DA204U

+2.5VRUN

DOCK_CLK_DDC2 38

*.1U_NC

JVGA_HS

2
BLM11A121S

D13

2
DA204U

C237
10P

C6

*10P_NC *10P_NC

C7

1
C234
10P

JVGA_VS

2
BLM11A121S

38
2

VSYNC

0
2

R495
1

AHCT1G125DCH

VGA_GRN

L3

VGAVSYNC

HSYNC

*.1U_NC

JVGA2
DS01A91-WL36
<VENDOR>

L2
1

0
2

D12

C240

CLK_DDC2
R494
1

U3
6

R2
1K

1
C238

DOCK_DAT_DDC2 38

Q2
BSS138
3

C3
10P

3
3

VGA_RED

+2.5VRUN

DAT_DDC2
2

Q3
BSS138
3

2
4

VGAHSYNC

+2.5VRUN

RP11
4P2R-S-2.2K

U2

.1U_10V

RP10

1
5

+2.5VRUN

1
3

AHCT1G125DCH

C4

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

C236

*4.7P_NC*4.7P_NC*4.7P_NC

4.7P

C235

C233

C242

4.7P

C243

R159 C244
75/F
4.7P
2

R160
75/F

1
R161
75/F

JVGA_B

1
2
BLM18BB470SN1D

VGA_BLU

2
DA204U

L24
6,38

*.1U_NC

CRT_VCC

JVGA_G

1
2
BLM18BB470SN1D

VGA_GRN

D11

M_SEN#

6,38

1
C239

1
.01U

38

L23

2
C2

JVGA_R

1
2
BLM18BB470SN1D

VGA_RED

L22
6,38

C5
10P

Level Shift

CRT

ESD Protector

+3VRUN

CT_0310: Change L4~L6 from 1.8UH to BLM18BD151SN1.


Change C8~C13 from 82P to 6P to follow Azada design.

CLOSE TO JTV1
1

L4
TV_C/R

2
1

C13
6pF

C9
6pF

D3
*DA204U_NC

R3
150/F

1
2
BLM18BD151SN1

TV_C/R

6,38

JTV2
L6
1
2
BLM18BD151SN1
1

C11
6pF

C10
6pF

L5
1
2
BLM18BD151SN1
1
2

C12
6pF

SUYIN_35134A-06T1

TV_COMP
R5
150/F

TV_COMP_L

C8
6pF

+3VRUN

+3VRUN

TV_COMP

6,38

4
1
5
2
7
3
6

TV_C/R_L

R4
150/F

TV_Y/G_L
1

TV_Y/G

TV_Y/G

6,38

3
2

2
D4
*DA204U_NC

TV-OUT

D5
*DA204U_NC
Title

QUANTA
COMPUTER
CRT&TV CONN

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

R ev
1A
Sheet
E

18

of

49

C491
.047U

R390
1

33
2

R400 1

2 10K

R398 1

2 *10K_NC

2.2U_6.3V

+3VRUN

8040_VSS

+1_8VRUN

L39

C486
.1U_10V

ATAIOSEL
VDDIO1
VDDIO2
VDD1
VDD2
VDD3
VAA1
VAA2

H_DA[0]
H_DA[1]
H_DA[2]

B_PDA0
B_PDA1
B_PDA2

H_CS_N0
H_CS_N1

48
47

B_PDCS1#
B_PDCS3#

H_DIOR_N/H_DMARDY_N/H_STROBE
H_DIOW_N/H_STOP
H_IORDY/H_DSTROBE/H_DDMARDY_N
H_DMACK_N
H_DMAQ
H_INTRQ
H_RESET_N
H_IOCS16_N
H_PDIAG_N

58
59
55
54
60
53
16
52
46

ISET
GND1
GND2
GND3
VSS1
VSS2

26
8
42
57
25
30

XTLOUT

XTALO_HD

X3
*25MHz_NC
*27P_NC
C495
1
2

22

R386
*1M_NC

XTLIN/OSC

R384

HDD CONN. SCREWS

C230
.1U_10V

JS3

JS4

*10K_NC
HDD_SCREW

HDD_SCREW

CT_0315: Change JIDE3 HDD connector's footprint from


HDD-200043FB044G513ZL-44P to HDD-200043FB044GX13ZL-44P

C231
1nF

C571
10U_10V

+3VRUN

2 10K
2 10K

HDD CONN

12.1K/F

8040_VSS

R403

VCC

OUT

OE

VSS

8040_VSS

10K
25MHz_Q
<tolerance>

C506
.1U_10V

R215
25,26 SATA_DET#

100K
11
11

USB_VD0+
USB_VD0-

USB_VD0+
USB_VD0-

DASP#
PDCS1#

OSC_25MHZ

PDIAG#
IRQ14
PDDACK#
PIORDY

+5VRUN

+5VSATA

R217
2

R436

Q29
FDC653N
+5VSATA

PDD7

15V

C320
4.7U_10V_1206

R216 100K
2
1

25

MODC_EN#

*.01U_NC

47K

C326
.01U

C327
.01U

10
10
10
10
10
10
10
10
10
10
10

PDDREQ
PDIOW#
PDIOR#
PIORDY
PDDACK#
IRQ14
PDA1
PDA0
PDCS1#
PDA2
PDCS3#

PDDREQ
PDIOW#
PDIOR#
PIORDY
PDDACK#
IRQ14
PDA1
PDA0
PDCS1#
PDA2
PDCS3#

1
2

Q28
DTC144EUA

10

PDD[0..15]

.1U

C319

C318
.1U

PDCS3#
PDA2
PDA0
PDA1

CSEL2
PDIOR#
PDIOW#
PDD15
PDD1
PDD2
PDD12
PDD11

R220 2

PDD5
PDD6
PDD8
56

INT_MOD_IN2#

IDERST_MOD 25
USB/IDE# 25
MODPRES# 25

R225
1

10K
2

+3VRUN

R221
1

100K
2

+3VRUN
D

QUANTA
COMPUTER

PDD[0..15]

IDE (HDD&CD_ROM

MEDIA BAY
3

C312
10U_10V

USB/IDE#

Title
Q14
*DTC144EUA_NC

+5VMOD

INT_MOD_IN1#

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68

JAE-WM1F068N1F-68P-RDV

47K

POWER SWITCH

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67

47K

47K

R148 *100K_NC
2
1

CC3528

C221

PDD3
PDD4
PDD10
PDD9

C337
1U_16V

+ C229
100U/6.3V

15V

Q15
*AO6402_NC

6
5
2
1
3

+5VSUS

+5VMOD

0_0805

6
5
2
1

PDDREQ
PDD0
PDD14
PDD13

470
1 CSEL2

+5VSUS

2
1
R218 4.7K

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67

JMOD2
+5VMOD

OSC_25MHZ_VCC

Settings
NC
1/NC
0
NC
1/NC
1/NC
0/NC
1/NC
NC.0.NC
1/NC
0
1/NC

Pin Name
Pin#
40
T7
39
T6
T5
38
37
T4
T3
36
T2
35
T1
34
T0
33
CNFG[2:0] 20.19.18
ATAIOSEL
21
46
H_PDIAG_N
H_IOCS16_N
52

+3VRUN

R147

+5VSATA

SUYIN_200055

SATA TO PATA SWITCH

HDDC_EN#

470
2

B_IOCS16#
HDD_P34
1
B_PDA2
B_PDCS3#

8040_VSS

25

R414
CSEL1 1

R397
1

Y4

4P2R-S-10K

+5VSATA

B_PDIOR#
B_PDIOW#
B_PIORDY
B_PDDACK#
B_PDDREQ
B_IRQ14
B_IDE1RST_R#
R385 1
R378 1

B_PDD8
B_PDD9
B_PDD10
B_PDD11
B_PDD12
B_PDD13
B_PDD14
B_PDD15

DEVICE CONFIGURATION
XTALI_HD

C507
10U_6.3V

R149
*510_NC

2
4

88SA8040

21
4
44
9
41
56
24
29

23

*27P_NC
C490
1
2

L44
2
BLM11A121S

CNFG0
CNFG1
CNFG2

C485
.1U_10V

8040_VSS

8040_VAA

2
1
BLM11A121S

+3VRUN
B

18
19
20

50
51
49

+3VRUN

2 10K
2 10K

T0
T1
T2
T3
T4
T5
T6
T7

B_PDDREQ
B_PDIOW#
B_PDIOR#
B_PIORDY
B_PDDACK#
B_IRQ14
B_PDA1
B_PDA0
B_PDCS1#
HDD_P39

4.7K

1
3

33
34
35
36
37
38
39
40

*10K_NC
*10K_NC
*10K_NC
10K

2
2
2
2

R417

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44

R374 1
R375 1

1
1
1
1

+3VRUN

UAO
UAI
RST_N

62
64
2
5
7
11
13
15
14
12
10
6
3
1
63
61

+3VRUN

8040_VAA

45
43
17

H_DD[0]
H_DD[1]
H_DD[2]
H_DD[3]
H_DD[4]
H_DD[5]
H_DD[6]
H_DD[7]
H_DD[8]
H_DD[9]
H_DD[10]
H_DD[11]
H_DD[12]
H_DD[13]
H_DD[14]
H_DD[15]

+3VRUN
+3VRUN

R370
R371
R372
R373

+3VRUN

+3VRUN

2 0
2 0

R377 1
R376 1
6,10,11,16,25 PLTRST#

UAO_8040
UAI_8040

C483

TX_P
TX_M
RX_P
RX_M

11
11

32
31
27
28

SATA_TXP0
SATA_TXN0

B_IOCS16#
B_IRQ14

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43

2 5.6K

1
RP8

JIDE3
IDE1RST#
B_PDD7
B_PDD6
B_PDD5
B_PDD4
B_PDD3
B_PDD2
B_PDD1
B_PDD0

10
10

B_PDD0
B_PDD1
B_PDD2
B_PDD3
B_PDD4
B_PDD5
B_PDD6
B_PDD7
B_PDD8
B_PDD9
B_PDD10
B_PDD11
B_PDD12
B_PDD13
B_PDD14
B_PDD15

PIN HEADER TYPE

B_IDE1RST_R#

U33
SATA_RXP0
SATA_RXN0

B_PDDREQ R413

C508
.1U_10V

SATA_RXN0

C509
.047U

C466
.1U_10V

C224 3900P
1
2

SATA_RXN0_C

10 SATA_RXN0_C

SATA_RXP0

+1_8VRUN

C223 3900P
1
2

SATA_RXP0_C

10 SATA_RXP0_C

+3VRUN

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

Rev
1A
Sheet

19

of
8

49

PV21
PV19
PAD197X98

PV20

PV3

PAD197X98

PV22

PAD138X98

H18

h-c315d126p2-4

1
5

H23
h-c315d126p2-4

1
5

GND

h-c315d126p2-4

GND

GND

GND

GND

GND

H16

PAD138X98

PAD197X98

PV9
PAD138X98

+3VSUS

C111
2200P

H22

h-c315d126p2-4

H19

h-c315d126p2-4

H2

+3VRUN

GND

+3VRUN

GND
1

GND

2200P 2200P

H21

Stitching caps

1
5

PV2

PV8

PAD197X98

PAD197X98

PV23

PV14
PAD197X98

H-C315I166D126P2

PV13

PV7

PAD197X98 PAD197X98

H14

h-c315d126p2-4

3
5

h-c315d126p2-4

2200P

C116

PV15
PAD197X98

C531

PV16
PAD197X98

PV12
PAD197X98

5
C465

h-c315d126p2-4

H17
+3VSUS

GND

GND

H8
+5VSUS

h-c236d126p2-4

GND
1

GND
1

GND
1

GND

*PAD138X98_NC

5
C14

2200P
PV17

PAD138X98

PV4

PAD138X98

PV5

PAD197X98

GND
1

GND
1

GND

+3VRUN

Stitching caps

H11

H15

h-c315d118p2-4

h-c354d126p2

H10

h-c315d102p2

H4

h-c236d126p2-4

h-tc236bc118d63p2

h-c256d126p2-4

1
5

MDC_NUT

4
H7

H24
JS2

H20

h-c236d110p2-4

h-c315d102p2

H6
h-c315d102p2

H5
h-c315d102p2

H3
h-tc177bc63d63pt

H12

h-c236d110p2-4

H13

CT_0314:Change PV17 from PAD197x98


to PAD138x98 small size.

JS2 is mounted on H24(BOT).


Title

QUANTA
COMPUTER
SCREW PAD

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

Rev
1A
Sheet

20

of
8

49

REG1.5

SPKR_OUT#
RI_OUT#/PME#

10,23,25,35 CLKRUN#

J3
J2
J1
H1
H2
H5
G1

MF6 (CLKRUN#)
MF5
MF4 (RI_OUT#)
MF3 (SIRQ#)
MF2 (INTC#)
MF1 (INTB#)
MF0 (INTA#)

PIRQC#
PIRQD#

10,35
10,23

R327
100K

A15
J19

CAD31
CAD30
CAD29
CAD28
CAD27
CAD26
CAD25
CAD24
CAD23
CAD22
CAD21
CAD20
CAD19
CAD18
CAD17
CAD16
CAD15
CAD14
CAD13
CAD12
CAD11
CAD10
CAD9
CAD8
CAD7
CAD6
CAD5
CAD4
CAD3
CAD2
CAD1
CAD0

C10
A10
F11
E11
C11
B13
C13
A14
B14
B15
E14
A16
D19
E17
F15
H19
J17
J15
J18
K15
K17
K18
L15
L18
L19
M17
M18
N19
M15
N17
N18
P19

1
2

1
2

1
2

TPS_DATA
TPS_CLOCK
TPS_LATCH

VCCCB

CAD31
CAD30
CAD29
CAD28
CAD27
CAD26
CAD25
CAD24
CAD23
CAD22
CAD21
CAD20
CAD19
CAD18
CAD17
CAD16
CAD15
CAD14
CAD13
CAD12
CAD11
CAD10
CAD9
CAD8
CAD7
CAD6
CAD5
CAD4
CAD3
CAD2
CAD1
CAD0

VPPCB
VCCCB

11,31,39 SUSPWROK

24
23
22
21
20
19
18
17
16
15
14
13

VCCCB

VCC

USB_VD3+

1
2

1OE
1A

USB_VD3-

7
5

2OE
2A

USB_EN_CARD
11
11

VPP1
A16-CCLK
A15-CIRDY#
A12-CC/BE2#
A7-CAD18
A6-CAD20
A5-CAD21
A4-CAD22
A3-CAD23
A2-CAD24
A1-CAD25
A0-CAD26
D0-CAD27
D1-CAD29
D2-RFU
WP/IOIS16-CCLKR
GND

C102
.1U

CCD1#
CAD2
CAD4
CAD6
RSVD/D14
CAD8
CAD10
CVS1#
CAD13
CAD15
CAD16
RSVD/A18
CBLOCK#
CSTOP#
CDEVSEL#

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51

GND
CD1#-CCD1#
D11-CAD2
D12-CAD4
D13-CAD6
D14-RFU
D15-CAD8
CE2#-CAD10
VS1#/RFSH-CVS1
RSVD-CAD13
RSVD-CAD15
A17-CAD16
A18-RFU
A19-CBLOCK#
A20-CSTOP#
A21-CDEVSEL#
VCC

CAD13

2B

CAD15

GND

1B

52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

VPP2/VPP2
A22-CTRDY#
A23-CFRAME#
A24-CAD17
A25-CAD19
VS2#/RSVD-CVS2
RESET-CRST
WAIT#-CSERR#
RSVD-CREQ#
REG#-CC/BE3#
BVD2/SP-CAUDIO#
BVD1-STSCHG
D8-CAD28
D9-CAD30
D10-CAD31
CD2#-CCD2#
GND

SN74CB3Q3306APW

F1
F18
E19
F17
G15
F19
G18
H14
G19
C12
C14
G17
E12
H15
A11
C15
B10
M19
H17
A13
B16
N15
B11
B12
A12
E13
E18
H18
L17

SUSPEND#
USB_EN

J5
E10

R345
CCCLK
1
2 CCLK
CFRAME#
33
CIR DY#
C TRDY#
CDEVSEL#
CSTOP#
CPAR
CPERR#
CSERR#
CREQ#
CGNT#
CINT#
CBLOCK#
CCLKRUN#
CRST#
RSVD/D2
RSVD/D14
RSVD/A18
CVS1#
CVS2#
CCD1#
CCD2#
CAUDIO#
CSTSCHNG
CC/BE3#
CC/BE2#
CC/BE1#
CC/BE0#
R323
10K
+3VSUS
2
1
USB_EN_CARD

G2
G3

1394SCL
1394SDA

R317
0

C TRDY#
CFRAME#
CAD17
CAD19
CVS2#
CRST#
CSERR#
CREQ#
CC/BE3#
CAUDIO#
CSTSCHNG
CAD28
CAD30
CAD31
CCD2#

GND
GND
GND
GND

69
70
71
72

CardBus Slot
+3VSUS
C97
*.1U_NC

RP5

PCI4515

1394 Code
currently
integrate in
system BIOS

U13

1
2
3
1 7

A0
A1
A2

VCC

SCL
SDA

6
5

WC

GND

*4P2R-S-2.7K_NC

1394SCL
1394SDA

QUANTA
COMPUTER

4P2R-S-220

4
2

C419
*10P_NC

RP20

*24C02LM_NC
SOIC8-6-1_27

*10K_NC

18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

U15

R69
2

GND
D3-CAD0
D4-CAD1
D5-CAD3
D6-CAD5
D7-CAD7
CE1#-CC/BE0#
A10-CAD9
OE#-CAD11
A11-CAD12
A9-CAD14
A8-CC/BE1#
A13-CPAR
A14-CPERR#
WE/PGM-CGNT#
RDY/BSY-IRQ/CIN
VCC

CCLK
CIR DY#
CC/BE2#
CAD18
CAD20
CAD21
CAD22
CAD23
CAD24
CAD25
CAD26
CAD27
CAD29
RSVD/D2
CCLKRUN#

+3VSUS

1394 EEPROM
8

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17

+3VSUS

TPS2220A (PWP)

CCLK
CFRAME#
CIRDY#
CTRDY#
CDEVSEL#
CSTOP#
CPAR
CPERR#
CSERR#
CREQ#
CGNT#
CINT#
CBLOCK#
CCLKRUN#
CRST#
R2_D2
R2_D14
R2_A18
CVS1
CVS2
CCD1#
CCD2#
CAUDIO
CSTSCHG
CC/BE3#
CC/BE2#
CC/BE1#
CC/BE0#

SCL
SDA

5V_0
NC
5V_1
NC
DATA
NC
CLOCK
SHDN#
LATCH
12V_1
NC
NC
12V_0
NC
AVPP/AVCORE
NC
AVCC0
NC
AVCC1
OC#
GND
NC
RESET#
3.3VIN

CAD0
CAD1
CAD3
CAD5
CAD7
CC/BE0#
CAD9
CAD11
CAD12
CAD14
CC/BE1#
CPAR
CPERR#
CGNT#
CINT#

VR_EN#

SKT_VCC0
SKT_VCC1

1
2
3
4
5
6
7
8
9
10
11
12

K2

K1
K19
1.5V1
1.5V2

B9
C9
A9

U12

*33_NC
2

+5VSUS

U14A

R320
PCLK_PCM 1

GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
TEST0
TEST1
TEST2
TEST3
SC_CD#
SC_FCB
SC_RFU
SC_RST#
SC_IO
SC_CLK
SC_VCC

H3
L5

10,11,25 SERIRQ

C/BE3#
C/BE2#
C/BE1#
C/BE0#

33
PCM_SPK#
23,25,26,35 PCI_PME#

+5VSUS

0_0603

CLK_48

IDSEL
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PERR#
SERR#
REQ#
GNT#
PCI_RST#
GRST#

CON2
PCI-1CA41501-T1-TH

C441
4.7U_10V_0805

R322

TI PCI4515- 1 of 2

N5
L1
U6
R6
V5
W5
V6
U7
R7
W6
L3
L2
K3
K5

C442
.1U

3
1

2 100 IDSEL

C87
4.7U_10V_0805

3
1

AD17
1 R321
15
PCLK_PCM
10,23,35 DEVSEL#
10,23,35 FRAME#
10,23,35 IRDY#
10,23,35 TRDY#
10,23,35 STOP#
10,23,35
PAR
10,23,35 PERR#
10,23,35 SERR#
10
REQ1#
10
GNT1#
10,23,35 PCIRST#
25 CBUS_GRST#

C89
.1U

.1U

H6
K6
N6
P7
P9
M14
K14
G14
F13
F10
F7
R17
U13
U14
U18
R14
P12
U12
V12
W12
F3
E3
D1
F5
E1
E2
G6

P2
U5
V7
W10

C/BE3#
C/BE2#
C/BE1#
C/BE0#

C445
.1U

4
2

10,23,35
10,23,35
10,23,35
10,23,35

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

C418

C407
.1U

M1
M2
M3
M6
M5
N1
N2
N3
P3
R1
R2
P5
R3
T1
T2
W4
W7
R8
U8
V8
W9
V9
U9
R9
V10
U10
R10
W11
V11
U11
P11
R11

+3VSUS

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

PCI_VCC0
PCI_VCC1

SDATA/VCC5#
SLATCH/VPP_PGM
SCLK/VCC3#

J6
L6
P6
P8
P10
L14
J14
F14
F12
F9
F6
10,23,35 AD[0..31]

CORE_VCC0
CORE_VCC1
CORE_VCC2
CORE_VCC3
CORE_VCC4
CORE_VCC5
CORE_VCC6
CORE_VCC7
CORE_VCC8
CORE_VCC9
CORE_VCC10

P1
W8

1
2
REG1.5

+3VSUS

+3VSUS

+5VSUS

C453
.1U

VCCCB

VPPCB

1nF

TPS_DATA
TPS_LATCH
TPS_CLOCK

1nF

C439

1nF

C444

1nF

C443

.1U

C427

.1U

C432

.1U

C433

1U_10V 1U_10V .1U

C431

VPPCB

C440

C438

C426

+3VSUS

Title

TI_PCI7515
Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
2

Rev
1A
Sheet

21

of
1

49

CT_0217: Change C450


from 10U_4V to 10U_10V.

+3VSUS

VCC_PLL
L38

BLM15AG700SN1

C450
C449
0.001uF_0402

VDPLL_15

1U_10V

10U_10V

C452

C727
.1U_10V

+3VSUS
U14B

VCC_PLL

1394 CONN

6.34K/F

R13

TPBIAS0

TPA0+
TPA0-

V14
W14

TPA0P
TPA0N

TPB0+
TPB0-

V13
W13

TPB0P
TPB0N

PHY_TEST_MA

P17

PHY_TEST_MA

TPBIAS0

TPBIAS0
C108
1U_10V

R75

R76

56.2/F

56.2/F

+3VSUS
4.7K

TPA0P

L10
PLW3216S900SQ2T1
<PN>
F_TPA0P
3 3
4 4

TPA0N

TPB0P

TPB0N

TI PCI4515- 2 of 2
R12

CNA

P18

XO

R18

F_TPA0N

4
3
2
1

F_TPB0P

F_TPB0N

L11
PLW3216S900SQ2T1
<PN>

CPS
R72

TYCO_IEEE1394

R74

56.2/F
X0

A1+
A1B1+
B1-

56.2/F

C113 12pF_0402
TPB0

CPS

J4

R347

T19

R1

R348

P13
P14
U15
U19
P15
T18

AVD1
AVD2
AVD3
VDPLL_33
VDPLL_15
R0

X2

C103

24.576MHZ
<PN>

R73
5.11K/F

220pF

XI

R19

X1

C114 12pF_0402

Layout and design guidelines for the 1394 signals:

TPBIAS1

W17

TPA1+
TPA1-

V16
W16

TPB1+
TPB1-

V15
W15

1. The differential impedance of the twisted pair signals (i.e. TPA0+/TPA0- and
TPB0+/TPB0- should nominally be 110 Ohm. Verification by TDR per the 1394 Base Test
Specification is recommended. The differential through impedance looking into the
connector with all components installed must be 90 - 130 Ohms.
2 Propagation delay of the differential pairs should be minimized. The skew of the
differential signals must be less than 100 ps as measured per the 1394 Base Test
Specification.

PCI4515

3. Jitter of the twisted pairs must be less than 150 ps as measured by the 1394 Base
Test Specification. Jitter can be minimized by appropriate decoupling and filtering
of the PLL Vcc as implemented in these reference schematics.

QUANTA
COMPUTER

Title

TI_PCI7611_1394 & CONN

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
2

Rev
1A
Sheet

22

of
1

49

15

PCLK_MINI

PCLK_MINI

2
1 2

RP13
C377

LED_WLAN24_ON
LED_WLAN5_ON

*4.7U_10V_0805_NC

1
3

2
4

4P2R-S-100K
A

C392
*15P_NC

AD[0..31] 10,21,35

C395

*.1U_10V_NC *.047U_NC

C416

*.1U_10V_NC *.047U_NC

C400

C386

R290
*33_NC

+3VRUN

J8

AC-Terminator

TIP

RING

2
+3VRUN

PIRQD#

PCLK_MINI
10

REQ3#
AD31
AD29
AD27
AD25

30 COEX2_WLAN_ACTIVE
10,21,35

C/BE3#

C/BE3#
AD23
AD21
AD19

10,21,35
10,21,35

C/BE2#
IRDY#

10,21,25,35 CLKRUN#
10,21,35 SERR#
10,21,35
10,21,35

PERR#
C/BE1#

AD17
C/BE2#
IRD Y#
CLKRUN#
SERR#
PERR#
C/BE1#
AD14
AD12
AD10
AD8
AD7
AD5
AD3

+5VRUN

AD1

25,26 DEBUG_ENABLE

DEBUG_ENABLE

8PMJ-1
8PMJ-2
8PMJ-4
8PMJ-5
LED2_YELP
LED2_YELN
RESERVED3
5V_2
INTA#
USBD3.3VAUX1
RST#
3.3V_5
GNT#
GND9
PME#
BT_ACTIVE
AD30
3.3V_6
AD28
AD26
AD24
IDSEL
GND10
AD22
AD20
PAR
AD18
AD16
GND11
FRAME#
TRDY#
STOP#
3.3V_7
DEVSEL#
GND12
AD15
AD13
AD11
GND13
AD9
C/BE0#
3.3V_8
AD6
AD4
AD2
AD0
RESERVED5
RESERVED6
GND14
M66EN
AC_SDATA_OUT
AC_CODEC_ID0#
AC_RESET#
RESERVED7
GND15
SYS_AUDIO_IN
SYS_AUDIO_IN GND
AUDIO_GND3
MPCIACT#
3.3VAUX2

+3VRUN
U25
7SH32

LED_WLAN24_ON
LED_WLAN5_ON

4
1

LAN_R_ON 32

+5VRUN
PIRQB#

10

+3V_LAN

PCI_PME#

PCIRST#

10,21,35

GNT3#

10

PCI_PME# 21,25,26,35
COEX1_BT_ACTIVE 30

AD30

10,21

8PMJ-3
8PMJ-6
8PMJ-7
8PMJ-8
LED1_GRNP
LED1_GRNN
CHSGND
INTB#
3.3V_1
USBD+
GND0
CLK
GND1
REQ#
3.3V_2
AD31
AD29
GND2
AD27
AD25
WLAN_ACTIVE
C/BE3#
AD23
GND3
AD21
AD19
GND4
AD17
C/BE2#
IRDY#
3.3V_3
CLKRUN#
SERR#
GND5
PERR#
C/BE1#
AD14
GND6
AD12
AD10
GND7
AD8
AD7
3.3V_4
AD5
RESERVED1
AD3
5V_1
AD1
GND8
AC_SYNC
AC_SDATA_IN
AC_BIT_CLK
AC_CODEC_ID1#
MOD_AUDIO_MON
AUDIO_GND1
SYS_AUDIO_OUT
SYS_AUDIO_OUT GND
AUDIO_GND2
RESERVED2
VCC5A

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

AD28
AD26
AD24
MINI_IDSEL
AD22
AD20
PAR
AD18
AD16
FRAME#
TR DY#
STOP#
DEVSEL#

R302
*10K_NC
R309
2

100
1

AD19

PAR

10,21,35

FRAME#
TRDY#
STOP#

10,21,35
10,21,35
10,21,35

26,30 HW _RADIO_DIS#

3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

+3VRUN

DEVSEL# 10,21,35

AD15
AD13
AD11
AD9
C/BE0#

C/BE0#

10,21,35

AD6
AD4
AD2
AD0

DEBUG_OUT

DEBUG_OUT 25

R349
1

10K
2

+3VSUS

+3V_LAN

MINI-PCI_AMP

QUANTA
COMPUTER

Title

MINI-PCI &MDC

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

23
8

49

+3VSUS

C554
2.2U_10V

C552
.01U

JS1

MDC_NUT

J9
10 IAC_SDATAO_MDC
10 IAC_SYNC_MDC
10 IAC_SDATAIN1
10 IAC_RESET#_MDC

2
33

GND1
IAC_SDATO
GND2
IAC_SYNC
IAC_SDATAIN
IAC_RESET#

Reserved1
Reserved2
3.3V
GND3
GND4
IAC_BITCLK

MDC

2
4
6
8
10
12

+3VSUS
IAC_BITCLK_MDC

IAC_BITCLK_MDC 33

R426
*33_NC

New MDC
1 2

C561
*10P_NC

C558
*10P_NC

1
R430

1
3
5
7
9
11

JMODEM1

Keep the space 40mil between Tip/Ring.

38
38

TIP
R ING

TIP
RING

MDC CONN.
C256

C255

1
2
3
4
5

1
2
3
4
5
53398-0590

300P_1808_3KV
CC1808

300P_1808_3KV
CC1808

TIP & RING To Docking and MDC CONN.

QUANTA
COMPUTER

Title

MDC CONN.

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

24
8

49

+3VRUN
+3VRUN
2

+3VALW

RP14

USIO2A
1

ATF_INT#

LRESET#

L2

DLDRQ1#
DLFRAME#
DLAD0
DLAD1
DLAD2
DLAD3
DSER_IRQ
DCLKRUN#

R2
T2
N2
P1
P2
N3
R4
T3

LDRQ1#
LFRAME#
LAD0
LAD1
LAD2
LAD3
SER_IRQ
CLKRUN#

R3
N4
M3
R1
T1
P3
T4
P5

GPIOA0
GPIOA1
GPIOA2
GPIOA3/WINDMON

B1
D4
C1
E3

POWER_SW_IN#
ACAV_IN
ALWON
TESTA

F5
F4
F6
F2

A15
D13
A14
C12
B13
A13
D12
F11

LGPIO60
LGPIO61
LGPIO62
LGPIO63
LGPIO64
LGPIO65
LGPIO66
LGPIO67

17
LCD_TST
19 IDERST_MOD
17 FPBACK_EN
T85
PAD
T83
PAD
T36
PAD
19
MODC_EN#
19
HDDC_EN#

B12
A12
C11
D11
E11
A11
F10
C10

R64
LCD_TST

*10K_NC

10K
2

+RTC_PWR3_3V
U9

C79

SHDN

GND

1U_25V

1K
1

COM1

LGPIO70
LGPIO71
LGPIO72
LGPIO73
LGPIO74
LGPIO75
LGPIO76
LGPIO77

VCCRTC

VCCRTC_D 2

E2

1
RB751V

VCC0/BAT

LPT

C85
.1U_10V

C401
.047U

.1U_10V .047U

C410

C411
4.7U_10V_0805

C406

.047U

C378

.047U

C391

.1U_10V .047U

*10U_10V_NC

10U_10V

10U_10V

C405

C383

+3VALW
C731

nRI

B10

RI0#

GPIO10
IRRX
IRTX

H15
K14
M4

.047U

.047U

.1U_10V

C379

C398
4.7U_10V_0805

L35
1

+3VRUN

2
BLM11A121S

VCC

M7
R13
L11
H12
E14
B11
B7
A1

VCC1_1
VCC1_2
VCC1_3
VCC1_4
VCC1_5
VCC1_6
VCC1_7
VCC1_8

G2
M2
P4
J2

VCC2_1
VCC2_2
VCC2_3
VCC2_4

R5

VCC2/PLL

P6

VSS/PLL

OUTD3/nACK
GPIOB2/nSLCTIN
GPIOB1/nINIT
GPIOB2/nALF
GPIOB0/nSTROBE
OUTD2/BUSY
OUTD1/PE
OUTD0/SLCT
OUTD4/nERROR
GPIOC0/PD0
GPIOC1/PD1
GPIOC2/PD2
GPIOC3/PD3
GPIOC4/PD4
GPIOC5/PD5
GPIOC6/PD6
GPIOC7/PD7

GND

C389

C382

+3VRUN
CT_0310: Adding C729~C730 2x10U
Caps to fix rebooting issue of reflash.

RXD0
TXD0
RTS0#
CTS0#
DTR0#
DSR0#
DCD0#

27
27
27
27
27
27
27

R493
10K

RI0#

27
+3VALW

D8

C730

K1
K5
K4
K3
K6
K2
L1

RXD
TXD
nRTS
nCTS
nDTR
nDSR
nDCD

IRMODE
IRRX
IRTX

IRMODE
IRRX
IRTX

37
37
37

R298
100K

R52
2

C729

POWER_SW# 31,32

Dash Board Power Bottom

C374
1U_10V

+3VRUN

LPC
GPIO

IR
RB751V

RBAT_3V

PAD

D9
2

33

T25

C80
1U_10V

IN

C81

.1U_50V

MAX1615
OUT 3
5/3# 4

LCD_CL#_SIO

R258
1

H7
J4
J5
J7
K7
G1
G5
F1
J6
J1
H2
H1
H3
H4
H5
H6
H8

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12

C2
G4
J3
N1
N5
T10
R15
J11
G14
B15
G9
B6

AGND

F3

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

ACK#
SLCT_IN#
INIT#
AFD#
STRB#
BUSY
PE
SLCT
ERROR#

28
28
28
28
28
28
28
28
28

P D[0..7]

32

LID_CL#

R299
1

PW R_SRC
R57
1

ACAV_IN 40,41
ALWON
45

LCD_CL#_SIO

2
1

BIA_PWM 6

R260
100K

C394
.1U_10V

PAD
PCI_PME#
ATF_INT#

11
SLP_S3#
21,23,26,35 PCI_PME#
31
ATF_INT#
11
SLP_S5#
33 SPDIF_SHDN

R259
*100K_NC

PAD
PAD
PAD

11 ICH_PCIE_WAKE#
27,39,46 RUN_ON
10
ICH_PME#
11
THRM#
39,45,46 SUS_ON
11
PWRBTN#
19,26 SATA_DET#
31 5V_CAL_SIO#

T141

+3VALW

T26
T72
T30

VCCRTC

LGPIO50
LGPIO51
LGPIO52
LGPIO53
LGPIO54
LGPIO55
LGPIO56
LGPIO57

DEBUG_ENABLE
DEBUG_OUT

8051
GPIO

LPC_DRQ1# 10
LFRAME#/FWH4 10
LAD0/FWH0 10
LAD1/FWH1 10
LAD2/FWH2 10
LAD3/FWH3 10
SERIRQ 10,11,21
+RTC_PWR3_3V
CLKRUN# 10,21,23,35
2

26,38 DOCK_SIO_ALERT#

T5
N6
L6
R6
T6
L7
P7
N7

11
EXT_SMI#
11
EXT_SCI#
11
EXT_WAK#
10
RCIN#
33
NB_MUTE
33
BEEP
23,26 DEBUG_ENABLE
23 DEBUG_OUT

LPC

SGPIO40
SGPIO41
SGPIO42
SGPIO43
SGPIO44
SGPIO45
SGPIO46
SGPIO47

PAD

C16
B16
C15
A16
D14
C14
C13
B14

T140

32,45
USB_EN#
19
MODPRES#
19
USB/IDE#

*MOLEX-53398-0390_NC

SGPIO30
SGPIO31
SGPIO32
SGPIO33
SGPIO34
SGPIO35
SGPIO36
SGPIO37

1 OF 2
DOCK LPC
256 - LBGA

D_SERIRQ
D_CLKRUN#

D_DLDRQ1# 38
D_LFRAME# 38
D_LAD0 38
D_LAD1 38
D_LAD2 38
D_LAD3 38
D_SERIRQ 38
D_CLKRUN# 38

D_LAD0
D_LAD1
D_LAD2
D_LAD3
D_SERIRQ
D_CLKRUN#

F13
F14
E16
E15
E12
E13
D16
D15

21 CBUS_GRST#
33,34 HP_NB_SENSE
43,44,46 RUN_ON_D
36,45
AUX_EN

DEBUG_ENABLE
DEBUG_OUT

1
2
3

6,10,11,16,19

MACALLEN III
A

JDEBUG2

4P2R-S-100K
PLTRST#

4
2

LPC47N354

10K
2

3
1

R261
100K
R291
1

LID SWITCH

PD[0..7]

28

L32
RAGND 1

2
BLM11A121S

LPC47N354

VCC_SIO_PLL

C387
.1U_10V

QUANTA
COMPUTER

Title

Ultra I/O Controller LPC47N354

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

25
8

49

BID3
0
0
0
0
0
0
0

C371
15P

PAD
PAD
PAD
PAD

CLK_SM1
DAT_SM1
30
30

CLK_SM2
DAT_SM2

CLK_KBD
DAT_KBD
47 PBAT_ALARM#

+3VALW
1
2

R313
10K
CHG_SBATT

29

C3
D3
D10
E10

GPIO96
GPIO97
MSCLK
MSDAT

G6
G3

EMCLK
EMDAT

B3
C4

GPIO94/IMCLK
GPIO95/IMDAT

M1
M5

KCLK
KDAT

KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0

GPIO6
GPIO5
GPIO4
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0

KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0

M9
L9
K9
K10
M10
R10
N10
P10

KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0

SIO_FD0
SIO_FD1
SIO_FD2
SIO_FD3
SIO_FD4
SIO_FD5
SIO_FD6
SIO_FD7

T11
R11
M11
N11
P11
T12
R12
M12

FD0
FD1
FD2
FD3
FD4
FD5
FD6
FD7

GPIO

K13
D2
L5

AB1A_DATA
AB1A_CLK
AB1B_DATA
AB1B_CLK
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO19

D9
C9
F9
E9
H16
H14
J15
J13
A10
H9
F16

2
1

R287
*10K_NC

2
1

R301
*10K_NC

2
R296
10K

R280
10K
1

LAN_LOW_PWR# 35

R289
*10K_NC
1

R279
10K

R288
*10K_NC

BID0
BID1
BID2
BID3
2

+3VALW

R292
10K

CHG_PBATT 40
SBAT_LOW 40
PAD T147

PAD T144
PAD T145

Board ID

T56 PAD
CT_0217: Pop R296,R280,R292 10K, Depop R301,R287,R289 10K.

BREATH_LED# 32
FAN1_PWM 31
RUNPWROK 39,42

VCC1_PWROK

VCC1_PWROK 29

RESET_OUT# 39
DAT_SMB 29,31
CLK_SMB 29,31

SBAT_SMBDAT
SBAT_SMBCLK

RP17
1
3

PBAT_SMBDAT
PBAT_SMBCLK

3
1

DOCK_SMB_DAT 38
DOCK_SMB_CLK 38
SBAT_SMBDAT 47
SBAT_SMBCLK 47
PBAT_SMBDAT 17,41,47
PBAT_SMBCLK 17,41,47
FAN1_TACH 31
PAD T78
GATEA20 10

PCI_CLK

L3
B2
L4

NC_32KHZ

FA0
FA1
FA2
FA3
FA4
FA5
FA6
FA7
FA8
FA9
FA10
FA11
FA12
FA13
FA14
FA15
FA16
FA17
FA18
FA19
FA20
FA21
FA22

N12
T13
P12
T14
T15
R16
N13
P16
M14
N15
N16
M13
L12
M15
M16
L14
L13
L15
L16
K11
R14
T16
P13

SIO_FA0
SIO_FA1
SIO_FA2
SIO_FA3
SIO_FA4
SIO_FA5
SIO_FA6
SIO_FA7
SIO_FA8
SIO_FA9
SIO_FA10
SIO_FA11
SIO_FA12
SIO_FA13
SIO_FA14
SIO_FA15
SIO_FA16
SIO_FA17
SIO_FA18
SIO_FA19

nFRD
nFWR
nFCS

P14
N14
P15

FLASH

10K
2

EEPROM_WC 29
DOCK_PWR_EN 38
HW _RADIO_DIS# 23,30

GPIO83/32KHZ_OUT
CLOCKI

K/B

R306
1

R272
*10K_NC

BAT1_LED# 32
LPC_DRQ0# 10
BAT2_LED# 32

D7
C7
F7
A6
E6
D6
C6
E7
A7
G7
G8
F8

PWRGD
VCC1RST#
nRESET_OUT

10K
1

K15
K16
J9
M6
J10

R257
2

SYSOPT0
SYSOPT1
nBAT_LED
LDRQ0#
nPWR_LED

PAD T82

EC_XOSEL

E4
J12

OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11

MISC

CLOCK

G15
G12
G16
R7
T7
K8
J8
L8
M8
N8
P8
T8
R8
R9
T9
P9
N9

SIO_FD[0..7]

SIO_FD[0..7]

GPIO84
GPIO85
GPIO86
GPIO87
GPIO90
GPIO91
GPIO92
GPIO93

XOSEL
nEC_SCI

RP16

4P2R-S-10K
2
4

+3VALW

4P2R-S-4.7K

3
1

4
2

+5VALW

4P2R-S-10K

PCLK_SIO 15
PAD

JKB2

T23
14M_SIO

R264
33

15

R265
*33_NC

C369
22P

26
27
28
29
30

C370
*22P_NC

SIO_FA[0..19]

SIO_FA[0..19] 29

PAD T37
PAD T38
PAD T86
FRD#
FWR#
FCS#

Keyboard
CONN

29
29
29

KSO10
KSO11
KSO9
KSO14
KSO13
KSO15
KSO16
KSO12
KSO0
KSO2
KSO1
KSO3
KSO8
KSO6
KSO7
KSO4
KSO5
KSI0
KSI3
KSI1
KSI5
KSI2
KSI4
KSI6
KSI7

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

JAE_FK1S030W52

+3VALW
RP18
PBAT_ALARM#

LPC47N354

10
9
8
7
6

PCI_PME#
SATA_DET#
DOCK_SIO_ALERT#
DEBUG_ENABLE

1
2
3
4
5

PCI_PME# 21,23,25,35
SATA_DET# 19,25
DOCK_SIO_ALERT# 25,38
DEBUG_ENABLE 23,25

+3VALW

10P8R-4.7K

1
2

C397
*100P_NC

CP3
8
6
4
2

CP4
7
5
3
1

KSI6
KSI4
KSI2
KSI5

8
6
4
2

*8P4C-100P_NC

100P CAPS CLOSE TO JKB1

KSI7

CP5
7
5
3
1

KSI1
KSI3
KSI0
KSO5

8
6
4
2

*8P4C-100P_NC

CP6
7
5
3
1

KSO4
KSO7
KSO6
KSO8

8
6
4
2

*8P4C-100P_NC

4
2

RP15

14.7K R262 2

14.7K R263 2

14.7K R256 2

14.7K R255 2

T70
T69
T79
T81

256 - LBGA

KAH_PGM#

10K
B

2 OF 2

L10
K12

+5VRUN

MACALLEN III

FPGM
TEST_PIN

10K
2

R497

LPC47N354

IN0
IN1
IN2
IN3
IN5
IN6
IN7
GPIO0
GPIO1
GPIO2
GPIO3
GPIO7
GPIO8
GPIO9
GPIO17
GPIO20
GPIO21
GPIO82/FAN_TACH3

R310
1

A9
B9
B8
A8
C8
D8
E8
H13
H11
H10
G10
KSO16 G13
J14
CAP_LED#
J16
NUM_LED#
G11
SRL_LED#
F15
CHG_SBATT
PS_ID
F12
PS_ID
A5
T33
PAD
BID0
B5
BID1
E5
BID2
D5
BID3
A4
B4
47 PS_ID_DISABLE#
C5
T143 PAD
Integrted GX
A3
A2
T24
PAD

XTAL1
XTAL2

Integrted GX

Board Revision
PROTO1
PROTO1.5
PROTO2.0
PROTO3.0
QT
RAMP1

E1
D1

32
32
32
40
47

0
1
0
1
0
1

USIO2B
CLK_32KX1_SMC
CLK_32KX2_SMC
DOCKED
T34 PAD
38 DOCK_SMB_INT#
6,17
FPVCC
47 SBAT_ALARM#
40,47 SBAT_PRES#
47 PBAT_PRES#
31 THERMTRIP_SIO
3
PROCHOT#
T142 PAD
T80
PAD

38
38

BID0

0
0
1
1
0
0

+3VRUN

36,38

38
38

BID1

0
0
0
0
1
1

R297
4.7K

32.768KHZ

R293
100K

BID2

C356
15P

R304
*4.7K_NC

CLK_32KX1_SMC

3
1

W3
CLK_32KX2_SMC

+3VSUS +5VALW +3VALW

CP7
7
5
3
1

KSO3
KSO1
KSO2
KSO0

8
6
4
2

*8P4C-100P_NC

KSO12
KSO16
KSO15
KSO13

*8P4C-100P_NC

QUANTA
COMPUTER

CP8
7
5
3
1

8
6
4
2

7
5
3
1

KSO14
KSO9
KSO11
KSO10

*8P4C-100P_NC

Title

Ultra I/O Controller LPC47N254(GPIO/KB/MISC/FLASH)


Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

26
8

49

+5VSUS
JCOM1

25
25
25

TXD0
RTS0#
DTR0#
DCD0
RI0
RXD0#
CTS0
DSR0

25,39,46 RUN_ON
+5VSUS

T1IN
T2IN
T3IN

T1OUT
T2OUT
T3OUT

9
10
11

4
5
6
7
8

R1IN
R2IN
R3IN
R4IN
R5IN

R2OUTB
R1OUT
R2OUT
R3OUT
R4OUT
R5OUT

20
19
18
17
16
15

INVILID
GND

21
25

22
23

FORCEOFF
FORCEON

DS0019-D2
<VENDOR>

C632 C633 C634 C635 C636 C637 C638 C639


270P

270P

270P

270P

270P

270P

270P

270P

14
13
12

C640 .47U_0805
1
2

C2-

C2+

V-

C630 .47U_0805
1
2

V+

27

26

VCC

C1-

24

5
9
4
8
3
7
2
6
1

BLM11A121S
BLM11A121S
BLM11A121S
BLM11A121S
BLM11A121S
BLM11A121S
BLM11A121S
BLM11A121S

C1+

2
2
2
2
2
2
2
2

C631 .47U_0805
1
2

U39
28

1
1
1
1
1
1
1
1

C629 .1U_50V
1
2

L53
L54
L55
L56
L57
L58
L59
L60

RI0
DTR0
CTS0
TXD0#
RTS0
RXD0#
DSR0
DCD0

C628
.1U_10V

SERIAL PORT

TXD0#
RTS0
DTR0

Place them close to serial port


DCD0#
RI0#
RXD0
CTS0#
DSR0#
PAD

25
25
25
25
25

T122

MAX3243(TI)/ICL3243E
B

If MAX3243 pin 22 tied to RUN_ON,then it can not support Ring Out

QUANTA
COMPUTER

Title

SERIAL PORT & USB

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

27
8

49

VCCLPTPP
VCCLPTPP
+5VRUN
1

RV4
*VZ0603M260APT_NC

10P8R-4.7K

25

R449
R450
R451
R452
R453
R454
R455
R456
R457

STRB#
PD0
PD1
PD2
PD3

25

AFD#

25

ERROR#

25

INIT#

25

SLCT_IN#

2
2
2
2
2
2
2
2
2

1
1
1
1
1
1
1
1
1

C651
270P

RV5
*VZ0603M260APT_NC

RV6
*VZ0603M260APT_NC

1
2

C650
270P

C647
270P

C646
270P

1
2

C649
270P

C645
270P

1
2

C648
270P

1
2

*1.5K/F_NC

C644
270P

C643
270P

10P8R-4.7K

R448

JLPT1
STRB#_R
AFD#_R
PD0_R
ERROR#_R
PD1_R
INIT#_R
PD2_R
SLCT_IN#_R
PD3_R

10
10
10
10
10
10
10
10
10

PD4

R458 2

1 10

PD4_R

PD5

R459 2

1 10

PD5_R

PD6

R460 2

1 10

PD6_R

PD7

R461 2

1 10

PD7_R

25

ACK#

R462 2

1 10

ACK#_R

25

BUSY

R463 2

1 10

BUS Y_R

25

PE

R464 2

1 10

PE_R

25

SLCT

R465 2

1 10
1

DS01A91-WL36-TR

C655
270P

C658
270P

C659
270P

VCCLPTPP

VCCLPTPP

C660

C661

C657
270P

C656
270P

C654
270P

25

PD[0..7]

P D[0..7]

C653
270P

1
2
1

1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13

SLCT_R
C652
270P

C641
*.1U_10V_NC

10
9
8
7
6

C642
.1U_10V

1
2
3
4
5

10
9
8
7
6

1
2
3
4
5

RP39
RP40

D18
RB751V

RV8

RV7

*VZ0603M260APT_NC
1

*VZ0603M260APT_NC

RV9
*VZ0603M260APT_NC

RV10
*VZ0603M260APT_NC

2
2

*.1U_10V_NC

*.1U_10V_NC

QUANTA
COMPUTER

Title

PARALLEL CONN.

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

R ev
1A
Sheet
E

28

of

49

BIOS FLASH MEMORY

8Mbit (1M Byte),ISN'T PLCC TYPE

FCS#
FRD#
FWR#

22
24
9

CE#
OE#
WE#

SIO_FD0
SIO_FD1
SIO_FD2
SIO_FD3
SIO_FD4
SIO_FD5
SIO_FD6
SIO_FD7

D0
D1
D2
D3
D4
D5
D6
D7

25
26
27
28
32
33
34
35

RESET#/NC
RY/BY#/NC
NC1
NC2
NC3

10
12
29
38
11

+3VALW

VCC
VCC

31
30

GND
GND

23
39

SIO_FD[0..7] 26

VCC1_PWROK
T64

C95
.1U_10V

VCC1_PWROK 26

PAD

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

FCS#
FRD#
FWR#

21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37

26
26
26

SIO_FD[0..7]

U10
SIO_FA0
SIO_FA1
SIO_FA2
SIO_FA3
SIO_FA4
SIO_FA5
SIO_FA6
SIO_FA7
SIO_FA8
SIO_FA9
SIO_FA10
SIO_FA11
SIO_FA12
SIO_FA13
SIO_FA14
SIO_FA15
SIO_FA16
SIO_FA17
SIO_FA18
SIO_FA19

C94
.047U
3

SIO_FA[0..19]

26 SIO_FA[0..19]

ST Micro M29W008AB/AMD-29LV081B/SST39VF080

AMD :Pin 10 is RESET# ; Pin12 is RY/BY#


SST :Pin10,12 are NC
1.AMD-29LV081B require MAX 500nS Tready for it's hardware
reset.And MAX6326_UR29 has >100mS reset timing.So we can tie
it's reset# pin to +3VALW directly.
2.SIO has internal 20 mS delay of VCC1_PWROK

+3VALW

C101
.047U

RP6

+3VALW

1
3

+3VALW

4P2R-S-4.7K

A0
A1
A2
GND

VCC
WC
SCL
SDA

8
7
6
5

EEPROM_WC
CLK_SMB
DAT_SMB

2
4

UPW2
1
2
3
4

EEPROM_WC 26
CLK_SMB 26,31
DAT_SMB 26,31

NM24C05U

SMbus address A2

User Password

Title

QUANTA
COMPUTER
FLASH

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

R ev
1A
Sheet
E

29

of

49

Touch Pad

+5VRUN

1
3

RP19
4P2R-S-10K
2
4

JP4

26

CLK_SM2

26

DAT_SM2

R324
1

1
2
3
4
5
6
7
8

1
R325

CLK_SM2_R

DAT_SM2_R
TPVCC

+5VRUN

1
2
3
4
5
6
7
8

R70
2
4
6
8

TPVCC

Molex-528080890-8P

C99
.047U

1
3
5
7

C98

.1U_10V

0_0805
CP2
8P4C-10P

+3VRUN

Bluetooth

R423
0_0805

J10
1
3
5
7
9

23,26 HW _RADIO_DIS#
PAD T105
11
USB_VD2+

GND
Activity LED
3.3V(Logic)
COEX2
Radio Enable/Disable# COEX1
RSVD
USBUSB+
GND

2
4
6
8
10

WPAN_RADIO_ON 32
COEX2_WLAN_ACTIVE 23
COEX1_BT_ACTIVE 23
USB_VD2- 11

BM10B-SRSS-10P-R

R429
10K
1

C556
.1U_10V

QUANTA
COMPUTER

Title

TOUCH PAD & BULE TOOTH

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

30
8

49

FAN Controller & FAN CONN.

15V
+5VRUN

+3VRUN

.1U_50V

1
2
5
6

U26A
LM358

120K
1

R252
2

26 FAN1_PWM

C384
1
2

FDC653N
4

FAN1_TACH 26

C372
2
1

C375
.22U_0805

R40
10K

Q13

FAN1

2200P

J5
VCCFAN1

2
1

78.7K/F
R42
120K

+5VSUS

RT2 should be placed between NB and SO-DIMM on BOT side.

+RTC_PWR3V

+3V_PWROK#

21

POWER_SW#

THERMTRIP1#

THERMTRIP2#
R233
10K
1
2

THERMTRIP2#

THERMTRIP3#

22
14
3

1 1
C348
2200P

RESSERVED

16

REM_DIODE1_N
REM_DIODE1_P

19
20

THERMTRIP_SIO
THERM_STP#

15
24

INTRUDER#

12

degree
C
2

5V_CAL_SIO# 25

Q32
2N7002
Place under CPU

REM_DIODE1_N
REM_DIODE1_P

+3VSUS
VSUS_PWRGD

10

R246
10K

t 10Kohm
@25

6N300_VCP

23

4
11

THERMTRIP1#

+3VALW

VSET
HW_LOCK#
VSS

C357
2200P

R244
100K

Q10
3904

Put 2200P close to Guardian.

Guardian temp-tolerance= +/-3 degree C

VCP

1
1

REM_DIODE2_P
REM_DIODE2_N

1K
2

25,32 POWER_SW#

R223
43K/F

SMBADDRSEL

C364
.1U_10V

+5VSUS
RT2
TH11-3H103FT

ICH_PWROK#

U201_VCC
1
2
R250
1K
R229
1

ATF_INT#

Set trip point=90 degree c


Vset = (90-75)/16= 0.9375 V

18
17

THDAT_SMB
THCLK_SMB

C360
2200P

11,21,39 SUSPWROK

C365
+3VSUS
.1U_10V

DAT_SMB 1
CLK_SMB 2
1K
2 13

C349
2200P

EMC6N300

R249
1K

THERMTRIP_SIO 26

THERM_STP# 45

R224
10K/F

1
2

THERMDC

R253
1

Vset=(Tp-75)/16
Where Tp=75 to
106 degree C

CLK_SMB

THERMDA

C350
.1U_10V

VCCRTC

Notes:

DAT_SMB

26,29

49.9/F
2

R222
1

+3VSUS

26,29
Q34

R232
2.21K/F

U24

THERMDC

THERMDA

ICH_PWROK#

2N7002

RT2:
1. Mitsubishi 1% 0603 10K ohm@25 degree C. P/N: TH11-3h103FT
2. Panasonic 1% 0603 10K ohm @25 degree C. P/N:ERTJ1VG103FA

ATF_INT# 25

R295
100K

MOLEX-53398-0390

+3VSUS

11,39 ICH_PWROK

C70
22U

DAN202U

D7

1
2
3

1
R41

SM_INTRUDER# 10

GUARDIAN IC
+3VSUS

+3VSUS

R245
8.2K

THERMTRIP1#

1
2
3904

C362
*.1U_10V_NC

2.2K
2

QUANTA
COMPUTER

6 THERMTRIP_GMCH#

THERMTRIP#

CPU THERMTRIP

C358
*.1U_10V_NC

2
3904

R266
1

2.2K
2

R270
1

Q31
Q30

THERMTRIP2#

VCCP

VCCP

R228
8.2K

Place C358 close to Guardian

Place C362 close to Guardian

NB THERMTRIP

Title

FAN & THERMAL


Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

31
8

49

SW2
+3VRUN

1
2
3
4

LID_CL#

25

Q6
4

10

SPPB53V

47K
2

SATA_LED#

10K

LID SWITCH

DTA114YUA
HDD_LED

HDD_LED 38

HDD LED

+5VALW

+5VALW

+3VRUN

Q4

R156
150

47K

26

BAT1_LED#

Q5

DTA114YUA

47K
26

BAT2_LED#

10K

Q16
3904

BAT1_LED

10K
2

30 WPAN_RADIO_ON

R157
1

10K
WPAN_RADIO_ON

DTA114YUA

BAT2_LED

BATTERY 1,2 LED

WPAN_RADIO_ON_T

WIRELESS/BLUETOOTH LED

+3VSUS

U4

26 BREATH_LED#

BREATH_PWRLED

J6
7SH04

+3V_LAN

BREATH LED

BREATH_PWRLED

35,38 LAN_ACTLED#
35,38 100M_LINK#
35,38 10M_LINK#
11
OC4#
11
OC6#
11
OC5#

11
J2
+3VRUN
26
CAP_LED#
25,31 POWER_SW#
26
NUM_LED#
26

SRL_LED#

CAP_LED#
POWER_SW#
NUM_LED#
SRL_LED#
WPAN_RADIO_ON_T

23

LAN_R_ON

LAN_R_ON

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

36
36

TXOP_A
TXON_A

36
36

RXIP_A
RXIN_A

OC7#
TXOP_A
TXON_A
RXIP_A
RXIN_A

50
48
46
44
42
40
38

50
48
46
44
42
40
38

49
47
45
43
41
39
37

49
47
45
43
41
39
37

34
32
30
28
26
24
22
20
18

34
32
30
28
26
24
22
20
18

33
31
29
27
25
23
21
19
17

33
31
29
27
25
23
21
19
17

14
12
10
8
6
4
2

14
12
10
8
6
4
2

13
11
9
7
5
3
1

13
11
9
7
5
3
1

+5VSUS
C232
.1U

HDD_LED
BAT1_LED
BAT2_LED
2

USB_VD4- 11
USB_VD4+ 11
USB_VD6+ 11
USB_VD6- 11
USB_EN# 25,45
USB_VD5+ 11
USB_VD5- 11
USB_VD7+ 11
USB_VD7- 11

Foxconn-QT8B0501-1111

MB TO I/O-BOARD CONN

2-1612037-0-20P-AMP

DASH BOARD CONN

Title

QUANTA
COMPUTER
SWITCH & LED

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

R ev
1A
Sheet
E

32

of

49

5VLDO
+5VSUS

GND

Vin

EN

R439
4.7K
2
VCCA_U39

L40
25
11
21

SPKR_R

HP_SPK_R 34

EAPD

C534
1
C498
1
C527
1
C533
1
C532
2

.047U_16
2
.047U_16
2
.47U_10V
2
.47U_10V
2
.47U_10V
1

38

C_SPKR_L
C_SPKR_R

AMP_BYPASS
AUDIO_G0
AUDIO_G1

4
8

INT_SPK_L1
INT_SPK_L2

SHUTDOWN

19

NC
GND5
GND1
GND2
GND3
GND4

12
27
1
11
13
20

BYPASS

2
3

GAIN0
GAIN1

AUDIO AMP.

SPK_SHUTDOWN#

Q41

C726

C566

IAC_BITCLK

*.1U_10V_NC

*10P_NC

25,34 HP_NB_SENSE

25
1

47K

*10P_NC

LIN+
RIN+

LOUT+
LOUT-

100K
+3VRUNF

C569

9
7

ROUT+
ROUT-

INT_SPK_R1
INT_SPK_R2

R427

24 IAC_BITCLK_MDC

LINRIN-

+3VSUS

1
10 IAC_BITCLK_ICH

5
17

SPDIF_SHDN 25
R425
0

39
1
39
1

PVDD1
PVDD2
VDD

18
14

TPA6017A2/FAN7031/LM4874
R428
10K

STAC9753A

6
15
16

10

2
4
7

C563
*10P_NC

2
R434
2
R432
2

0_0603
U34

BYPASS_GND

SPDIF

*100P_NC

48

C464

SPDIF

RBAT_3V

53398-0790

*100P_NC

16
17
47

+5VSUS

HP_SPK_L 34

41

VIDEO_L
VIDEO_R
EAPD

JSPK2
8

.1U_10V
2

39

C503
.047U

R369
25

C567
1

CAP2

C504
.1U_10V

HP_OUT_R

.1U_10V

21.6dB

SPKR_L
HP_OUT_L

1
2

C526

*100P_NC

10U_10V

C463

XTL_OUT
XTL_IN

CAP2

15.6dB

RESET#
SDATA_OUT
BIT_CLK
SDATA_IN
SYNC

31
32

47K

Q39
2N7002

Q40
2N7002

Q38
2N7002

*DTC144EUA_NC

*10K_NC

R500

EAPD

NB_MUTE

LINE_IN_R

N/C2

C500

1
2
3
4
5
6
7

AFLT2

10dB

1
2
3
4
5
6
7

AFLT2

6dB

AFLT1

30

1000P_NPO
2
1000P_NPO
2

29

C564
1
C559
1

*100P_NC

1 2

AFLT1
LINE_IN_L

R431
*10_NC

VREFOUT

AC97_REF

C462

3
2

14M_AC97

AC97VREFI

28

AV

C461

17

1
33

27

GAINO GAIN1

2
R435

10 IAC_SDATAIN0
10 IAC_SYNC_AUDIO

VREF

2.2U_10V
2
.1U_10V
2
*.1U_10V_NC
2

11
5
IAC_BITCLK
6
R_IAC_SDATAIN08
10

10 IAC_RESET#_AUDIO
10 IAC_SDATAO_AUDIO

+5VSUS
C580
1
C576
1
C573
1

24

MIC1

BEEP Controller Circuit

23

CD_L
CD_C
CD_R

C572
*1nF_NC

SPKR_L
SPKR_R

.1U_10V
BYPASS_GND
2

21

45
46

.1U_10V
PC_SPKRIN
2

R437
8.2K

C579
1

18
19
20

C_NB_MICIN

NC7SZ386

NB_MICIN

.22U_0805
1

AVSS2

37

CID0
CID1

C574
1

NB_MICIN

C581
2

42

MONO_OUT

C560
1000P_NPO

PHONE
AUX_L
AUX_R
MIC2

35
36

AVSS1
HP_COMM
JACK SENSE1
N/C3

BYPASS_GND

13
14
15
22

LINE_OUT_L
LINE_OUT_R

26
40
44
33

BYPASS_GND
.1U_10V
2

PC_BEEP

AVDD1
AVDD2
JACK SENSE0
N/C1

C565
1000P_NPO

U37

25
38
43
34

1
9
C583
1

12

DVDD1
DVDD2

PC_SPKRIN

DVSS1
DVSS2

AC97_REF

10K
1
2

SPK_SHUTDOWN#

R438
4 R_PC_SPKRIN 2

6
1
3

BEEP
SPKR
PCM_SPK#

C562
.1U_10V

AC97_REF

34

U38

C467
.047U

C484
2.2U_10V

+3VRUNF

2
BLM11A601S

C582
1U_16V

C494
1U_10V

.047U

C502

.1U_10V

C501

TPS793475

C489
1U_10V

MIC_SENSE 34
1

2.2U_10V

BYP

C728

Vout

C488
2.2U_10V

C487
.1U_10V

U32

C578
.1U_10V

C557
.047U

BLM11A601S
2

L41
1

VDDA

VDDA

Headphone Power

+3VRUN

RP32
+5VSUS

4
2

3
1

AUDIO_G0
AUDIO_G1

R409
2
2
R410

*1K_NC
1
1
1K

4P2R-S-100K

QUANTA
COMPUTER

Title

AC97 CODEC/AMP

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

33
8

49

5VLDO

R408
1.3K

+5VRUN

C519

C513
1nF

L45

4.7U_10V_0805

VDDA_EXT_MIC

10K
R502
2

BLM11A121S

MIC_SENSE 33

R401
1

NB_MICIN

100/F
2

L43

CON3
1
2
6
3
4
5

EXT_MIC+

BLM11A121S
EXT_MIC_VDDA

C510

470P

C499

C505
1nF

33

R402
1.2K

470P

MONO MIC

7
8
12
9
10
11

LINE OUT

SUYIN-RC142A-12G2

HP_NB_SENSE
B

HP_NB_SENSE 25,33

R418
1

+3VRUN

13
15

INL
INR

HP_NB_SENSE

14
18

SHDNR
SHDNL

1U_16V
C548
1

1U_16V
2

C549
1U_16V

C1P
C1N

5
7

PVSS
SVSS

9
11
4
6
8
12
16
20
10
19
2
17

HP_SPK_L2
HP_SPK_R2

L46
1

BLM11A121S
HP_SPK_L3
2

1
L47

HP_SPK_R3
2
BLM11A121S

R420
2

0
1

C537
470P

C530
470P

MAX4411

C545
1U_16V

R419 *0_NC
2
1

+3VRUN

VDDA

1
3

OUTL
OUTR
NC1
NC2
NC3
NC4
NC5
NC6
SVDD
PVDD
PGND
SGND

C551

HP_SPK_L1
HP_SPK_R1

U35

HP_SPK_R

1U_16V
2

C555
1

33

HP_SPK_L

33

100K

Headphone Audio Amp.

QUANTA
COMPUTER

Title

AUDIO HEADPHONE CONN

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

34
8

49

LAN-BCM4401KFB(10/100M)

BCM4401--10/100

+3V_LAN
+1P8V_LAN

Close to power pins

PCLK_LAN
R444
*33_NC

AD16

1
R489

R488 1

2
*0_NC

67

XTAL_IN

66

XTAL_OUT

BCM4401

2
112
17
44

C610

1.21K/F

1000P_NPO

87
86
85

BOOTROM_SCL
BOOTROM_SDA

90
93
98
95
101
99

EXT_POR_L

89

JTAG_TDP
JTAG_TCK
JTAG_TDI
JTAG_TRST_L
JTAG_TMS

83
80
82
73
81

1
2

2.2U_6.3V

36
36
36
36

R483

R484

R485

R486

49.9/F

49.9/F

49.9/F

49.9/F
2

104
105
103
108
102
109
110
107

GPIO2/VAUXAVAIL
GPIO1
GPIO0

C613

TXOP
TXON
RXIP
RXIN

+3V_LAN
1

NC
NC
NC
NC
NC
NC
NC
NC

2
R440

2
BLM11A601S

.1U_10V

EPHY_TDP
EPHY_TDN
EPHY_RDP
EPHY_RDN

62
61
59
60
1

71
72
88

+1P8V_LAN

C718

EPHY_VREF
EPHY_VDAC
EPHY_TESTMODE

L49
1
2
BLM11A601S

64
1

57

+1P8V_LAN

C614

C615

R487
2

.1U_10V

1K

.1U_10V

T106
T107
+3V_LAN

T108
T109

U41

SPROM_CS
SPROM_CLK
SPROM_DOUT
SPROM_DIN
R442
1

1
2
3
4

CS
SK
DI
DO

VCC
NC
ORG
GND

8
7
6
5

VDDCORE
VDDCORE
VDDCORE

EPHY_AVDD
EPHY_PLLVDD

C611

.1U_10V

L50

91
92

96
97

106
79
94

115
125
19
30
40
52
7

65
XTAL_AVDD

REGULATOR_AVDD
REGULATOR_AVDD

+3V_LAN

C616

.1U_10V

4*AT93C46
2

Note: BCM4401 requires


16-bit R/W data width

LAN_LOW_PWR# 26

Note: The BCM4401 has weak internal pulldown resistors on


the following signals:
SPROM_CS, SPROM_CLK, SPROM_DOUT, SPROM_DIN.

Note: EXT_POR_L has a internl pull up.

200
R491

69

SPROM_CS
SPROM_CLK
SPROM_DOUT
SPROM_DIN

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

4.7K

EPHY_BIAS_AVDD

128P QFP

R490

L48
BLM11A601S
2

.1U_10V

BCM4401KQL

PCI_RST_L
PCI_CLK
PCI_GNT_L
PCI_REQ_L
PCI_PME_L
PCI_IDSEL
PCI_CLKRUN_L

C619
*22P_NC

10,21,23,25 CLKRUN#

10
GNT4#
10
REQ4#
21,23,25,26 PCI_PME#

T121

C717

12
46
111
100
84
2
24
74
13
47
120
35

15

PCI_CBE_L3
PCI_CBE_L2
PCI_CBE_L1
PCI_CBE_L0
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
PCI_DEVSEL_L
PCI_STOP_L
PCI_PERR_L
PCI_SERR_L
PCI_PAR
PCI_INT_L

PCIRST#
117
PCLK_LAN
118
GNT4#
119
REQ4#
121
PCI_PME#
113
100 2 PIDSEL 5
22

10,21,23 PCIRST#
B

4
18
32
43
20
21
23
26
27
28
29
31
116

10M_LINK# 32,38
100M_LINK# 32,38
LAN_ACTLED# 32,38

C/BE3#
C/BE2#
C/BE1#
C/BE0#
FRAME#
IR DY#
TRD Y#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PIRQC#

C/BE3#
C/BE2#
C/BE1#
C/BE0#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PIRQC#

10M_LINK#
100M_LINK#
ACTLED#

10,21,23
10,21,23
10,21,23
10,21,23
10,21,23
10,21,23
10,21,23
10,21,23
10,21,23
10,21,23
10,21,23
10,21,23
10,21

75
76
77
78

: GNT4#

C606
10U_10V

: REQ4#

Grant indicate

C600

.1U_10V

Request indicate

C599

.1U_10V

: PIRQC#

LINK_LED10#
LINK_LED100#
ACT_LED#
COL_LED#

XTAL_AVSS
EPHY_BIAS_AVSS
EPHY_AGND
EPHY_PLLGND

Interrupt Pin

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

C598

.1U_10V

68
70
58
63

: AD16

122
123
124
126
127
128
1
3
6
8
9
10
11
14
15
16
33
34
36
37
38
39
41
42
45
48
49
50
51
53
54
55

REGULATOR_VOUT1
REGULATOR_VOUT2

ID Select

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

VDDIO
VDDIO
VDDIO

VESD
VESD
VESD

U1

10,21,23 AD[0..31]

.1U_10V

C597

.1U_10V

VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI

0.1U*12 pcs

C596

114
25
56

C595

.1U_10V

C594

.1U_10V

+1P8V_LAN

C593

.1U_10V

.1U_10V

C592

.1U_10V

C591

C590

.1U_10V

C589

.1U_10V

C588

.1U_10V

.1U_10V

C587

.1U_10V

C586

C585

.1U_10V

C584
10U_10V

+3V_LAN

Y5

27P

25MHz_FSX
+/-30PPM

C719

Note: Pop R489 depop R490 when CLKRUN# is required


Pop R490 depop R489 when CLKRUN# is not required

C720
27P

QUANTA
COMPUTER

Title

BCM4401 100/10 LAN

Size

Document Number
Tahiti(DM3L)

Date:

R ev
1A

T 29, 2005

Sheet
1

35

of

49

+3V_LAN
C268

.1U

16

TXOP

35

TXON

35

RXIP

35

RXIN

R166 2
12nH 5%
R167 2
12nH 5%
R200 2
5.6nH 5%
R199 2
5.6nH 5%

TXOP_L

1Y

TXON_L

2Y

RXIP_L

3Y

RXIN_L

12

4Y

1A
1B
2A
2B
3A
3B
4A
4B

2
3
5
6
11
10
14
13

A/B
G

1
15

VCC

35

GND
U19

TXOP_A
DOCK_TDP
TXON_A
DOCK_TDN
RXIP_A
DOCK_RDP
RXIN_A
DOCK_RDN

TXOP_A

32

TXON_A

32

DOCK_TDP 38
DOCK_TDN 38
RXIP_A

32

RXIN_A

32

DOCK_RDP 38
DOCK_RDN 38
DOCKED 26,38

R196

10K

PI3L110Q

10/100LAN_E-SWITCH

+3V_SRC
+3V_LAN

PQ49
SI3456DV

1
2

PC127
.1U_10V

PR143
100K

PC126
4.7U

PR142
100K

PWR_SRC

6
5
2
1

+3V_SRC

1
PR145
200K

2
PQ51
RHU002N06

AUX_EN

PR144
470K

PQ50
RHU002N06

25,45

LAN POWER
1

Title

QUANTA
COMPUTER
LAN SWITCH/LAN POWER

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

R ev
1A
Sheet
E

36

of

49

+3VRUN

Note : Total require 1/4W, ~3.6 ohm

R71
10_0805

Total require 1/8W

U31 TFDU6102F
IRTX
IRRX
IRMODE
FIR _VCC
1

C104
C109
4.7U_10V_0805
*.1U_10V_NC

R77
10K

IREDA
IREDC
TXD
RXD
SD/MODE
VCC
MODE
GND
NC
9

R78
10K

1
2
3
4
5
6
7
8

IRTX
IRRX
IRMODE
1

25
25
25

IR_LEDA

1
2

C100
.1U_10V

2_1206
2

C112
1U_16V

R79
1

IR Detector
C

QUANTA
COMPUTER

Title
FIR

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

37
8

49

J7B
+DC_IN

VGA

J7A

+3VRUN

DVI_TDVI_T+
DVI_T+
DVI_T-

S15

S15

S17
S18
S19
S20
S21
S22
S23
S24
S25
S26
S27
S28
S29
S30
S31
S32
S33
S34
S35
S36
S37
S38
S39
S40
S41
S42
S43

S17
S18
S19
S20
S21
S22
S23
S24
S25
S26
S27
S28
S29
S30
S31
S32
S33
S34
S35
S36
S37
S38
S39
S40
S41
S42
S43

S45

S45

S47
S48
S49
S50
S51
S52
S53
S54
S55

S47
S48
S49
S50
S51
S52
S53
S54
S55

R175
22K

R174
10K

DVI_CLKDVI_CLK+

S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
S13

47

DVI_T-

DOCK_PSID

DVI_T+

DVI_T+
DVI_T-

R176
10K
2

R173
22K

16
16

DVI_TX2+
DVI_TX2-

16
16

DVI_TX1+
DVI_TX1-

16
16

DVI_TX0+
DVI_TX0-

15

PCLK_DOCK

PCLK_DOCK

SMBUS

26 DOCK_SMB_CLK
26 DOCK_SMB_DAT
26
CLK_SM1
26
DAT_SM1

PCLK_DOCK

C248
*18P_NC

1 2

R169
*22_NC

AC-Terminator

S69
S70
S71
S72
S73
S74
S75
S76
S77
S78
S79
S80
S81
S82
S83
S84
S85
S86
S87
S88
S89
S90
S91
S92
S93
S94
S95
S96
S97
S98
S99
S100
S101
S102
S103
S104
S105
S106
S107
S108
S109
S110
S111
S112
S113
S114
S115
S116
S117
S118
S119
S120
S121
S122

P5
P6
P7
P8
S69
S70
S71
S72
S73
S74
S75
S76
S77
S78
S79
S80
S81
S82
S83
S84
S85
S86
S87
S88
S89
S90
S91
S92
S93
S94
S95
S96
S97
S98
S99
S100
S101
S102
S103
S104
S105
S106
S107
S108
S109
S110
S111
S112
S113
S114
S115
S116
S117
S118
S119
S120
S121
S122

M_SEN#

VGA

18

LPC

6,18

VGA_GRN

6,18

VGA_BLU

25
25
25

VGA_RED 6,18
D_SERIRQ 25

LPC

+DC_IN

D_DLDRQ1# 25
D_LFRAME# 25
DVI_SCLK 16
DVI_SDAT 16
DVI_DETECT 16

C241
.1U_50V

C245
1nF

DVI

S-VIDEO
6,18

SPDIF

TV_C/R

33

SPDIF

32,35 10M_LINK#
32,35 100M_LINK#

USB

DOCK_OWNS_PCI

USB_VD1- 11
USB_VD1+ 11
DOCK_SMB_INT# 26
CLK_KBD 26
DAT_KBD 26
C249
1
C251
1

SMBUS

.01U
2
.01U
2

S137
S138
S139
S140
S141
S142
S143
S144
S145
S146
S147
S148
S149
S150
S151
S152
S153
S154
S155
S156
S157
S158
S159
S160
S161
S162
S163
S164
S165
S166
S167
S168
S169
S170
S171
S172
S173
S174
S175
S176
S177
S178
S179
S180
S181
S182
S183
S184
S185
S186
S187
S188
S189
S190

S137
S138
S139
S140
S141
S142
S143
S144
S145
S146
S147
S148
S149
S150
S151
S152
S153
S154
S155
S156
S157
S158
S159
S160
S161
S162
S163
S164
S165
S166
S167
S168
S169
S170
S171
S172
S173
S174
S175
S176
S177
S178
S179
S180
S181
S182
S183
S184
S185
S186
S187
S188
S189
S190

S193
S194
S195
S196

S193
S194
S195
S196

+3V_LAN
+3V_LAN

36
36
36
36

C250 .1U_50V
2
1
2

S125
S126
S127
S128

DOCK_RDN
DOCK_RDP
DOCK_TDN
DOCK_TDP

R171
1

R172
1

S205
S206
S207
S208
S209
S210
S211
S212
S213
S214
S215
S216
S217
S218

S205
S206
S207
S208
S209
S210
S211
S212
S213
S214
S215
S216
S217
S218

S220

S220

S222
S223
S224
S225
S226
S227
S228
S229
S230
S231
S232
S233
S234
S235
S236
S237
S238
S239
S240
S241
S242
S243
S244
S245
S246
S247
S248

S222
S223
S224
S225
S226
S227
S228
S229
S230
S231
S232
S233
S234
S235
S236
S237
S238
S239
S240
S241
S242
S243
S244
S245
S246
S247
S248

S250

S250

S252
S253
S254
S255
S256
S257
S258
S259

S252
S253
S254
S255
S256
S257
S258
S259

DOCK_DET#
DOCK_DAT_DDC2 18
DOCK_CLK_DDC2 18
HSYNC
VSYNC

18
18

VGA

D_CLKRUN# 25
D_LAD0
DOCK_SIO_ALERT# 25,26

25

LPC

S-VIDEO
TV_COMP 6,18
TV_Y/G

6,18
B

LAN_ACTLED# 32,35
HDD_LED 32

LAN

C252 .1U_50V
S125
S126
S127
S128

D_LAD1
D_LAD2
D_LAD3

+3VRUN

16
16

S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
S13

V5+
V6+
V7+
V8+

DVI
1

V1+
V2+
V3+
V4+

P1
P2
P3
P4

DOCK_DET#

DOCK_PWR_SRC

MODEM

2
24

100/F

M204

TIP

100/F

M204
C

AMP-1473681-280P

SMBUS ADDRESS :
M136

RING

+3VALW

24

+5VALW

MODEM

M136

AMP-1473681-280P

R155
10K
Q7
FDS4435

1nF

Docking Detect Circuit

U18

2
R163
100K

Q18
2N7002

*0_NC
2

R158
1

QUANTA
COMPUTER

Title

Docking Station Conn.

DOCKING POWER SWITCH

Q17
DTC144EUA

Place it close
to Docking CONN

7SH08

DOCKED 26,36

2
DOCK_DET#

100K
2

4
26 DOCK_PWR_EN

C15
1

2
5
DOCKED

.1U_50V

R6
1

+3VSUS

C16
1

1
1

R7
100K

C20
.47U_0805

DOCK_PWR_SRC
DOCK_PWR_SRC

8
7
6
5

1
2
3

PWR_SRC

R162
10K

DOCK SMbus Battery 16h Charger 12h IDE I/F 70h D-BAY
72h SIO 48h

3 2

DOCK/APR Microprocessor -- 74H


DOCK USB/IDE Interface(FX2) -- 72H

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

38
8

49

SYSTEM POWEROK(ICH_PWROK) to SB
to generate PCIRST#/PLTRST#
Circuit

+3VSUS
C390
1

.047U
2

6,11,42 IMVP_PWRGD

26 RESET_OUT#

U27
U28D
4

12
3

7SH08

11 ICH_PWROK

ICH_PWROK 11,31

13

DBR#

74AHC08

+3VRUN

R305
100K

Keep Away from high speed buses

C399
.01U

C403
1
14

+3VSUS
.1U_10V
2
B

U28A

1
3
2

+3VSUS

74AHC08

C402
1

U28B

4
6

.047U
5
25,27,46 RUN_ON

42,44 VCCP_PWRGD

RUNPWROK 26,42

5
74AHC08
4

U29
7SH08

RUNPWROK Circuit

+3VALW

SUSPWROK 11,21,31

+3VSUS

+1_5VSUS

R294
*330_NC

R300
100K

U28C

R303
20K/F

1.5VSUS_PWRGD
SUSPWROK_B
Q35
2N7002

74AHC08

3
Q33
3904
1

2
C396
1U_10V

R311 0
2

44 1.5V_PWRGD

+3VSUS

C721
1

2
.047U

5
D

8
10

43,44 1.8V_PWRGD

4
1

25,45,46 SUS_ON

U42
7SH08

R496
2

QUANTA
COMPUTER

SUSPWROK Circuit
Title

*0_NC
1

SYSTEM RESET/POWER GOOD

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005
7

R ev
1A
Sheet

of

39
8

49

PD5
ES3DB

DC_IN+ discharge path

PQ7
FDS4435

8
7
6
5

SDC_IN+

1
2
3

PR40
1

100K
2

PR38
1

AC_D2

240K
2

AC_D1

25,41

PQ28A
FDS6975
CHG_SBAT

10K

PQ11
2N7002

1
5
6

PD20
ES3DB
1
PQ29A
FDS6975

100K
2

PC44
2

.1U_50V
1

47

7
8

SBATT+

PWR_SRC

2
B

SBAT_G

CHG_SBATT

CHG_SBATT_N

R65
*100K_NC

PR44
470K

PD8
RB715F

26

PR46
1

PR45
1

CHG_SBAT_N

PQ9
2N7002

7
8

V_CHG

ACAV_IN

PQ29B
FDS6975

26

PQ13

CHG_PBATT

2N7002
CHG_PBAT_N

PR51
1

10K

PR50
1

100K
2

47

PBATT+
PQ15A
FDS6975

R122
*100K_NC

.1U_50V
1

CHG_PBATT_N
PC46
2

6
5

CHG_PBAT

5
6
7
8

PD13
ES3DB

7
8

PBAT_D

PBATT+

PR56
47K

PR61
470K

5
6

PBA-DC1

3
C

PR59
470K

PQ14
Si9435DY

PQ28B
FDS6975
C

PQ15B
FDS6975

V_CHG

3
2
1

PR55
10K

2
PBAT_G

PR64

+
-

1
LM393

1
PR109
470K

PD25
RB715F

PR57
470K

147K/F

PBATT+

PC66
.1U_50V

PR65
24.9K/F

PC69
*.1U_50V_NC

PB_DC

PU5A

CT_0315: Change PR64 from 1M to


147K/F, PR65 from 49.9K/F to
24.9K/F, PR68 from 24.9K/F to
49.9K/F per Power.

47K

SBATT+

PR58
1

To change swap battery's voltage from 9.6V to 7.5V

PQ18
2N7002

PR60

100K

+3VALW

2
26,47 SBAT_PRES#

PR68
49.9K/F

PR62
100K

PU5B

7 3
LM393

PBA-DC

RB715F

+5VALW

Title

SBAT_LOW

PQ20
2N7002

PU6

26

10K/F
2

+5VALW

PD14
PR63
1

BATTERY SELECTOR

7SH32

QUANTA
COMPUTER

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

Rev
1A
Sheet
5

40

of

49

SDC_IN+
PR36
1

DC_IN+

2
A

4
2

MAX1535B

15

T87 PAD

14

T88 PAD
VMAX

1
1

PDL

PR98
IMAX 1

280K/F
CHVREF
2

1
2

PC100
*10U_25V_NC

1
CSIN1

CSIP1

+ PC101

2
PR93
1

10U_25V_1206

10U_25V_1206

Reserved for 4
cell battery
reduce ripple
and noise

PBAT_SMBCLK 17,26,47
PBAT_SMBDAT 17,26,47

IMAX
10

SCL
SDA
VMAX

30

ACOK
GND2

32

GND1

THM

18

13

20

PR92
1

CHVREF

PC131

*.1U_50V_NC

PC98
1U_10V

CSIP
CS IN

+ PC42

PC132

*.1U_50V_NC

CSIN

21

CSIP
VDD

22

PGND

Adress : 12H

PC43
.1U_50V

PR146
*0_0603_NC

BATT

1
2

1
2

1
2

1
PQ52

PR96
31.6K/F
PR95
182K/F

PR39
16.2K/F

DLO

1
2
3
I.C

19

PR97
75K/F

PC138
*.1U_50V_NC

CSSN

17

1
2
1
ACAV_IN

23

*.1U_50V_NC

25,40

DLO

AO4704

12

DHI

PC94
1U_10V

+5VALW

PR41
10K

V_CHG
PL4
PR43
8.2uH-SIQH125
.01
CHG_CS
2
1
PC130

REF

26

PC32
10U_25V_1206

4
.1U
1

CHG_LX

DHI

PC33
10U_25V_1206

CHVREF 4

DLOV

PC34
.1U_50V

DAC

V_CHG

LDO

PC92
24 DLOCH 2

3
2
1

PDS

28

31

CCV

DAC 11

PQ10
AO4407

PC37
2200P

PC99
.1U_50V

PC97
.01U

CCS

CCV 8

1U
1

PR91
33/F

ACIN

CCI

1
PC96
.01U

1
PC95
.01U

Connect GND side of PC112 ,


PC114 , PC116 , PC119 , to
GND through 1 via.

CCV1

DHIV

CCI 7

10K

PC93
2

LDO

PR94
1

LDO

16

12

SDC_IN+

INT

SRC

5
6
7
8

CCS 6

SDC_IN+

.01U
1

29

27
PC90
1
2 25
.1U_50V
AC IN 3

DCIN

PC129

*.1U_50V_NC

CSSP

PU9

PC39
2

PC128

*.1U_50V_NC

DCI N1 1

49.9K/F
1

CSSN

2
1
2

1
PR37
365K

PR42
2

PR89
0

CSSP

PC91
1U_25V

CSSN1

5
6
7
8

PR90
0

PR88
4.7/F_0603

Reserved
for offset

CSSP1

PC31
4.7U_25V_0805

.01

CT_0314: Reserved a PC138 0.1U Cap for RC delay.

Title

QUANTA
COMPUTER
Battery Charger

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

Rev
1A
Sheet
5

41

of

49

PR1
10

+5VRUN

PC4
1U_10V

PD2
RB751V

VH_VCC
+3VRUN

11

DPRSLPVR

PR9

VCORE_REF
301K/F

PC10
.22U_10V
PR13

49.9K/F

PC12

100P

DH_VCORE

LX

32

LX_VCORE

DL

29

SHDN

20

DPSLP

35

SUS

REF

27

DD

1
2

1
2

PC135

*.01U_NC

+
2

*2200P_NC

PC136
*.1U_10V_NC

ILIM

28

470U_2V

470U_2V

470U_2V

*470U_2V_NC

OA+

17

9mOhm
7343
POSC

9mOhm
7343
POSC

9mOhm
7343
POSC

9mOhm
7343
POSC CH747RY8800

OA+

PR5

16

OAPC14

750/F

OAP_FB

PR6

1K/F

OAN_FB

FB

15

VH_FB
PR15

CSP

18

CSP_FB

PR8

200/F

PR10

200/F

Limited Current Point =28.5A

100P
1.5K/F

PC7
1000P
CSN

14

13

CC

POS

NEG

TIME

*15K/F_NC
1

GND

19

CSN_FB

VH_VCC
VH_FB

VH_VCC

PR85
0

270P

PR86
0

PR11

PR153

*0_NC

1907_S1

PR87
*0_NC

PR14
100K/F

PR81

PQ24
*2N7002_NC

PR152
1907_S0

PR12 1.24K/F

*0_NC

PR156
30.1K/F

PBOOT_B0
PR150

*0_NC

PR151

VH_VCC

1907_S2

VCORE_REF

2
1

PC134

PC86

PC85
+

PC84

1
1 2

PC83
+

*1000P_0805_NC

PGND

PBOOT_B1

PC2
PD3
RB051L-40

PR2
*0_0805_NC

*36.5K/F_NC

PU8B
*7WZ14_NC

PQ4
Si7336ADP
SOIC8-9P

11

OA-

PR158
2

PQ3
Si7336ADP
SOIC8-9P

40

PC1

TON

1mR
2

PC8

PR154
*0_NC
C

PR3
LSense+1

PC6
*470P_NC

PQ23
*2N7002_NC

*0_NC
VH_VCC

*.01U_NC

12
3

PL2
0.6UH/30A

B0
B1
B2

39

10U_25V_1206
10U_25V_1206
10U_25V_1206

PQ2
TPCA8005-H
SOIC8-9P

DL_VCORE
PR16

+3VRUN

PR155
2

PC26
10U_25V_1206

VHCORE

PR157
*0_NC

PU8A
*7WZ14_NC

STP_CPU#

DPRSLPVR

1
2
3

PC25

S0
S1
S2

4
5
6

PC24

1907_S0
1907_S1
1907_S2

D0
D1
D2
D3
D4
D5

PC23

26,39 RUNPWROK

33

DH

26
25
24
23
22
21

RUNPWROK

4,11,15 STP_CPU#

PC3
.1U_50V

BST1

CLK_EN

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5

PR7
B

.1U_50V

5
6
7
8
9

38

PBOOT_B0
PBOOT_B1
PBOOT_B2

CT_0217: Add
PC137 .1U_0603

PC22

2200P

1
2
3

1
2

PC137
.1U_50V

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5

31

PC21

1
2
3

4
4
4
4
4
4

IMVP_PWRGD

V+
BST

5
6
7
8
9

CLK_EN#

IMVP_OK

1
2
3

CLK_EN#

15,17

SYSPOK

34

5
6
7
8
9

DELAY_IMVP_PWRGD 37

VDD

36

6,11,39 IMVP_PWRGD

10

VCC

PR20

39,44 VCCP_PWRGD

PR4
1_0603

30

PWR_SRC
PU2
MAX1907

PR18
10K
1

PR17
2.21K/F

PWR_SRC
BST1_VCORE

2
1

PR19
10K

PC5
1U_10V

+3VRUN
A

PBOOT VOLTAGE
SETTING UP ON
1.212V

VH_VCC

The C4 mode voltage is 0.748V


C4(Deeper sleep)
VHCORE Voltage

PBOOT_B2

0.748V

0.716V

CLK_EN#

CT_0105: Change PU8


footprint from SC70-6 to
SC70-2_1-65-6P

D5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1

D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1

D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1

D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1

Output
1.196V
1.180V
1.164V
1.148V
1.132V
1.116V
1.100V
1.084V
1.068V
1.052V
1.036V
1.020V
1.004V
0.988V
0.972V
0.956V
0.940V
0.924V
0.908V
0.892V
0.876V
0.860V
0.844V
0.828V
0.812V
0.796V
0.780V
0.764V
0.748V
0.732V
0.716V
0.700V

D5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0

D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1

D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1

D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1

D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1

PR82
*0_NC

Output
1.708V
1.692V
1.676V
1.660V
1.644V
1.628V
1.612V
1.596V
1.580V
1.564V
1.548V
1.532V
1.516V
1.500V
1.484V
1.468V
1.452V
1.436V
1.420V
1.404V
1.388V
1.372V
1.356V
1.340V
1.324V
1.308V
1.292V
1.276V
1.260V
1.244V
1.228V
1.212V

PR83
*0_NC

PR84
*0_NC

NC

PR9

PR11

PR13

NC

NC

Title

QUANTA
COMPUTER
CPU POWER

Size

Document Number
DM3B

Date:

, 29, 2005

Rev
1A
Sheet
5

42

of

49

+5VSUS

PC65

VCC_2.5V

10U_25V_1206

1
4

DRVH

15

13

1.8V_PWRGD 39,44

S5

12

SUSPWROK_5V 44,45

S3

11

RUN_ON_D 25,44,46

PQ17

IRF7413Z

18

LL

1.8_DL

17

DRVL

16

PGND

+1_5VRUN

VDDQSET

VTT

VTTSNS

PR107
*10K/F_NC

COMP

PC51

PC49

0.9V

SMDDR_VTERM

CT_0217: Remove JP5 short jumper.

PC47

10U_4V 10U_4V 10U_4V

GND

+5VSUS

PC54
.1U

2
10

VDDQSNS

MODE

3
6

VTTGND

VTTREF

1.8V_FB

PC55
10U_4V

FDS6676S

1.8V_OUT

PR108
1

PQ16

3
2
1

PR106
*2K/F_NC

PC60
1000P

8
7
6
5

1.8V_LX

12

18mOhm

Jump20X10

PGOOD

VLDOIN

PR54
3.3/F_0603

+5VSUS

VBST

1.8V_DH 19

18mOhm
1

20

PC52
150U/6.3V

PR115
DH_1 2

PR110
100K

SJ3

PC48
.1U

3
2
1

PL5
1.5UH_SIL104R-1R5_10A/8.1 mohm
1
2
PC56
150U/6.3V

PC57 .1U_50V
PR52
1
2 1.8BST

+3VSUS

CT_0217: Remove
JP6,JP7 short jumpers.

PU4
TPS51116

2200P

14

PC62

V5IN

.1U_50V

PR53
5.11K/F
PC58
1000P
1
2

CS

PC63

8
7
6
5

+1_8VSUS

PC59
4.7U_10V_0805

PC67
10U_25V_1206

8.5A Current limit

CT_1126: The current limit set up


10uA X PR53 / PQ16 Rds ON(6mOhm) = Current limit

PR111
3.3/F_0603

PWR_SRC

SMDDR_VREF

PC53
0.033U

Title

QUANTA
COMPUTER
1.8V,0.9V

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

R ev
1A
Sheet
1

43

of

49

+5VSUS
PR122

20
1_5_VCC

PWR_SRC
PC113
2.2U_10V

2
2

3
7

AO4824
2

1.5V_DL

13

16

LX

CS

12

1G

TON

15

SHDN

PR124

DL

OUT

PR121

*0_NC

PR116

FB

PR112
20K/F

+3VSUS

1_5_VCC
PR118
100K

SUSPWROK_5V 43,45
*0_NC

10

REF

ILIM

1.8V_PWRGD 39,43

1.5V_PWRGD

1.5V_PWRGD 39

1_5_REF
PR114
100K/F

SKIP

GND

1.5V_FB

11

OVP

1.5V_OUT

*0_NC
1_5_REF

PR147
PGOOD

S1

PR117
10K/F

1_5_LIM

PC107
.22U_10V

PR113
100K/F

17

25mOhm

PQ41A

D1

19

LATCH

18mOhm

PC108
220U/6.3V_ESR25
CC7343

1.5V_LX

PC109
*150U/2V_NC
CC7343

PC111
.1U_50V

2
2

+
2

1
PD26
RB551V-30

PC106
.1U

D1

14

UVP
DH

S1
PL9
3.8UH_SIL104R-3R8_6A/13mohm

VCC

20

BST

1.5V_BST_R 18

VDD

PR123
0

1.5V_DH

1G

PW R_SRC
PU10
MAX1844EEP

CT_0217: Remove JP12 short jumper.

AO4824
4

+1_5VSUS

PQ41B

D1

PD27
RB751V

2200P

V+

2
5

D1

PC115

1.5-BST
1

PC116
.1U_50V

+
2

5.0A
Current
Limit

PC114
10U_25V_1206

PC112
2.2U_10V

PR119 *0_NC
1_5_VCC

PR120
0

+5VRUN

PR31
20
1_05_VCC

PWR_SRC

UVP

PR26

PR27
18 VCCP-BST1
20

1
2

PC88
10U_25V_1206

1.05V_LX

19
1

DL

12

GND

11

OUT

1.05V_OUT

FB

1.05V_FB

PC27
.1U_50V

VCCP

PL3
1.5UH_SIL104R-1R5_10A/8.1 mohm
1
2

PR24
1_05_VCC

OVP

LATCH

PR29
1K/F

1
1

1
PC38
150U/2V
CC7343

PC41
.1U

18mOhm

+ PC40
150U/2V
CC7343

PD7
RB551V-30

CT_0217: Remove
JP2,JP3 short jumpers.

17

PR30
34.8K/F

ILIM

1_05_LIM 7

SKIP

PR32
100K/F

PC30
.22U_10V

FDS6676S

PQ8

C722
*.047U_NC

1.05V_DL

REF

18mOhm

PGOOD

1
2
3

1_05_REF

1_05_REF

10

39,42 VCCP_PWRGD

5
6
7
8

LX
CS

PQ6

IRF7413Z

TON
SHDN

8.6A Current Limit


VCCP-BST

1.05V_DH

25,43,46 RUN_ON_D

1
DH

15

PC89
10U_25V_1206

16

13

BST

*0_NC

PC36
2200P +

5
6
7
8

VCC

1
2
3

14

PR35
1_05_VCC
PR33
100K

*0_NC

PC35
.1U_50V

PR34
1_05_REF

V+

+3VRUN

VDD

PD4
RB751V

PWR_SRC
PU3
MAX1844EEP

PC29
2.2U_10V
2

PC28
2.2U_10V

PR28
20K/F

*0_NC

PR25
0

Title

QUANTA
COMPUTER
1.5V,1.05V

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

R ev
1A
Sheet
5

44

of

49

PWR_SRC

PR73

PR72
10_0805
VCC

+5VALW
47_0603

2
PD15
RB751V

18

BST5

14

BST5

N.C.

DH5

16

DH5

28

BST3

LX5

15

LX5

26

DH3

DL5

19

DL5

S1
3

LX3

OUT5

21

5V_OUT

24

DL3

9
10

FB5
PRO#

22

FB5
PRO

OUT3
ILIM5
ILIM3
REF
TON
GND
PGOOD

11
5
8
13
23
2

ILIM5
ILIM3
REF
TON

AO4824

1999_ON3
ON5

CT_1125: Add PR148,


PC133 Per EMI

FB3

3
4

ON3
ON5

25

LDO3

PL6
3.8UH_SIL104R-3R8_6A/13mohm
B

D1

PQ21A

AO4824

PC61
.1U

G1

REF

PC73
1U_10V

+3V_SRC

PR74
0
DL5

PR127
100K

PC76
.1U
15V_C

.1U

2N7002

PQ43
2N7002

PR125
100K
PR77
*0_NC

2
1

USB_EN#

PQ53

PRO#

PR126
200K

PR130
49.9K/F

PR141
0

CT_0314: Pop PR78 and PQ53. Leave PR77 N.C.


2

1
PR138
49.9K/F

+5VSUS

PC81
.1U

1
25,32

51K

PC120
.1U_50V

PRO1

100K
3

PR161

1
1999SKIP

VCC

PC140
4.7U_10V_0805

ILIM3
TON

15V_B

PC80
.1U_50V

PR140
200K

1M

PC70
*4.7U_10V_0805

PR78
PC139
.22U_10V

PR139
*0_NC

PR160
2

1
PR135
63.4K/F

MAX1999_LDO3

3
PQ54
FDN304P

25

VCC

1999SKIP

VCC
+3VALW

ILIM5

ALWON

15V
PWR_SRC

REF

1K
1

1
PR159 *0_0603_NC
2
1

PR137
63.4K/F

THERM_STP# 31
PR136
2

PR66
240K

SUS_ON1

PD17
BAT54S

PD16
BAT54S
1 2

PC75
.1U
15V_A

AUX_EN

AUX_EN

SUSPWROK_5V 43,44

2K/F
2

25,36

PR69
1

25,39,46 SUS_ON
2

PU11
7SH32

PC64
220U/6.3V_ESR25
CC7343

+RTC_PWR3_3V
PC122

PR75
*_NC

S1

12

+5VSUS
G1

4700P

27

AO4824
D1

D1

DL3

FB3

PQ19A

S1

D1
4
S1

LX3

3V_OUT

1G
1

PC133

D1
2

PR70
0

220U/6.3V_ESR25
CC7343

D1

4.7/F

PR71
*_NC

1 2

PC82
.1U

PR148
1.5R

PC77
+

CT_0217: Remove
JP10,JP11 short jumpers

DH3

PL7
3.8UH_SIL104R-3R8_6A/13mohm

+3V_SRC

PC78
.1U_50V
1
2

PR79

1G
B

PR67 4.7/F
BST3

LDO5

VCC

PC68 .1U_50V
1
2

V+

17

D1

20

PQ21B

VCC

5
D1

6
5
2
1

AO4824

CT_0217: Remove
JP8,JP9 short jumpers

MAX1999

PQ19B

3VSUS_ON 46

BST_5
PU7

1999_V+
3VSUS_ON

1
2

BST_3

PC125
2200P

PC124
.1U_50V

PC118
.1U_50V

PQ40
AO6408

4.7U_25V_0805
PC117
2200P

SHDN

Place these CAPs


close to FETs

Place these CAPs


close to FETs

PD18
RB751V

PC79
1U_10V

PC71

SKIP

PC110
4.7U_10V_0805

+3VSUS

PC74
4.7U_10V_0805

1
PC72
.1U_50V

PR76

10_0805

PC123
+ 10U_25V_1206

PC119
+ 10U_25V_1206

CT_0321: Add PC139, PC140, PR160, PR161, PQ54 for


soft start of +3VALW.
CT_0329: Depop PC70 4.7U. Change PC140 from .22U to 4.7U.
Title

QUANTA
COMPUTER
3VALW,5V,3V, power on

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

R ev
1A
Sheet
5

45

of

49

+5VSUS

PQ42
FDC653N

15V

6
5
2
1

R388
100K

PWR_SRC

4
C575
4.7U_10V_0805

+1_5VSUS

PR131
100K

R387
100K

+5VRUN

+5VALW

+1_8VSUS

PR128
47_0805

PR129
47_0805

PQ47
DTC144EUA

R389
240K

.022U_0603

ON_3VSUS

3
2

25,39,45 SUS_ON

+1_5VSUS

PQ39
AO6408

6
5
2
1

PQ45
2N7002

PQ46
2N7002

PQ35
2N7002

+1_5VRUN

PWR_SRC
C514
4.7U_10V_0805

2
1

25,27,39 RUN_ON

C492

PQ36
2N7002

RUN_ON_5V#

ON_RUN1

PR134
240K

PR132
200K

3VSUS_ON 45

2
+1_8VSUS

6
5
2
1

+1_8VRUN

PQ44
2N7002

PQ12
FDC653N

PC121
.01U

PR133
470K

Turn On +3VSUS from +3VSRC

C105
1U_10V

RUN POWER Controlled by RUN_ON


+3VRUN

1
2

1
PQ33
*2N7002_NC

PQ34
*2N7002_NC

2
1

2
1

2
PQ32
*2N7002_NC

PC105
10U_6.3V

R383
*1K_NC

3 2

R382
*1K_NC

3 2

3 2

R381
*1K_NC

PQ31
*2N7002_NC

PC103
.1U

SMDDR_VTERM

1
3 2

+1_5VRUN

1
3 2

PQ30
*2N7002_NC

+2.5VRUN

1
PR102
15K/F

+2.5VRUN

+2.5VRUN

R380
*47_NC

2
1

1
2
5
6

1 A (Max)
2

PR101
10K/F

+3VRUN

PQ27
FDC653N

47P

2
+5VRUN

2.5V-DRV 3

PC104
2
1

PQ38
2N7002

R379
*1K_NC

RUN_ON_5V#

2.5V-FB1 6

PR100
10K/F

R392
*470K_NC

RUN POWER Controlled by


RUN_ON_D (Delay from RUN_ON)

PC102
.01U

U26B
LM358

1
C577
4.7U_10V_0805

1
1

C493
4700P

3
2
1

25,43,44 RUN_ON_D

2.5V-REF1

3
2
1

RUN_OND1

PQ37
2N7002

10K/F
2

ON_RUN2
C

PR99
1

1_05_REF

R391
100K

+3VRUN

6
5
2
1
3

R393
100K

CT_0315: Change C493


from 470P to 4700 to fix
Soft start of +3VRUN.

15V

15V

+5VALW

PQ48
FDC653N

+3V_SRC

Title

QUANTA
COMPUTER
RUN POWER SW

Reserve discharge path


1

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

Rev
1A
Sheet
5

46

of

49

PD10
DA204U

+3VALW
A

.1U_50V
2

PC45

PD11
DA204U

PD12
DA204U

+3VALW

JABT2

PR48
10K

40

SBAT_SMBCLK 26
SBAT_SMBDAT 26
SBAT_PRES# 26,40

+3VALW

BATT1+
BATT2+
SMB_CLK
SMB_DAT
BATT_PRES#
SYSPRES#
BATT_VOLT
BATT1BATT2-

Adress : 16H

SBATT+

RP4
4P2R-S-100
4
3
2
1
1
2
PR49
100
1
2
PR47
100

1
2
3
4
5
6
7
8
9

PD9
DA204U

SUYIN-20175A-09G1

SBAT_ALARM# 26

PC50

PD23
DA204U

PD24
DA204U

+3VALW
+3VALW
PD22
DA204U

.1U_50V
2

JABT3

PR104
10K

40

+5VALW

PBATT+

PBAT_SMBCLK 17,26,41
PBAT_SMBDAT 17,26,41

+3VALW

PBAT_PRES# 26

PD19
BAT54S

PR80
2.2K

+3VALW
PD21
DA204U

PQ22
2N7002

SUYIN-20175A-09G1

R499
38 DOCK_PSID

DOCK_PSID

PS_ID

26
C

+5VALW

+5VALW

R164
100K/F

PD28
BAT54

R281
10K

+DC_IN

RV2
VZ0603M260APT

RV3
VZ0603M260APT

PC19
.1U_50V

PC17
4.7U_25V_0805

PR22

PC20
.01U_0603

2
Q49_G

1
2
1
1

1
PR21
240K

9
8
7
6
5
4

CM1922

+
PC18
.47U_0805
<Limit VOL>

DCI N-

3
4

2
2
1

D CIN+

15K/F

8
7
6
5

1
2
3

PS_ID_DISABLE# 26

R165
DC_IN+

FL2

3904
PQ5
FDS4435

JDCIN2
POWER_JACK

Q19

2
DOCK_PSID

PL8
1
BLM11B102S

PBAT_ALARM# 26

1
100

Adress : 16H

RP30
4P2R-S-100
2
1
4
3
1
2
PR105
100
1
2
PR103
100

1
2
3
4
5
6
7
8
9

BATT1+
BATT2+
SMB_CLK
SMB_DAT
BATT_PRES#
SYSPRES#
BATT_VOLT
BATT1BATT2-

5.6K_0603

PR23

100K

Title

QUANTA
COMPUTER
DCIN,BATT CONNECTOR

Size

Document Number
Tahiti(DM3L)

Date:

, 29, 2005

Rev
1A
Sheet
5

47

of

49

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