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Semi Conductor Memory Design and Testing

This document outlines the course syllabus for a semester-long graduate course on semiconductor memory design and testing. The course is divided into 5 units that cover topics such as SRAM and DRAM cell technologies and architectures, non-volatile memory technologies, memory testing techniques, memory reliability and radiation effects, and advanced high-density memory technologies. The course aims to provide students with an in-depth understanding of both theoretical and practical aspects of semiconductor memory design.

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Lakshmi Narasimha Acharya Kandala
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509 views1 page

Semi Conductor Memory Design and Testing

This document outlines the course syllabus for a semester-long graduate course on semiconductor memory design and testing. The course is divided into 5 units that cover topics such as SRAM and DRAM cell technologies and architectures, non-volatile memory technologies, memory testing techniques, memory reliability and radiation effects, and advanced high-density memory technologies. The course aims to provide students with an in-depth understanding of both theoretical and practical aspects of semiconductor memory design.

Uploaded by

Lakshmi Narasimha Acharya Kandala
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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I Year - II Sem. M.Tech (VLSI Design) --_.

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SEMIC()NDUCTOR'MEMORY
DESIGN AND TESTING,
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UNIT I
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Random Access Memory TedllioI6gic!'~~Ar-:(.~: Sl~AM (:eli st~~[~ig1:i~a8's'~Mtt~i~hit~~t~t~;;Mds
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SRAM cell and peripheral circuit operation, Bipolar SRAM technolbgie~,'~QI tethhb'!!ig~,.~94!i~e~SRAM.
architectures and technologies, Applicatiom;pecific:SRAMsiiDRAM ~D~~{eHhho'lqkc9.:a~-{;tlQ~~AIjCM0S .
DRAM, DRAM cell theory and advanced cell structures, mCMOS DRfiM:,--sptt;~:IT~r~f~iTQi:'tj'~inmlWv1
advanced DRAM design and architecture.Application specific DRA~

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Non-volatile Memories: Masked ROMs, High density ROM, PROM;J3ip.ol~r .ROM~,c~q?


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EPROM, Fl~~~iflg gate EPROM cell, One timeprogrammable EPROM, EEPR01;v1,-EEBR~~ te~nIlOlogyi\nd
architecture, Non-volatile SRAM, Plash Memories (EPROM or EEPRO~.'1),~1:~;~"~~~~~~?$huru~M~1\~r,~pitedure
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UNIT 11[:
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Memory Fault Modeling Testing and Memory Dcsign;{o.r;:re's~bilitfr~n:8fF.aitl,t.W{jlE~f~lf~~r!lM fadlt.
model ing, Electrical testing, Pseudo Random testing, Niegg~itP.RA~t ;re~~iq~'lrtoq:iXq1MUtiriiiJ.l1Q,1lYJn9ddirit
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. and t~sting, IDDQ fault modeling and testing, Application specific memory' testi,~~NvM1Jl~!~Wf.~~E:~J.BI~T .
techniques for memory
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Semiconductoi-Memory
Rcliability and Radiati~n Effects: Gen~raI r~I~~~ililyiS~u.e~:~~;~i'llJre'~Q(i~~
and mechanism, Non-volatile memory reliability, reliability modeling and failurerateprediction, De$lgnfb~Reliabilty,
ReliabiltyTest Structures, Reliabilty Screening and qualification, Radiation effe.91S;S,iriii~EYe,~(PhenQmenon
(SEP), Radiation Hardening techniques, Radiation Hardening Process and Des!g~:tssu.~s:,,~,a:gl~tionfIatde[led ..
Memory characteristics, Radiation Hardness Assurance and Testing, Radiati6rli1o~idietr1,,~Wii'~rMv~lRa~iati.o('
Testing and Test structures
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. .Advanced Memory Teclinologics and High-density IVIQlliorY'r,ac~hig:f$(~r<~1,9~~~~~11~~tMl.
(l 'RAMs), GaAs T'RAMs, Analog memories, magneto re~isti~~:RAMs'(MRAM~}:p~:~r.Ht~Iww)m;~t,p:gEf;;de,Nifi~k;.
Memory Hybrids and MCMs (2D), Memory Stacks anq'MCMS(3D}"JYkmC5r-yM~M~re~UI:i~:~~p:je!ia~mtY.' .
issues, Memory cards, High Density Memory Packaging Future Directions
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TEXT nOOKS:
L . Semiconductor MemoriesTechnology - Ashok K,.Shatma, 2002,Wiley,
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Advanced Semiconductor Memories - Architecture, Design and Applications - Ashok K. Sharma- 2002,
Wiley_

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Modern Semiconductor Devices for Integrated Circuits - Ch~nming.C,.Hu : Ln

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