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VLSI Technology and Design

This document outlines the 5 units of a course on VLSI Technology and Design. Unit I covers basic electrical properties of MOS, CMOS, and BiCMOS circuits. Unit II discusses layout design tools and techniques. Unit III focuses on combinational logic networks, including layouts, simulation, delays, and power optimization. Unit IV examines sequential systems like memory cells and clocking. Unit V looks at floor planning, off-chip connections, high-level synthesis, and architectures for low power and embedded systems. The primary textbook is Essentials of VLSI Circuits and Systems and a reference is Principles of CMOS Design.

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812 views1 page

VLSI Technology and Design

This document outlines the 5 units of a course on VLSI Technology and Design. Unit I covers basic electrical properties of MOS, CMOS, and BiCMOS circuits. Unit II discusses layout design tools and techniques. Unit III focuses on combinational logic networks, including layouts, simulation, delays, and power optimization. Unit IV examines sequential systems like memory cells and clocking. Unit V looks at floor planning, off-chip connections, high-level synthesis, and architectures for low power and embedded systems. The primary textbook is Essentials of VLSI Circuits and Systems and a reference is Principles of CMOS Design.

Uploaded by

shankar1505
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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VLSI TECHNOLOGY & DESIGN

UNIT I
BASIC ELECTRICAL PROPERTIES OF MOS, CMOS & BICOMS CIRCUITS: Ids-Vds
relationships, Threshold voltage Vt, Gm, Gds and Wo, Pass Transistor, MOS,CMOS & Bi CMOS
Inverters, Zpu/Zpd, MOS Transistor circuit model,Latch-up in CMOS circuits.
UNIT II
LAYOUT DESIGN AND TOOLS: Transistor structures, Wires and Vias , Scalable Design
rules , Layout Design tools. Static complementary gates, switch logic, Alternative gate
circuits, low power gates, Resistive and Inductive interconnect delays.

: UNIT III
COMBINATIONAL

LOGIC NETWORKS: Layouts, Simulation, Network delay,

interconnect design, power optimization, Switch logic networks, Gate and Network
testing.
UNIT IV
SEQUENTIAL SYSTEMS: Memory cells and Arrays, clocking disciplines, Design ,power
optimization, Design validation and testing.
UNIT V
FLOOR PLANNING & ARCHITECTURE DESIGN: Floor planning methods, off-chip
connections, High-level synthesis, Architecture for low power, SOCs and Embedded CPUs,
Architecture testing.
Textbooks:
1. Essentials of VLSI Circuits and Systems, K. Eshraghian et . al( 3 authors) PHI of India Ltd.,2005
2. Modern VLSI Design, 3rd Edition, Wayne Wolf ,Pearson Education, fifth Indian
Reprint, 2005.
References:
Principals of CMOS Design N.H.E Weste, K.Eshraghian, Adison Wesley

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