Datasheet

Rev 2, 5/2005

ACT30

ACT30

HIGH PERFORMANCE OFF-LINE CONTROLLER

ActiveSwitcherTM IC Family

FEATURES

GENERAL DESCRIPTION

The ACT30 is a high performance

green-energy offline power supply controller. It
features a scalable driver for driving external
NPN or MOSFET transistors for line voltage
switching. This proprietary architecture enables
many advanced features to be integrated into a
small package (TO-92 or SOT23-5), resulting in
lowest total cost solution.

Lowest Total Cost Solution

0.15W Standby Power
Emitter Drive Allows Safe NPN Flyback Use
Hiccup Mode Short Circuit
Current Mode Operation
Over-Current Protection
Under-voltage Protection with Auto-restart
Proprietary Scalable Output Driver
Flexible Packaging Options (including TO-92)
65kHz or 100kHz Switching Frequency
Selectable 0.4A to 1.2A Current Limit

The ACT30 design has 6 internal terminals

and is a pulse frequency and width modulation IC
with many flexible packaging options. One
combination of internal terminals is packaged in
the space-saving TO-92 package (A/B/C/D
versions) for 65kHz or 100kHz switching
frequency and with 400mA or 800mA current limit.
The E version (SOT23-5) can be configured for
higher current limit.

APPLICATIONS

Battery Chargers
Power Adaptors
Standby Power Supplies
Appliances
Universal Off-line Power Supplies

Consuming only 0.15W in standby, the IC

features over-current, hiccup mode short circuit,
and under-voltage protection mechanisms.
The ACT30 is ideal for use in high
performance universal adaptors and chargers.
For highest performance versus cost and
smallest PCB area, use the ACT30 in
combination with the ACT32 CV/CC Controller.

Figure 1. Simplified Application Circuit

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ACT30
ORDERING INFORMATION
PART NUMBER

SWITCHING FREQUENCY

CURRENT LIMIT

TEMPERATURE RANGE

PACKAGE

PINS

ACT30AHT-A

65kHz

400mA

-40C to 85C

TO-92

ACT30BHT-A

65kHz

800mA

-40C to 85C

TO-92

ACT30CHT-A

100kHz

400mA

-40C to 85C

TO-92

ACT30DHT-A

100kHz

800mA

-40C to 85C

TO-92

ACT30EUC-T

SELECTABLE

ADJUSTABLE

-40C to 85C

SOT23-5

PIN CONFIGURATION

ACT30A
ACT30B
ACT30C
ACT30D
1

VDD

GND

FREQ

DRV1

DRV2

ACT30E

TO-92

SOT23-5

PIN NAME

PIN DESCRIPTION

PIN DESCRIPTION
PIN NUMBER
TO-92

SOT23-5

VDD

Power Supply Pin. Connect to optocoupler's emitter. Internally limited to

5.5V max. Bypass to GND with a proper compensation network.

GND

Ground

DRV

Driver Output (TO-92 Only). Connect to emitter of the high voltage NPN or
MOSFET. For ACT30A/C, DRV pin is internally connected to DRV1. For
ACT30B/D, DRV pin is internally connected to both DRV1 and DRV2.

DRV1

Driver Output 1 (SOT23-5 Only). Also used as supply input during startup.

DRV2

Driver Output 2 (SOT23-5 Only)

FREQ

Frequency Select (SOT23-5 Only). This terminal has an internal 200k pull
down resistor. Connect to VDD for 100kHz operation. Connect to GND or
leave unconnected for 65khz operation.

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ACT30
ABSOLUTE MAXIMUM RATINGS
(Note: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long
periods may affect device reliability.)
PARAMETER

VALUE

UNIT

-0.3 to 6

20

mA

-0.3 to 18

Internally limited

VDD, FREQ Pin Voltage

VDD Current
DRV, DRV1, DRV2 Voltage
Continuous DRV, DRV1, DRV2 Current
Maximum Power Dissipation

TO-92

0.6

SOT23-5

0.39

Operating Junction Temperature

-40 to 150

Storage Temperature

-55 to 150

300

Lead Temperature (Soldering, 10 sec)

ELECTRICAL CHARACTERISTICS
(VDD = 4V, TJ = 25C unless otherwise specified)
PARAMETER

SYMBOL

TEST CONDITIONS

VDD Start Voltage

VSTART

Rising edge

DRV1 Start Voltage

VDRVST

DRV1 must be higher

than this voltage to
start up.

DRV1 Short-Circuit Detect Threshold

VSCDRV

VDD Under-voltage Threshold

VUV

VDD Clamp Voltage

Startup Supply Current

IDDST

MIN

TYP

MAX

UNIT

4.75

5.25

ACT30A/C

8.6

10.5

ACT30B/D

9.6

11.5

6.8

V
V

Falling edge

3.17

3.35

3.53

10mA

5.15

5.45

5.75

0.23

0.45

mA

0.7

mA

VDD = 4V before VUV

Supply Current

IDD

Switching Frequency

fSW

Maximum Duty Cycle

DMAX

Minimum Duty Cycle

DMIN

VDD = 4.6V

3.5

ILIM

ACT30A/C
VDD = VUV +
ACT30B/D; ACT30E
0.1V
with DRV1 = DRV2

400

Effective Current Limit

ACT30A/B or FREQ = 0

55

65

85

ACT30C/D or FREQ = VDD

75

100

125

ACT30A/C, VDD = 4V

67

75

83

ACT30B/D, VDD = 4V

60

kHz
%
%
mA

800

VDD to DRV1 Current Coefficient

GGAIN

-0.29

A/V

VDD Dynamic Impedance

RVDD

IDRV1 = IDRV2 = 0.05A

3.6

DRV1 Rise Time

1nF load, 15 pull-up

30

ns

DRV1 Fall Time

1nF load, 15 pull-up

20

ns

DRV1 and DRV2 Switch Off Current

Driver off, VDRV1 = VDRV2 = 10V

12

DRV1 or DRV2 Driver On-Resistance

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RDRV1, 2

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30

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ACT30
STARTUP SEQUENCE

FUNCTIONAL DESCRIPTION

Figure 1 shows a Simplified Application

Circuit for the ACT30. Initially, the small current
through resistor R1 charges up the capacitor C1,
and the BJT acts as a follower to bring up the
DRV1 voltage. An internal regulator generates a
VDD voltage equal to VDRV1 3.6V for ACT30A/C
(VDRV1 4.6V for ACT30B/D) but limits it to 5.5V
max. As VDD crosses 5V, the regulator sourcing
function stops and VDD begins to drop due to its
current consumption. As VDD voltage decreases
below 4.75V, the IC starts to operate with
increasing driver current. When the output
voltage reaches regulation point, the optocoupler
feedback circuit stops VDD from decreasing
further. The switching action also allows the
auxiliary windings to take over in supplying the
C1 capacitor. Figure 3 shows a typical startup
sequence for the ACT30.

Figure 2 shows the Functional Block Diagram

of the ACT30. The main components include
switching
control
logic,
two
on-chip
medium-voltage power-MOSFETs with parallel
current sensor, driver, oscillator and ramp
generator, current limit VC generator, error
comparator,
hiccup
control,
bias
and
undervoltage-lockout, and regulator circuitry.
As seen in Figure 2, the design has 6 internal
terminals. VDD is the power supply terminal.
DRV1 and DRV2 are linear driver outputs that
can drive the emitter of an external high voltage
NPN transistor or N-channel MOSFET. This
emitter-drive method takes advantage of the high
VCBO of the transitor, allowing a low cost
transistor such as 13003 (VCBO = 700V) or
13002 (VCBO = 600V) to be used for a wide AC
input range. The slew-rate limited driver coupled
with the turn-off characteristics of an external
NPN result in lower EMI.

To limit the auxiliary voltage, use a 12V zener

diode for ACT30A/C or a 13V zener for
ACT30B/D (D1 diode in Figure 1).

The driver peak current is designed to have a

negative voltage coefficient with respect to
supply voltage VDD, so that lower supply voltage
automatically results in higher DRV1 peak
current. This way, the optocoupler can control
VDD directly to affect driver current.

Even though up to 2M startup resistor (R1)

can be used due to the very low startup current,
the actual R1 value should be chosen as a
compromise between standby power and startup
time delay.

DRV1

9k

REGULATOR

VDD

DRV2

3.6V (ACT30A/C)
4.6V (ACT30B/D)

BIAS
& UVLO

HICCUP
CONTROL

FREQ

OSC &
RAMP
CURRENT

PFWM
SWITCHING
CONTROL
LOGIC

SLEW
1x

200k

56x

56x

20k
ERROR
COMP
ILIM VC
GENERATOR

4.75V

40

20k
10uA/V
GND

GND

FREQ terminal wire-bonded to VDD in ACT30C/D (TO-92)

DRV2 terminal wire-bonded to DRV1 in ACT30B/D (TO-92)

Figure 2. Functional Block Diagram

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ACT30
VAC

pulse-skipped

VDRVST

VDRV1
5V
VDD
IPRIMARY

VOUT

Figure 3. Startup Waveforms

NORMAL OPERATION

CURRENT LIMIT ADJUSTMENT

In normal operation, the feedback signal from

the secondary side is transmitted through the
optocoupler as a current signal into VDD pin,
which has dynamic impedance of 9k. The
resulting VDD voltage affects the switching of the
IC. As seen from the Functional Block Diagram,
the Current Limit VC Generator uses the VDD
voltage difference with 4.75V to generate a
proportional offset at the negative input of the
Error Comparator.

The IC's proprietary driver arrangement

allows the current limit to be easily adjusted
between 400mA and 1.2A. To understand this,
the drivers have to be utilized as linear resistive
devices with typically 3.6 (rather than as digital
output switches). The current limit can then be
calculated through linear combination as shown
in Figure 4. For TO-92 package, the ACT30A/C
are preprogrammed to 400mA current limit and

The drivers turn on at the beginning of each

switching cycle. The current sense resistor
current, which is a fraction of the transformer
primary current, increases with time as the
primary current increases. When the voltage
accross this current sense resistor plus the
oscillator ramp signal equals Error Comparator's
negative input voltage, the drivers turn off. Thus,
the peak DRV1 current has a negative voltage
coefficent of -0.29A/V and can be calculated
from the following:

DRV1

IDRV1PEAK = 0.29A/V (4.75V VDD)

DRV2

ILIM = 400 mA

DRV2

DRV1
DRV2
RD

7 . 2 + RD

ILIM = 400 mA

3.6 + RD

DRV1

ILIM = 800 mA

for VDD < 4.75V and duty cycle < 50%.

When the output voltage is lower than
regulation, the current into VDD pin is zero and
VDD voltage decreases. At VDD = VUV = 3.35V, the
peak DRV1 current has maximum value of
400mA.

RD
DRV1
DRV2

ILIM = 400mA 2 + D
3
.6

Figure 4. Driver Output Configurations

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ACT30
the ACT30B/D are preprogrammed to 800mA
current limit. For ACT30E (SOT23-5) packages,
both DRV1 and DRV2 terminals are provided.

SHORT CIRCUIT HICCUP

When the output is short circuited, the ACT30
enters hiccup mode operation. In this condition,
the auxiliary supply voltage collapses. An on-chip
detector compares DRV1 voltage during the
off-time of each cycle to 6.8V. If DRV1 voltage is
below 6.8V, the IC will not start the next cycle,
causing both the auxiliary supply voltage and VDD
to reduce further. The circuit enters startup mode
when VDD drops below 3.35V. This hiccup
behaviour continues until the short circuit is
removed. In this behavior, the effective duty
cycle is very low resulting in very low short circuit
current.

PULSE SKIPPING
The PFWM Switching Control Logic block
operates in different modes depending on the
output load current level. At light load, the VDD
voltage is around 4.75V. The energy delivered by
each switching cycle (with minimum on time of
500ns) to the output causes VDD to increase
slightly above 4.75V. The FPWM Switching
Control Logic block is able to detect this
condition and prevents the IC from switching until
VDD is below 4.75V again. This results in a
pulse-skipping action with fixed pulse width and
varying frequency, and low power consumption
because the switching frequency is reduced.
Typical system standby power consumption is
0.15W.

To make sure that the IC enters hiccup mode

easily, the transformer should be constructed so
that there is close coupling between secondary
and auxiliary, so that the auxiliary voltage is low
when the output is short-circuited. This can be
achieved with the primary/auxiliary/secondary
sequencing from the bobbin.

APPLICATION INFORMATION

IC

EXTERNAL POWER TRANSISTOR

The ACT30 allows a low-cost high voltage
power NPN transistor such as 13003 or 13002
to be used safely in flyback configuration. The
required collector voltage rating for VAC = 265V
with full output load is at least 600V to 700V. As
seen from Figure 5, NPN Reverse Bias Safe
Operation Area, the breakdown voltage of an
NPN is significantly improved when it is driven at
its emitter. Thus, the ACT30+13002 or 13003
combination meet the necessary breakdown
safety requirement even though RCC circuits
using 13002 or 13003 do not. Table 1 lists the
breakdown voltage of some transistors
appropriate for use with the ACT30.

Base-Drive
Safe
Region
(RCC)

VCEO

VCBO

VCEO

IC

MJE13002

600V

300V

1.5A

TO-126

MJE13003,
KSE13003

700V

400V

1.5A

TO-126

STX13003

700V

400V

1A

TO-92

Active-Semi, Inc.

VCBO

VC

Figure 5. NPN Reverse Bias Safe Operation Area

The power dissipated in the NPN transistor is

equal to the collector current times the
collector-emitter voltage. As a result, the
transistor must always be in saturation when
turned on to prevent excessive power dissipation.
Select an NPN transistor with sufficiently high
current gain (hFEMIN > 8) and a base drive resistor
(R2 in Figure 1) low enough to ensure that the
transistor easily saturates.

Table 1. Recommended Power Transistors List

DEVICE

EmitterDrive Safe
Region
(ACT30)

hFEMIN PACKAGE

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ACT30

Figure 6. A 3.75W Charger Using ACT30A in combination with ACT32

APPLICATION EXAMPLE

LAYOUT CONSIDERATIONS

The application circuit in Figure 6 provides a

5V/0.75A constant voltage/constant current
output. An ACT30A is used in combination with
the ACT32 for highest efficiency and lowest
component count.

The following should be observed when doing

layout for the ACT30:
1. Use a "star point" connection at the GND pin
of ACT30 for the VDD bypass components (C5
and C6 in Figure 6), the input filter capacitor (C2
in Figure 6) and other ground connections on the
primary side.

To change the constant output voltage VOUTCV

and constant current limit IOUTCC, modify R7 and
R6 as following:
R6 = 250mV/IOUTCC

2. Keep the loop across the input filter capacitor,

the transformer primary windings, and the high
voltage transistor, and the ACT30 as small as
possible.

The performance of this circuit is summarized

in Table 2.

3. Keep ACT30 pins and the high voltage

transistor pins as short as possible.

R7 = 80k [(VOUTCV - 1V)/3.8V - 1]

Table 2. System Performance of Circuit in Figure 6

110VAC

220VAC

Standby Power

0.09W

0.15W

Current Limit

0.75A

0.75A

Full Load Efficiency

65%

67%

Active-Semi, Inc.

4. Keep the loop across the secondary windings,

the output diode, and the output capacitors as
small as possible.
5. Allow enough copper area under the high
voltage transistor, output diode, and current
shunt resistor for heat sink.

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ACT30
PACKAGE OUTLINE
TO-92 PACKAGE OUTLINE AND DIMENSIONS (AMMO TAPE PACKING)

DIMENSION IN
MILIMETERS

DIMENSION IN
INCHES

MIN

MAX

MIN

MAX

3.300

3.700

0.130

0.146

A1

1.100

1.400

0.043

0.380

0.550

0.360

4.400

D1

3.430

4.300

SYMBOL

e
e1

DIMENSION IN
INCHES

MIN

MAX

MIN

MAX

-1.0

1.0

-0.039

0.039

0.055

F1, F2

2.2

2.8

0.087

0.110

0.015

0.022

19

21

0.748

0.827

0.510

0.014

0.020

H0

15.5

16.5

0.610

0.650

4.700

0.173

0.185

L1

2.5

12.4

13.0

0.488

0.512

-1.0

1.0

-0.039

0.039

P0

12.5

12.9

0.492

0.508

0.104

P1

3.55

4.15

0.140

0.163

0.063

P2

6.05

6.65

0.238

0.262

0.015

Q1

3.8

4.2

0.150

0.165

t1

0.35

0.45

0.014

0.018

t2

0.15

0.25

0.006

0.010

17.5

19

0.689

0.748

W0

5.5

6.5

0.217

0.256

W1

8.5

9.5

0.335

0.374

0.135
4.700

1.270 TYP
2.440

DIMENSION IN
MILIMETERS

2.640

0.169

0.380

0.185

0.050 TYP
0.096

1.600
0.000

SYMBOL

0.000

W2

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0.098

1.0

0.039

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ACT30
SOT23-5 PACKAGE OUTLINE AND DIMENSIONS

SYMBOL

DIMENSION IN
MILIMETERS

DIMENSION IN
INCHES

MIN

MAX

MIN

MAX

1.050

1.250

0.041

0.049

A1

0.000

0.100

0.000

0.004

A2

1.050

1.150

0.041

0.045

0.300

0.400

0.012

0.016

0.100

0.200

0.004

0.008

2.820

3.020

0.111

0.119

1.500

1.700

0.059

0.067

E1

2.650

2.950

0.104

0.116

e
e1
L

0.950 TYP
1.800

2.000

0.700 REF

0.037 TYP
0.071

0.079

0.028 REF

L1

0.300

0.600

0.012

0.024

Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each product to
make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use as critical
components in life-support devices or systems. Active-Semi, Inc. does not assume any liability arising out of the use of any
product or circuit described in this datasheet, nor does it convey any patent license.

44081 Old Warm Springs Blvd, Fremont, California 94538, USA

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