Convolution Encoder
Convolution Encoder
Introduction
Lattices Convolutional Encoder core is a parameterizable core for convolutional encoding of a continuous input data stream. The core allows variable code rates, constraint lengths and generator polynomials. The core also supports puncturing. Puncturing enables a large range of transmission rates and reduces the bandwidth requirement on the channel. The architectural details of the core are given in the Convolutional Encoder Core Description section.
Convolutional Coding
Convolutional encoding is a process of adding redundancy to a signal stream. Figure 2 shows an example of 1/2 rate convolutional encoding. Figure 2. Convolutional Encoding
If puncturing is employed in the encoder, the decoder will have to de puncture the data before decoding. De puncturing is done by inserting NULL symbols for the punctured symbols. NULL symbols are equidistant from either 0 or 1.
Encoder This module takes input data and performs convolutional encoding. The encoder uses generator polynomials configured by the user. When punctured encoding is enabled, the encoder performs 1/2 rate encoding irrespective of the encoder rate. The puncture unit will use the 1/2 rate code to generate the appropriate user-programmed rate. Puncture Unit This unit performs data puncturing, as previously explained. The input is a two channel data stream and the output is always a one channel output. The unit is capable of performing puncturing of any block size and any rate. Control Unit The control unit generates the handshake signals dout_valid, rfi and pd_start using din_valid and the status of the decoder. It also generates various control signals required by the encoder and puncture unit. Signal Descriptions The top-level representation of the Convolutional Encoder is shown in Figure 5. Table 1 contains the signal descriptions.Timing diagrams for the signals are shown in the Timing Diagrams section.
Table 2 shows the description of core configurations available in the standard evaluation package. Table 2. Core Configurations
Timing Diagrams