3.

Implementation with One Gate Type

Objective
An introduction to two methods for implementing a digital circuit using only one gate type: algebraic manipulation and gate equivalency rules.

3.1 Motivation
In industry, cost is typically the controlling factor in the design and production of goods. In producing digital circuits, even though it may seem that the purchasing department is responsible for reducing costs by finding the cheapest supplier, engineers designing digital circuits have several methods at their disposal for reducing the cost of the design. In general, the fewer and less expensive the parts required to build a circuit, the less it will cost. Therefore, an important goal in circuit design is minimizing the hardware required and the associated cost of that hardware. In hapter !"s lab, simple guidelines were introduced for converting an #$% or %$# expression into a logic diagram. &or example, consider the following #$% expression:

F=AB +

'(.)*

Implementing this circuit would require two A+, gates and one $- gate. The TT. chips required are the /012 'four A+,s* and the /0(! 'four $-s*. Implementing the preceding expression would use 3ust two of the four A+, gates and 3ust one of the four $- gates. In production, this 4ind of inefficiency would be very costly. To get around this inefficiency, it is common practice to implement an expression using only one type of gate typically a +A+, or +$- gate. The +A+, gate is the most 5naturally5 implemented function at the internal level of the chip. This quality results in the +A+, gate being the fastest and least expensive of the TT. chips. In addition, both the +A+, and the +$- gate can act as inverters, thus eliminating the need for separate inverter chips. 6ow can an expression in terms of A+,s and $-s be realized using only +A+, or +$- gates7 There are two primary methods for accomplishing this. &irst, using boolean algebra, the original expression can be manipulated into an equivalent expression using the gate type desired. This method can become extremely complicated, especially when dealing with complex expressions. A second method uses gate equivalency rules that let any gate perform the A+, and $- functions.

3.2 Algebraic Manipulation

The laws of 8oolean algebra allow us to convert a 8oolean expression into an equivalent 8oolean expression that is directly implement able in the gate type desired. &or example, consider implementing 9quation (.) using +A+, gates only. The function of the +A+, gate on two inputs, A and 8, is illustrated in 8oolean algebra as:

&: AB
Thus in implementing an expression using only +A+, gates, the goal is to reduce all logical operations to the form above;that of a +A+, gate. &rom our original expression: F=AB + CD ,ouble bar and apply ,e <organ"s theorem to ma4e all operations in the A+, form:

&:

AB

C D C D

& : ' AB * . '

9xamining this expression we find three +A+, forms:

). ' AB * !. 'C D * 3. ( XY ) where > : ( A B ) and Y ='C D * Thus the expression can be realized using three +A+, gates as illustrated in &igure (.). ?hat if there were a surplus of +$- gates on hand@ how could 9quation (.) be implemented using +$- gates7 &ollowing the same procedure used with the +A+, gate, we recall the function of the +$- gate on two inputs, A and B, is illustrated in boolean algebra as:

&: A + B
Therefore, to implement an expression using only +$- gates, all logical operations must be reduced to the preceding form that of a +$- gate. &rom the original expression:
F = A B +C D

F = A B +C D

Figure 3.1 A ! Implementation o" #$uation 3.1

F = A B +C D

Figure 3.2 O% Implementation o" #$uation 3.1

,ouble bar and apply ,e <organ"s theorem to ma4e all logical operations in the $- form. & : A B +C D
F =' A B *'C D *

& : ' AB * = ' CD * & : ' A + B * = ' C +D * 9xamining this expression, we find two +$- forms: ). !. ' A +B * ' C +D *

The final logical operation between ')* and '!* is the $- function. If a +$- gate is used to perform the $- operation, the final output will be inverted. Therefore an inverter must be placed at the output of this final +$- gate to properly generate &. +ote the use of the +$- gate as an inverter in the logic diagram in &igure (.!. Again the goal is using each gate on each chip.

The possible complexity of using algebraic manipulation is obvious. ?ith this complexity comes a high probability for error. 8ecause of these problems, we study another method for realizing an expression in 3ust one gate type using gateAequivalency rules.

3.3 Gate #$uivalencie&

8oolean algebra is composed of 3ust three operators: A+,, $-, and +$T. Any expression can be implemented using combinations of these three functions. To implement a circuit with 3ust one gate type, all three of these operations must somehow be performed. 3.3.1 'er"orming the OT Function with A ! an( O% hapter ) presented the problem of performing the +$T function with +A+, and +$- gates as an exercise. +A+, and +$- can function as inverters by tying the inputs together as shown in &igure (.(. 3.3.2 'er"orming the A ! Function with A ! an( O% Through simple boolean transformations we can determine how to perform the A+, function with a +A+, or +$- gate. The A+, function on two inputs is illustrated in boolean algebra as: & : A8

Figure 3.3 Invert Function with A ! an( O% The +A+, function is expressed as: F = AB This equation can be reduced to the A+, function by complementing the entire equation 'i.e., the output* to remove the +$T bar. Thus a +A+, gate will perform the A+, function if the output is inverted. The +$function on two inputs is illustrated as: F : A +B 8y applying ,e <organ"s theorem, we obtain an equivalent expression: &: A B This can be reduced to the A+, function by complementing the input variables. Thus a +$- gate will perform the A+, function if the inputs are inverted. In summary, a +A+, gate will perform the A+, function if the output is inverted. A +$- gate will perform the A+, function if the inputs are inverted.

3.3.3 'er"orming the O% Function with A ! an( O%

The $- function on two inputs is illustrated in boolean algebra as: &: A = 8 The +A+, function is expressed as:

&: AB
8y applying ,e <organ"s theorem we obtain an equivalent expression:

&: A = B
This can be reduced to the $- function by complementing the input variables. Thus a +A+, gate performs the $- function if the input variables are complemented. The +$- function on two inputs is illustrated as:

F = A +B

This can be reduced to the $- function by complementing the entire equation 'i.e., the output* to remove the +$T bar. Thus a +$- gate performs the $- function if the output is complemented.

In summary, a +A+, gate will perform the $- function if the inputs are inverted. A +$- gate will perform the $- function if the output is inverted. 3.3.) *ymbolic !e"inition&
To clarify this dual nature of gates, each can be represented symbolically in two forms. #hown in &igure (.0 and &igure (.B are two representations of a +A+, gate and two representations of a +$- gate respectively. The intended function 'A+, or $-* is represented by the basic shape of the symbol. Input or output requirements are dictated by the presence of circles at the inputs or outputs. In direct correlation with the summaries presented in #ections (.(.! and (.(.( we note that the presence of a circle at an input indicates that the input must be inverted to properly perform the function dictated by the symbol shape, that is, the A+, or $- function. Also, the presence of a circle at an output indicates that the output must be inverted to properly perform the function dictated by the symbol shape, that is, the A+, or $- function. It is important to note that these symbols do not represent new gates, 3ust two ways of viewing the +A+, and +$- gates. Thus we can spea4 of the AND form of a +A+, gate and the OR form of a +A+, gate. .i4ewise we can spea4 of the AND form of a +$- gate and the OR form of a +$- gate.

Figure 3.) A ! Gate %epre&entation&

Figure 3.+ O% Gate %epre&entation&

3.3.+ Active ,igh an( Active -ow Input& an( Output&

To further define the meaning of the circles on the gate symbols, we say a gate form with a circle at the output has an active low out ut. A gate form with circles at the inputs is said to have active low i! ut". onversely, a gate form without a circle at the output is said to have an active #i$# out ut, and a gate form without circles at the inputs is said to have active #i$# i! ut". &or example, the A+, form of the +A+, gate can be thought of as an A+, gate with active high inputs and an active low output. The $- form of the +A+, gate can be thought of as an $- gate with active low inputs and an active high output. The term active #i$# refers to logic levels as we have dealt with them so far: a true is represented by a high logic level. Active low indicates that a true is represented by a low logic level rather than a high logic level. To illustrate, consider performing the A+, function with a A ! gate. The A+, function provides a true output only if all inputs are true. .oo4ing at the A+, form of the +A+, gate, we see it too performs the A+, function, but since it has an active low output, a true output is indicated by a low logic level rather than a high logic level. Thus to see a !ormal active high output, we must invert the output of the +A+, gate3ust as was stated in #ection (.(.!. An $- gate produces a true output if any of its inputs are true. .oo4ing at the $- form of the +A+, gate, we see it also performs the $- function, but since it has active low inputs, a true input is indicated by a low logic level rather than a high logic level. To provide these active low inputs from !ormal active high inputs, we must invert each of the inputs. +ote this same requirement stated in #ection (.(.(. Ta4e your time studying the truth tables for these gates in hapter ), and convince yourself the relations stated previously hold.

3.) -ogic !iagram !e&ign .&ing Gate #$uivalencie&

Ceeping in mind the preceding introduction to the concept of gate equivalencies, we now turn to the design of a logic diagram using this concept. Dsing the guidelines from hapter !, the logic diagram to implement 9quation (.) loo4s li4e &igure (.E.

3.).1 -ogic !iagram !e&ign .&ing A ! Gate&

This diagram is easily converted to use 3ust +A+, gates by first replacing all $- gates with the $form of the +A+, gate and replacing all A+, gates with the A+, form of the +A+, gate, as in &igure (./. ,o not draw interconnections yet.

F = A B +C D

Figure 3./ A !0O% Implementation o" #$uation 3.1

Figure 3.1 %eplacing with A ! an( O% Form o" A ! Gate

#ince we deal with active high inputs and outputs in the 5real5 world, the initial inputs and final outputs of a circuit should generally be active high. .oo4ing at &igure (./ we see that this condition is already satisfied. The next step is connection of the A+, forms to the $- form. #ince the $- form of the +A+, gate requires active low inputs and the output of the A+, form is already active low, no level conversion is needed, and a direct connection can be made between the outputs of the A+, forms and the inputs of the $- form. In general, a direct connection can be made between an active low output and input or between an active high output and input. If one is active high and the other is active low, then an inverter must be inserted to convert from one level to the other. <a4ing connections as 3ust described, the final logic diagram using only +A+, gates is illustrated in &igure (.2. ?hen the A+, and $- forms of the +A+, gates on the logic diagram are shown, the intended function of the circuit is more obvious. .oo4ing at &igure (.2, we can readily see it is a #$% implementation;a series of A+,s feeding an $-;while loo4ing at the equivalent circuit in &igure (.), we find that the actual function of the circuit is not clear. A second example will illustrate a condition where level conversion is necessary. onsider implementing a threeAinput $- gate using only twoAinput +A+, gates. If

F = A B +C D

Figure 3.2 A ! Implementation o" #$uation 3.1

F = A+ B+C
Figure 3.3 Three0Input O% with Two0Input Gate&

twoAinput $- gates were available, this function could be implemented as shown in &igure (.F. To implement using only twoAinput +A+, gates we proceed as before replacing all $- gates with the $- form of the +A+, gate. This yields &igure (.)1. To complete the diagram we must first insure active high inputs and outputs to the real world. #ince the inputs of the $- forms are active low, we must invert the input

variables. #ince we are assuming doubleArail inputs, input inverters are not shown in &igure (.)). The final output of the circuit is already active high@ so no conversion is needed there. The final connection is that between the first and second $- form. #ince the output of the first $- form is active high and the input of the second $form is active low, a direct connection cannot be made. To match the levels, a +A+, gate used as an inverter is inserted. #ince the inverter is converting from active high to active low, we show the A+, form of the +A+, gate as an inverter since it has active high inputs and an active low input.

3.).2 -ogic !iagram !e&ign .&ing O% Gate&

As with the +A+, gates, the first step in implementing a circuit using only +$- gates is replacing all $- gates with the $- form of the +$- gate and all A+, gates with the A+, form of the +$- gate. ,oing this for &igure (.B yields &igure (.)!. &irst we must provide active high inputs and outputs to the real world. The A+, form of the +$- gate has active low inputs@ so the input variables must be complemented. #ince we are assuming doubleArail inputs, the input inverters are not shown in &igure (.)(. The final output of the circuit is also active low@ so an inverter must be added to convert this output to active high. A +$- gate is used as an inverter, and to show the active low input and active high output required of the inverter, the A+, form of the +$- gate is shown. &inally, connections can be made directly between the outputs of the A+, forms and the inputs of the $- form since both are active high. The final logic diagram using only +$- gates is shown in &igure (.)(.

Figure 3.14 %eplacing with O% Form o" A ! Gate

F = A+ B+C
Figure 3.11 Two0Input A ! Implementation o" Three0Input O%

Figure 3.12 %eplacing with A ! an( O% Form o" O% Gate

F = A B +C D

Figure 3.13 O% Implementation o" #$uation 3.1

-ab #5erci&e Objective This lab allows the student to apply concepts from hapter ( to implement a networ4 that he or she must design. &irst, given a description of the digital networ4 desired, the student must define in truth table, #$% and %$# form, the function of this networ4. &rom these definitions, the topics covered in hapter ( are used to implement the #$% and %$# expressions using A ! gates only.

'roce(ure 1. ,esign and build an even parity generator for a (Abit word. This circuit will have three inputs 'the ( bits of the word* and one output. This output should be ) if there is an odd number of 1& in the input word@ otherwise, the output should be 1 'if there is an even number of )s in the input word*. %roduce a design using gate equivalency rules containing: 6a7 A truth table defining the function as previously described. 6b7 An #$% equation for the truth table. 6c7 A %$# equation for the truth table. 6(7 A logic diagram to implement the #$% equation using +A+, gates only. '#how A+, and $- forms.* 6e7 A logic diagram to implement the %$# equation using +A+, gates only. '#how A+, and $- forms.* ?ire 6(7 and 6e7 and verify their operation. 6ave the lab instructor inspect your wor4 after each circuit is wor4ing.