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Arm Multiple Choice

1. ARM stands for Advanced RISC Machines. 2. The main importance of ARM microprocessors is providing operation with low cost and low power consumption. 3. ARM processors were basically designed for mobile systems like handheld devices.

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10K views

Arm Multiple Choice

1. ARM stands for Advanced RISC Machines. 2. The main importance of ARM microprocessors is providing operation with low cost and low power consumption. 3. ARM processors were basically designed for mobile systems like handheld devices.

Uploaded by

Stalin Sbr
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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ARM MULTIPLE CHOICE 1. ARM stands for _____________ .

a) Advanced Rate Machines b) Advanced RISC Machines c) Artificial Running Machines d) Aviary Running Machines View Answer 2. The ain i !ortance of ARM icro"!rocessors is !roviding o!eration #ith$ a) Low cost and lo# !o#er consu !tion b) %igher degree of ulti"tas&ing c) 'o#er error or glitches d) (fficient e ory anage ent View Answer Ans#er)a (*!lanation) The Stand alone feature of the ARM !rocessors is that they+re econo ically viable. ,. ARM !rocessors #here basically designed for _______ . a) Main frame systems b) Distributed systems c) Mobile systems d) Super computers View Answer Ans#er)c (*!lanation) These ARM !rocessors are designed for handheld devices. -. The ARM !rocessors doesn+t su!!ort .yte address ability / a) True b) 0alse View Answer Ans#er)b (*!lanation) The ability to store data in the for 1. The address s!ace in ARM is ______ . a) 222b) 223c) 2213 d) 22,2 View Answer Ans#er)d (*!lanation) 4one. 3. The address syste a) 'ittle (ndian su!!orted by ARM syste s is5are ______ . of consecutive bytes.

b) .ig (ndian c) 6"'ittle (ndian d) .oth a and b View Answer Ans#er)d (*!lanation) The #ay in #hich$ the data gets stored in the syste allocation is called as address syste . or the #ay of address

7. Me ory can be accessed in ARM syste s by _____ instructions . i) Store ii) M89( iii) 'oad iv) arith etic v) logical a) i$ii$iii b) i$ii c) i$iv$v d) iii$iv$v View Answer Ans#er)b (*!lanation) 4one. :. RISC stands for _________ . a) Restricted Instruction Se;uencing Co !uter b) Restricted Instruction Se;uential Co !iler c) Reduced Instruction Set Co !uter d) Reduced Induction Set Co !uter View Answer Ans#er)c (*!lanation) This is a syste architecture$ in #hich the !erfor ance of the syste i !roved by reducing the si<e of the instruction set. =. In ARM$ >C is i !le ented using ____ . a) Caches b) %ea!s c) General purpose register d) Stac& View Answer Ans#er)c (*!lanation) >C is the !lace #here the ne*t instruction about to be e*ecuted is stored. 1?. The additional du!licate register used in ARM a) Co!ied"registers b) .an&ed registers c) (6tra registers achines are called as _______ . is

d) (*tential registers View Answer Ans#er)b (*!lanation) The du!licate registers are used in situations of conte*t s#itching. 11. The ban&ed registers are used for$ a) S#itching bet#een su!ervisor and interru!t b) (*tended storing c) Sa e as other general !ur!ose registers d) .oth a and c View Answer Ans#er)a (*!lanation) @hen s#itching fro one ode to another$ instead of storing the register contents so e#here else it+ll be &e!t in the du!licate registers and the ne# values are stored in the actual registers. 12. (ach instruction in ARM achines is encoded into ____ @ord . a) 2 byte b) , byte c) - byte d) : byte View Answer Ans#er)c (*!lanation) The data is encry!ted to a&e the secure. 1,. All instructions in ARM are conditionally e*ecuted . a) True b) 0alse View Answer Ans#er)a (*!lanation) 4one. 1-. The addressing ode #here the (A of the o!erand is the contents of Rn is ______ . ode ode

a) >re"inde*ed ode b) >re"inde*ed #ith #rite bac& c) >ost"inde*ed ode d) 4one of the above View Answer Ans#er)c

(*!lanation) 4one. 11. The effective address of the instruction #ritten in >ost"inde*ed _______ . a) (A D ARnB b) (A D ARn C R B c) (A D ARnB C R

ode$ M89(ARnBCR

is

d) (A D AR B C Rn View Answer Ans#er)a (*!lanation) (ffective address is the address that the co !uter ac;uires fro instruction being e*ecuted. the current

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