Logic Gate
Logic Gate
requirements.
AND logic gate:
The diode AND is basically the same as the OR except it is turned
upside down. The diodes are reversed so that the cathodes are
connected to the inputs and the anodes are connected together to
provide the output. R is connected to +12 volts to provide the
forward bias current for the diodes and current for output drive.
If all inputs A AND B AND C are a positive voltage (+6 volts here),
current flowing through R will pull the output positive till the diodes
clamp the output to +6 volts, the logical 1 output level. If any input
switches to 0 volts (logical 0 level), current flowing through the
diode will pull the output voltage down to 0 volts. The other diodes
would be reverse biased and conduct no current.
If input A or B or C is 0, the output will be 0. Only if all inputs, A
AND B AND C are 1 will the output be 1. This is the definition of a
logic AND. The truth table on the right of the image shows the
output for all combinations of inputs.
This can be written as:
A AND B AND C = OUTPUT
or
AxBxC=OUTPUT
(In Boolean algebra the multiplication symbol denotes AND.)
Similar to the diode OR, R can return to any voltage that is
more positive than the logic level 1. If R is connected to a
voltage equal to the 1 level it will have no drive current
available to drive the next circuit. All signal levels, the value
Silicon diode:
Max forward voltage at 10 ma = 1 volt @ 0 to 125 C
Max reverse leakage current at 15 volts = 1 microamps @
85 C
Effects of component manufacturing variations and
temperature are usually included in these
specifications.
More realistically the germanium forward voltage might
be 0.25 to 0.4 volts but this is often not specified. The
silicon leakage current might be much lower possibly 1
to 100 nanoamps.
PN diodes also have transient behaviors that might be
of concern with the design. The capacitance of a PN
diode between anode and cathode is inversely
proportional to the reverse voltage, growing as it
approaches zero volts and into forward bias. There is
also a recovery concern where the current will not
decrease immediately when it is switched from forward
bias to reverse bias. In the case of the diode OR if two
or more of the inputs are at the 1 level and one
switches to 0 it will cause a glitch or increase in current
in the diodes that remain at 1. This can cause a short
term dip in the output voltage. In practice if the diode
logic gate drives a transistor inverter, as it usually
does, and the diode and transistor are of similar
construction the transistor will have a similar base
collector capacitance that is amplified by the transistor
gain so that it will be too slow to pass the glitch. Only