Lab 3 Report
Design of a Common-Source MOSFET
Amplifier with a Source Follower
Kevin Bradshaw & Kai Qin
ECEN 326-502
Instructor: Sebastian Hoyos
Date Performed: February 18, 2016
Objectives
Understand the characteristics of a two-stage dual-supply MOSFET amplifier circuit.
Design and analyze a common-source, source follower, and two current mirror
configurations meeting certain constraints.
Evaluate the DC operating point of the transistor amplifiers and a transistor current
sources
Procedure
In this lab, the MOSFET circuit designed from the pre-lab was constructed. The
amplifier was designed to fit the constraints shown in Figure 1:
Figure 1: MOSFET Amplifier Design Constraints
Using a chosen value for the drain current of the first MOSFET (M1), the gate source
voltage for M3 was found using the quadratic formula. This was because the drain
currents of M1, M2, and M3 are all equal. Then, the first base resistor, Rb1, was solved
for. The same procedure was done for the gate source voltage of M6 because the drain
currents of M4, M5, and M6 are all equal. Using this voltage, the second base resistor,
Rb2, was solved for. Using the drain currents, the transconductance of M1 and M4 were
also calculated. The transconductance, the resistance load, and the gain were all used
to find the main drain resistor. Lastly, the first gate resistor was chosen and then the
second gate resistor was used by using KVL and a voltage divider. Figure 2 shows the
resulting circuit designed and Table 1 shows the actual values used in the circuit. These
values were adjusted after construction in order to get an optimum gain with no clipping
in the voltage swing.
Figure 2: Two-Stage Dual-Supply MOSFET Amplifier
After the circuit was adjusted, the operating currents and voltages (including the
maximum unclipped output signal voltage amplitude) were measured and can be seen
in Table 2. Furthermore, the input resistance, current supply, and gain were measured
and can also be seen in Table 3. The gain of the common-source can be seen in Figure
3 and the overall gain of this circuit can be seen in Figure 4. The maximum output
voltage swing can be seen in Figure 5. Lastly, the THD was not able to be measured
because of some problems using the NI ELVIS board at the station that was being used.
Figure 3: Common Source Amplifier Gain
Figure 4: Overall Gain on the Load
Figure 4: Maximum Output Voltage Swing
Data Tables
Table 1: Final Design Circuit Parameters
Parameter
Value
Base Resistor 1 (RB1)
16.88 k
Base Resistor 2 (RB2)
40.5 k
Gate Resistor 3 (RG1)
600 k
Gate Resistor 4 (RG2)
133 k
Drain Resistor (RD)
133 k
Load Resistor (RL)
5 k
Capacitors 1, 2, 3 (C)
10 F
Table 2: Operating Bias Points
Parameter
Value
Drain Current 1 (ID1)
101.36 uA
Drain Current 4 (ID4)
0.424 mA
Drain Voltage 1 (VD1)
-3.265 V
Drain Voltage 2 (VD2)
-3.998 V
Drain Voltage 5 (VD5)
-4.559 V
Table 3: Measured Circuit Values
Parameter
Value
VDD Supply Current
0.665 mA
VSS Supply Current
1.24 mA
Gain (at the Common-Source)
17
Gain (at the Emitter Follower)
Input Resistance
118.41 k
Maximum Unclipped Out Signal
Amplitude
Approximately 330 mV (at 70 mV input)
Discussion
The problem we encountered was that the circuit built using the pre-lab parameters did
not meet the specification requirement of gain (Av) of 30. The overall gain of input peak
to peak voltage 4.14 mV was 31.38 which did not meet the Av = 30 requirement. The
highest first stage gain we got during the lab was 25. To solve this problem, we
connected potentiometers to the first and last stage for changing DC bias points. We
were trying to increase the first stage gain to 35. So the overall gain will meet the
requirement. According to the equation of the first stage gain, we tried to decrease Rb1
to increase Id, and increase Rd.
Equation 1: Overall gain equation
The reason we think that caused this problem was that the second stage gain was too
small. We simulated the circuit again based those resistances used during the lab time.
The transient simulation result is shown in figure 5. The overall gain is about 17, which
is relatively larger than the experimental result. Then we changed the second stage
resistance Rb2 from 40.5k to 4k. The gain increased to 22 which is shown in figure 6.
Figure 5: Simulation result
Figure 6: Simulation result with Rb2 = 4k
The gain of 22 when Rb2 changed to 4k shows that during the lab time our second
stage circuit was the problem so that the overall gain did not fit the requirement.
Therefore, we did not have enough time to finish the THD measurement.
Conclusion
From this lab, we have a better understanding of the characteristics of a two-stage dualsupply MOSFET amplifier circuit, and we became more familiar with the procedures of
how to design and analyze a common-source, source follower, and two current mirror
configurations meeting certain constraints. When the pre-lab design did not meet given
constraints, we inspected output signals from every stage and evaluated the DC
operating points of the transistor amplifiers and the transistor current source. Even
though we did meet the gain of 30 requirement, we found the problem after the class
using PSPICE.
