ADC Tutorial
ADC Tutorial
Analog-to-Digital Conversion
EE3954
by
Maarten Uijt de Haag, Tim Bambeck, Harsha Chenji
ADC.1
Data
Bus
8
Timer0
Timer1
Timer2
ADC
PORTE
CCPs
Comparators
Synchronous
Serial Port
USARTs
Other
Modules
Parallel
Slave Port
LCD
Drivers
RE0
RE1
RE2
RF3
RE4
RE5
RE6
RE7
PORTA
Voltage
Reference
Data
EEPROM
RA0
RA1
RA2
RA3
RA4
RA5
RA6
RA7
ADC.2
Microcontroller
Electric
Circuit
Transducer
RA1/AN1
(ADC)
Signal Conditioner
PIC16F877
x(t)
Analog Signal
ADC.3
Analog-to-Digital
Conversion
v(t)
Analog Signal
x[k]
Discrete-Time Signal
t
v(t)
Discrete-Amplitude Signal
x[k]
Digital Signal
ADC.4
Microcontroller
DAC
Transducer
PIC16F877
x(t)
Analog Signal
x[k]
Digital Signal
ADC.5
ADC
Comparator
Basic Component:
Input signal, Vin
Reference Voltage, Vref
+
_
Output, Vout
ADC.6
ADC
1-bit Example
5V
2.5V
0V
ADC.7
ADC
2-bit Example
5.00 v
3.75 v
ADC
5.00 V
4.375 V
3.750 V
3.125 V
2.500 V
1.875 V
1.250 V
0.625 V
0.000 V
111
110
101
100
011
010
001
000
A/D Converter
Binary Output
Input Voltage
To A/D Converter
3-bit Example
ADC
3-bit Example
Examples:
Examples:
Digital Output:
2.8756V
100
-0.234V
000
4.9876V
111
1.1V
001
3.2V
101
ADC.10
ADC
The PIC16F877 Microcontroller
10-bits:
210 = 1024 levels => 1023 thresholds
Resolution = 5V/1024 = 0.0048828125 V
Thresholds:
0.0048828125 V
0.009765625 V
0.0146484375 V
Etc.
ADC.11
ADC
Example:
3-bit ADC
Vin
I7
I6
3.125V
I5
O0
2.500V
I4
1.875V
I3
1.250V
0.625V
Priority
Encoder
O1
O2
I2
I1
I0
ADC.12
I7
I6
I5
I4
I3
I2
I1
I0
O2
O1
O0
ADC.13
ADC
Example:
3-bit ADC
Vin
I7
I6
3.125V
I5
O0
2.500V
I4
1.875V
I3
1.250V
0.625V
I2
I1
I0
Priority
Encoder
O1
O2
Major drawback:
An n-bit ADC Requires 2n-1 comparators,
thus expensive
Advantage:
Highest speed ADC available
ADC.14
ADC in 16F877
Vin
Successive
Approximation
Register
Clear
Start
DFlip
Flops
(Latche)s
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Digital
Output
8-bit
D/A converter
ADC
Set D7 to 1
and compare
V to Vin
V < Vin
N
Clear D7
Set D6 to 1
and compare
V to Vin
V < Vin
N
Clear D6
Set D5 to 1
and compare
V to Vin
Set D0 to 1
and compare
V to Vin
V < Vin
V < Vin
N
Clear D5
Clear D0
ADC.16
Successive Approximation
Example 4.3V Step 1 Bit 7 (D7)
5V
4.3V
D7 = 1
(1XXX XXXX)
Threshold = 2.5V
D7 = 0
(0XXX XXXX)
0V
D7 = Most Significant Bit
ADC.17
Successive Approximation
Example 4.3V Step 2 Bit 6 (D6)
5V
4.3V
D6 = 1
(11XX XXXX)
D6 = 0
(10XX XXXX)
Threshold = 3.75
0V
D7 = Most Significant Bit
ADC.18
Example
Voltage input range: 0V 5V
Number of bits: 8 => 28 = 256 levels (= 255 thresholds)
Resolution = 5V / 256 = 0.01953125 V
Thresholds at : 0.01953125 V
2x0.01953125 V = 0.0390625 V
3x0.01953125 V = 0.05859375 V
ADC.19
ADC
Reference Manual:
Section 21 & 22 (8-bit ADC),
Section 23 (10-bit ADC)
Datasheet:
Section 11 (10-bit ADC)
ADC.20
ADC
Timer1
Timer2
ADC*
Data
Bus
8
CCPs
Comparators
Synchronous
Serial Port
USARTs
Other
Modules
Parallel
Slave Port
LCD
Drivers
PORTF
RF0
RF1
RF2
RF3
RF4
RF5
RF6
RF7
PORTG
Voltage
Reference
*or A/D
Data
EEPROM
RG0
RG1
RG2
RG3
RG4
RG5
RG6
RG7
ADC.21
ADC
The configuration
ADC.22
ADC.23
ADC.24
ADC.25
Digital input:
the standard
input as we used
it before!!
ADC.26
ADC
The result
ADC.27
ADC
The result
ADC.28
ADC
ADC.29
ADC
Timing
ADC.30
Tc = 16.5 s
ADC.33
= 1.25 s
ADC.34
Tacq = 19.75 s
With our 4 MHz PICs in lab (1 s instruction cycle)
We would delay 20 s before we start conversion (GO is set)
ADC.35
ADC
Timing
19.75 s
(example)
ADC.36
Successive Approximation
ADC.37
Operation
2 * Tosc
8 * Tosc
32 * Tosc
use internal RC
TAD Time
0.50 s
2.00 s
8.00 s
( 2 6 s )
Select ADCS1, ADCS0 to 0,1 since this gives 2.0 s time for TAD.
ADC.38
19.75 s
(example)
11.5 * TAD
= 23 s
Note You must wait at least 2 * TAD before next acquisition is started.
ADC.39
ADC
The configuration
ADC.40
ADC
*if desired
ADC.41
ADC
*if desired
ADC.42
ADC
The interrupt
ADC.43
ADC
Use POLLING:
Keep checking the DO/DONE
bit, if it is cleared the
conversion is done.
Use INTERRUPTS:
Wait for the ADC interrupt
*if desired
ADC.44
ADC
An Example
RA1/AN1
PIC16F877
ADC.45
Example
Configure A/D Module
Configure A/D Interrupt*
Wait for TACQ
Start Conversion (set GO)
Wait for conversion
to complete
Read A/D Result
Wait for at least 2TAD
before next acquisition
ADC.46
Example
Conversion clock
4MHz < 5MHz thus
ADCS1:ADCS0 = 01
Turn on Module:
ADON = 1
RA1/AN1 thus
CHS2:CHS0 = 001
RA1/AN1 thus
PCFG3:PCFG0 = 0000
ADC.47
Code
equ
equ
org
movlw
movwf
bsf
movlw
movwf
bcf
0x1F
0x1F
0x000
B01001001
ADCON0
STATUS, RP0
B10000000
ADCON1
STATUS, RP0
ADC.48
Example
Configure A/D Module
Configure A/D Interrupt*
Wait for TACQ
Start Conversion (set GO)
Wait for conversion
to complete
Read A/D Result
Wait for at least 2TAD
before next acquisition
ADC.49
Example
DELAY:
NXT:
movlw
movwf
decfsz
goto
return
0x05
COUNT
COUNT
NXT
;1
;1
; 1/2
;2
;2
Code
Main Loop
MAIN:
CHECK:
*GO/DONE = 0
call
DELAY
bsf
ADCON0,2
btfsc
ADCON0,2
goto
CHECK
movf
ADRESH,W
movwf
TEMPH
bsf
STATUS,RP0
movf
ADRESL,W
bcf
STATUS,RP0
movwf
TEMPL
nop
nop
goto MAIN
Code
call
DELAY
bsf
ADCON0,2
btfsc
ADCON0,2
goto
CHECK
movf
ADRESH,W
movwf
TEMPH
bsf
STATUS,RP0
movf
ADRESL,W
movwf
TEMPL
bcf
STATUS,RP0
nop
nop
goto MAIN
; 20
;1
; ~12 Tad = 24
;
;1
;1
;1
;1
;1
;1
;1
;1
;2
Nyquist Criterion
fs > 2B
Sample
frequency
Signal
bandwidth
ADC.53
Nyquist Criterion
Example
RA1/AN1
PIC16F877
Must sample at
fs > 2*(20,000 20) = 39,960Hz 40kHz
For example:
And
CD 16 bits per sample
ADC.54
ADC
INIT_ADC:
INIT_IRQ:
0x1F
0x1F
org
goto
org
goto
movlw
movwf
bsf
movlw
movwf
bcf
bcf
bsf
bsf
bcf
bsf
bsf
0x000
INIT_ADC
0x004
AD_ISR
B01001001
ADCON0 ; Configure ADC via ADCON0
STATUS, RP0
; Access bank 1
B10000000
ADCON1 ; Configure ADC via ADCON1
STATUS, RP1
PIR1, ADIF
; Clear the ADIF flag (bit 6)
STATUS,RP0
; Access bank 1
PIE1, ADIE
; Enable AADC interrupt
STATUS, RP0
; Access bank 0
INTCON, PEIE
; Enable peripheral interrupts
INTCON, GIE
; Enable global interrupts
ADC.55
Code
MAIN
AD_ISR:
*GO/DONE = 0
call
bsf
goto
movf
movwf
movf
movwf
call
bsf
bcf
retfie
DELAY
ADCON0,2
MAIN
ADRESH,W
TEMPH
ADRESL,W
TEMPL
DELAY
ADCON0,2
PIR1, ADIF
ADC.56
ADC
VDD
RA5/AN4
RA1/AN1
Vss
PIC16F877
NOTE that in this case RA5 is a DIGITAL input and RA1 is an ANALOG input
ADC.57
INIT_ADC:
movlw
movwf
bsf
movlw
movwf
movlw
movwf
bcf
B01001001
ADCON0 ; Configure ADC via ADCON0
STATUS, RP0
; Access bank 1
B10000100
ADCON1 ; Configure ADC via ADCON1
B11111111
; Configure RA5 as an input pin
TRISA
STATUS, RP1
ADC.58