Real-Time
Scheduling
Chenyang
Lu
CSE
467S
Embedded
Compu5ng
Systems
Readings
Single-Processor Scheduling: Hard Real-Time Computing Systems, by G.
Buttazzo.
q Chapter 4 Periodic Task Scheduling
q Chapter 5 (5.1-5.4) Fixed Priority Servers
q Chapter 7 (7.1-7.3) Resource Access Protocols
Optional further readings
q A Practitioner's Handbook for Real-Time Analysis: Guide to Rate Monotonic
Analysis for Real-Time Systems, by Klein et al.
q Deadline Scheduling for Real-Time Systems: EDF and Related Algorithms, by
Stankovic et al.
Real-Time
Scheduling
What are the optimal scheduling algorithms?
How to assign priorities to processes?
Can a system meet all deadlines?
Benet
of
Scheduling
Analysis
Schedulability analysis reduces development time by 50%!
Reduce wasted implementation/testing rounds
Analysis time << testing
More reduction expected for more complex systems
Quick exploration of design space!
VEST (UVA) Baseline (Boeing)
Design one processor 40 Design one processor 25
Implementation one processor 75
Scheduling analysis - MUF 1 Timing test 30
Design - two processors 25 Design - two processors 90
Implementation two processors 105
Scheduling analysis - DM/Offset 1 Timing test 20
Implementation 105
Total composition time 172 Total composition time 345
J.A.
Stankovic,
et
al.,
VEST:
An
Aspect-Based
Composi5on
Tool
for
Real-Time
Systems,
RTAS
2003.
Consequence
of
Deadline
Miss
Hard deadline
q System fails if missed.
q Goal: guarantee no deadline miss.
Soft deadline
q User may notice, but system does not fail.
q Goal: meet most deadlines most of the time.
Comparison
General-purpose systems
q Fairnessto all tasks (no starvation)
q Optimize throughput
q Optimize average performance
Embedded systems
q Meet all deadlines.
q Fairness or throughput is not important
q Hard real-time: worry about worst case performance
Chenyang Lu
6
Terminology
Task
q Map to a process or thread
q May be released multiple times
Job: an instance of a task
Periodic task
q Ideal: inter-arrival time = period
q General: inter-arrival time >= period
Aperiodic task
q Inter-arrival time does not have a lower bound
Chenyang Lu
7
Timing
Parameters
Task Ti
q Period Pi
q Worst-case execution time Ci
q Relative deadline Di
Job Jik
q Release time: time when a job is ready
q Response time Ri = finish time release time
q Absolute deadline = release time + Di
A job misses its deadline if
q Response time Ri > Di
q Finish time > absolute deadline
Chenyang Lu
8
Example
P1 = D1 = 5, C1 = 2; P2 = D2 = 7, C2 = 4.
Chenyang Lu
9
Metrics
A task set is schedulable if all jobs meet their deadlines.
Optimal scheduling algorithm
q If a task set is not schedulable under the optimal algorithm, it is not
schedulable under any other algorithms.
Overhead: Time required for scheduling.
Chenyang Lu
10
Scheduling
Single
Processor
OpCmal
Scheduling
Algorithms
Rate Monotonic (RM)
q Higher rate (1/period) Higher priority
q Optimal preemptive static priority scheduling algorithm
Earliest Deadline First (EDF)
q Earlier absolute deadline Higher priority
q Optimal preemptive dynamic priority scheduling algorithm
Chenyang Lu
12
Example
P1 = D1 = 5, C1 = 2; P2 = D2 = 7, C2 = 4.
Chenyang Lu
13
AssumpCons
Single processor.
All tasks are periodic.
Zero context switch time.
Relative deadline = period.
No priority inversion.
RM and EDF have been extended to relax assumptions.
Chenyang Lu
14
Schedulable
UClizaCon
Bound
Utilization of a processor:
n
Ci
U =
i =1 Pi
n: number of tasks on the processor.
Utilization bound Ub: All tasks are guaranteed to be
schedulable if U Ub.
No scheduling algorithm can schedule a task set if U>1
Ub 1
An algorithm is optimal if its Ub = 1
Chenyang Lu
15
RM
UClizaCon
Bound
Ub(n) = n(21/n-1)
q n: number of tasks
q Ub(2) = 0.828
q Ub(n) Ub() = ln2 = 0.693
U Ub(n) is a sufficient condition, but not necessary.
Ub = 1 if all task periods are harmonic
q Periods are multiples of each other
q e.g., 1,10,100
Chenyang Lu
16
ProperCes
of
RM
RM may not guarantee schedulability even when CPU is not
fully utilized.
Low overhead: when the task set is fixed, the priority of a task
never changes.
Easy to implement on POSIX APIs.
Chenyang Lu
17
EDF
UClizaCon
Bound
Ub = 1
U 1: sufficient and necessary condition for schedulability.
Guarantees schedulability if CPU is not over-utilized.
Higher overhead than RM: task priority may change online.
Chenyang Lu
18
AssumpCons
Single processor.
All tasks are periodic.
Zero context switch time.
Relative deadline = period.
No priority inversion.
What if relative deadline < period?
Chenyang Lu
19
OpCmal
Scheduling
Algorithms
RelaCve
Deadline
<
Period
Deadline Monotonic (DM)
q Shorter relative deadline Higher priority
q Optimal preemptive static priority scheduling
Earliest Deadline First (EDF)
q Earlier absolute deadline Higher priority
q Optimal preemptive dynamic priority scheduling algorithm
Chenyang Lu
20
DM
Analysis
Sufficient but pessimistic test
n
Ci 1/ n
n(2 -1)
i =1 Di
Sufficient and necessary test: response time analysis
Chenyang Lu
21
Response
Time
Analysis
Works
for
any
xed-priority
preemp5ve
scheduling
algorithm.
Cri5cal
instant
results
in
a
tasks
longest
response
5me.
when
all
higher-priority
tasks
are
released
at
the
same
5me.
Worst-case
response
5me
Tasks
are
ordered
by
priority;
T1
has
highest
priority
i 1
Ri
Ri = Ci + C j
j =1 Pj
Chenyang Lu
22
Response
Time
Analysis
Tasks
are
ordered
by
priority;
T1
has
the
highest
priority.
for
(each
task
Tj)
{
I
=
0;
R
=
0;
while
(I
+
Cj
>
R)
{
R
=
I
+
Cj;
if
(R
>
Dj)
return
UNSCHEDULABLE;
j-1 R
I = k=1 P Ck;
k
}
}
return
SCHEDULABLE;
Chenyang Lu
23
Example
P1 = D1 = 5, C1 = 2; P2 = D2 = 7, C2 = 4.
Chenyang Lu
24
EDF:
Processor
Demand
Analysis
To start, assume Di = Pi
Processor demand in interval [0, L]: total time needed for
completing all jobs with deadlines no later than L.
n
L
CP (0, L) = Ci
i =1 Pi
Chenyang Lu
25
Schedulable
CondiCon
Theorem: A set of periodic tasks is schedulable by EDF if
and only if for all L 0:
n
L
L Ci
i =1 Pi
There is enough time to meet processor demand at every
time instant.
Chenyang Lu
26
Busy
Period
Bp
End at the first time instant L when all the released jobs are
completed
W(L): Total execution time of all tasks released by L.
n
L
W ( L) = Ci
i =1 Pi
B p = min{L | W ( L) = L}
Chenyang Lu
27
ProperCes
of
Busy
Period
CPU is fully utilized during a busy period.
The end of a busy period coincides with the beginning
of an idle time or the release of a periodic job.
Chenyang Lu
28
Schedulable
CondiCon
All tasks are schedulable if and only if
n
L
L Ci
i =1 Pi
at all job release times before min(Bp, H)
Chenyang Lu
29
Compute
Busy
Period
busy_period
{
H
=
lcm(P1,,Pn);
/*
least
common
multiple
*/
L
=
Ci;
L'
=
W(L);
while
(L'
!=
L
and
L'
<=
H)
{
L
=
L';
L'
=
W(L);
}
if
(L'
<=
H)
Bp
=
L;
else
Bp
=
INFINITY;
}
Chenyang Lu
30
Processor
Demand
Test:
Di
<
Pi
A set of periodic tasks with deadlines no more than than
periods is schedulable by EDF if and only if
L Di
n
L D, L + 1 Ci
Pi
i =1
where D = {Di,k | Di,k = kPi+Di, Di,k min(Bp, H), 1in, k0}.
Note: only need to test all deadlines before min(Bp,H).
Chenyang Lu
31
Schedulability
Test
Revisited
D = P
D < P
Static Priority
RM
DM
Utilization bound
Response time
Response time
Dynamic Priority
EDF
EDF
Utilization bound
Processor demand
Chenyang Lu
32
AssumpCons
Single processor.
All tasks are periodic.
Zero context switch time.
Relative deadline = period.
No priority inversion.
Chenyang Lu
33
QuesCons
What causes priority inversion?
How to reduce priority inversion?
How to analyze schedulability?
Chenyang Lu
34
Priority
Inversion
A low-priority task blocks a high-priority task.
Sources of priority inversion
q Access shared resources guarded by semaphores.
q Access non-preemptive subsystems, e.g., storage, networks.
Chenyang Lu
35
Semaphores
OS primitive for controlling access to shared variables.
q Get access to semaphore S with wait(S).
q Execute critical section to access shared variable.
q Release semaphore with signal(S).
Mutex: at most one process can hold a mutex.
wait(mutex_info_bus);
Write
data
to
info
bus;
signal(mutex_info_bus);
Chenyang Lu
36
What
happened
to
Pathnder?
But a few days into the mission, not long after Pathfinder
started gathering meteorological data, the spacecraft began
experiencing total system resets, each resulting in losses of
data
Real-World
(Out
of
This
World)
Story:
Priority
inversion
almost
ruined
the
path
nder
mission
on
MARS!
hYp://[Link][.com/~mbj/
Chenyang Lu
37
Priority
Inversion
critical section
T1 blocked!
1 1 1
4 4 4 4
0 2 4 6 8 10 12 14 16 18 20 22
Chenyang Lu
38
Unbounded
Priority
Inversion
critical section
T1 blocked by T4,T2,T3!
1 1 1
4 4 4 4 4
0 2 4 6 8 10 12 14 16 18 20 22
Chenyang Lu
39
SoluCon
The low-priority task inherits the priority of the blocked
high-priority task.
critical section
T1 only blocked by T4
1 1 1
Inherit Return to
priority 1! 3
priority 4!
2
4 4 4 4
0 2 4 6 8 10 12 14 16 18 20 22
Chenyang Lu
40
Priority
Inheritance
Protocol
(PIP)
When task Ti is blocked on a semaphore held by Tk
q If prio(Tk) is lower than prio(Ti), prio(Ti) Tk
When Tk releases a semaphore
q If Tk no longer blocks any tasks, it returns to its normal priority.
q If Tk still blocks other tasks, it inherits the highest priority of the
remaining tasks that it is blocking.
Priority Inheritance is transitive
q T2 blocks T1 and inherits prio(T1)
q T3 blocks T2 and inherits prio(T1)
Chenyang Lu
41
How
was
Path
Finder
saved?
When created, a VxWorks mutex object accepts a boolean parameter that
indicates if priority inheritance should be performed by the mutex.
q The mutex in question had been initialized with the parameter FALSE.
VxWorks contains a C interpreter intended to allow developers to type in C
expressions/functions to be executed on the fly during system debugging.
The initialization parameter for the mutex was stored in global variables,
whose addresses were in symbol tables also included in the launch software,
and available to the C interpreter.
A C program was uploaded to the spacecraft, which when interpreted,
changed these variables from FALSE to TRUE.
No more system resets occurred.
Chenyang Lu
42
Bounded
Number
of
Blocking
Assumptions of analysis
q Fixed priority scheduling
q All semaphores are binary
q All critical sections are properly nested
Task Ti can be blocked by at most min(m,n) times
q m: number of distinct semaphores that can be used to block Ti
q n: number of lower-priority tasks that can block Ti
Chenyang Lu
43
Extended
RMS
UClizaCon
Bound
A set of periodic tasks can be scheduled by RMS/PIP if
i
Ck Bi 1/ i
i, 1 i n, + i ( 2 1)
k =1 Pk Pi
Tasks are ordered by priorities (T1 has the highest priority).
Bi: the maximum amount of time when task Ti can be blocked
by a lower-priority task.
Chenyang Lu
44
Extended
Response
Time
Analysis
Consider the effect of blocking on response time:
i 1 Ri
Ri = Ci + Bi + C j
j =1 Pj
The analysis becomes sufficient but not necessary.
Chenyang Lu
45
Priority
Ceiling
C(Sk): Priority ceiling of a semaphore Sk
q Highest priority among tasks requesting Sk.
A critical section guarded by Sk may block task Ti only if C(Sk)
is higher than prio(Ti)
Chenyang Lu
46
Compute
Bi
Assumption:
no
nested
critical
sections.
/*
potential
blocking
by
other
tasks
*/
B1=0;
B2=0;
for
each
Tj
with
priority
lower
than
Ti
{
b1
=
longest
critical
section
in
Tj
that
can
block
Ti
B1
=
B1
+
b1
}
/*
potential
blocking
by
semaphores
*/
for
each
semaphore
Sk
that
can
block
Ti
{
b2
=
longest
critical
section
guarded
by
Sk
among
lower
priority
tasks
B2
=
B2
+
b2
}
return
min(B1,
B2)
Chenyang Lu
47
Priority
Ceiling
Protocol
Priority ceiling of the processor: The highest priority ceiling
of all semaphores currently held.
A task can acquire a resource only if
q the resource is free, AND
q it has a higher priority than the priority ceiling of the system.
A task is blocked by at most one critical section.
Higher run-time overhead than PIP.
Chenyang Lu
48
AssumpCons
Single processor.
All tasks are periodic.
Zero context switch time.
Relative deadline = period.
No priority inversion.
Chenyang Lu
49
Hybrid
Task
Set
Periodic tasks + aperiodic tasks
Problem: arrival times of aperiodic tasks are unknown
Sporadic task with a hard deadline
q Inter-arrival time must be lower bounded
q Schedulability analysis: treated as a periodic task with period =
minimum inter-arrival time can be very pessimistic.
Aperiodic task with a soft deadline
q Possibly unbounded inter-arrival time
q Maintainhard guarantees on periodic tasks
q Reduce response time of aperiodic tasks
Chenyang Lu
50
Background
Scheduling
Handle aperiodic requests with the lowest-priority task
Advantages
q Simple
q Aperiodic tasks usually has no impact on periodic tasks.
Disadvantage
q Aperiodic tasks have very long response times when the utilization of
periodic tasks is high.
Acceptable only if
q System is not busy
q Aperiodic tasks can tolerate long delays
Chenyang Lu
51
Polling
Server
A periodic task (server) serves aperiodic requests.
q Period: Ps
q Capacity: Cs
Released periodically at period Ps
Serves any pending aperiodic requests
Suspends itself until the end of the period if
q it has used up its capacity, or
q no aperiodic request is pending
Capacity is replenished to Cs at the beginning of the next period
Chenyang Lu
52
Example:
Polling
Server
Chenyang Lu
53
Schedulability
Polling server has the same impact on periodic tasks as a
periodic task.
q n tasks with m servers: Up + Us Ub(n+m)
Disadvantage: If an aperiodic request misses the server, it
has to wait till the next period. long response time.
Can have multiple servers (with different periods) for different
classes of aperiodic requests
Chenyang Lu
54
Deferrable
Server
(DS)
Preserve unused capacity till the end of the current period
shorter response to aperiodic requests.
Impact on periodic tasks differs from a periodic task.
Chenyang Lu
55
Example:
Deferrable
Server
Chenyang Lu
56
RM
UClizaCon
Bound
with
DS
Under RMS
U s + 2
U b = U s + ln
2U s + 1
As n :
U + 2 1/ n
U b = U s + n s 1
2U s + 1
When Us = 0.186, min Ub = 0.652
U s + 2
System is schedulable if
U p ln
2U s + 1
Chenyang Lu
57
DS:
Middleware
ImplementaCon
First DS implementation on top of priority-based OS (e.g., Linux, POSIX)
Server thread processes aperiodic events (2nd highest priority)
Budget manager thread (highest priority) manages the budget and controls the
execution of server thread
Replenish Timer
High Priority
Budget
Manager
Thread
ACE Timer Queue
Aperiodic Events Budget Exhausted Timer
Server
Thread
Kokyu Dispatching Queue
Periodic Events
Dispatching
Thread
Kokyu Dispatching Queue
Periodic Events
Dispatching
Thread
Low Priority Kokyu Dispatching Queue Y. Zhang, C. Lu, C. Gill, P. Lardieri, G. Thaker, Middleware Support
for Aperiodic Tasks in Distributed Real-Time Systems, RTAS'07.
Chenyang Lu
58
AssumpCons
Single processor.
All tasks are periodic.
Zero context switch time.
Relative deadline = period.
No priority inversion.
Chenyang Lu
59
Context
Switch
Time
RTOS usually has low context switch overhead.
Context switches can still cause overruns in a tight schedule.
q Leave margin in your schedule.
Techniques exist to reduce number of context switches by
avoiding certain preemptions.
Other forms of overhead: cache, thread migration, interrupt
handling, bus contention, thread synchronization
Chenyang Lu
60
Fix
an
Unschedulable
System
Reduce task execution times.
Reduce blocking factors.
Get a faster processor.
Replace software components with hardware.
Multi-processor and distributed systems.
Chenyang Lu
61
Final
1-2:30 April 21st
Open book/note
Scope: Operating Systems, Real-Time Scheduling
62
Final
Demo
April 23rd, 1pm-2:30pm
20 min per team
Set up and test your demo in advance
All expected to attend the whole session
Return devices to Rahav
Itll be fun! J
63
Project
Report
Submit report and materials by 11:59pm April 30th.
Email to Rahav
Report
q Organization: See conference papers in the reading list.
q 6 pages, double column, 10 pts fonts.
q Use templates on the class web page.
Other materials
q Slides of your final presentation
q Source code
q Documents: README, INSTALL, HOW-to-RUN
q Video (Youtube is welcome!)
64
Suggested
Report
Outline
Abstract
Introduction
Goals
Design: Hardware and Software
Implementation
Experiments
Related Work
Lessons Learned
Conclusion and Future Work
65
Peer
Review
For fairness in project evaluation.
Email me individually by 11:59pm, April 30th
q Estimated percentage of contribution from each team member.
q Brief justification.
66