Phoenix GM 5621
Phoenix GM 5621
gm5621/gm5626/gm2621/gm2626
Dual Input LCD Controller for Entry Level Applications
A P P L I C AT I O N DESCRIPTION
Mainstream analog and dual- Genesis gm5621 and gm5626 are all-in-one dual input LCD monitor controllers
input XGA/SXGA LCD monitors supporting resolutions up to SXGA, available in a very low pin count package.
gm5621/5626 leverage Genesis patented advanced image-processing technology,
as well as a proven integrated ADC/PLL and an Ultra-Reliable DVI® compliant
F E AT U R E S digital receiver to deliver a high-quality solution for mainstream analog and dual
Zoom (from VGA) and shrink input monitors. gm5621/5626 offer new Instant Auto™ technology, which provides
(from UXGA) scaling fast and accurate image alignment for both static and moving images of the analog
Triple-channel (8-bit) ADC and input signal. gm5621 includes an on-chip, industry standard, dual channel LVDS
PLL transmitter and a TCON, and gm5626 includes a dual channel RSDS transmitter
for direct interfacing of commercially available LVDS/RSDS LCD panel modules. In
Ultra-Reliable DVI® receiver addition, gm5621/5626 include an integrated X86 OCM with SPI compatible
(165MHz) – DVI 1.0-compliant
interface, a multicolor proportional font OSD engine, a programmable coefficient
Dual channel RSDS transmitter scaling engine, dual channel Schmitt and Reset circuitry. Along with the high
and TCON (gm5626/2626 only) quality and reliability, gm5621/5626 also provide a very low cost system design by
Dual channel LVDS transmitter reducing the number of components and the reduction in the board size.
Intel X86 compatible
microcontroller with external SPI
gm2621/gm2626 are pin-compatible analog derivative products with integrated
ROM interface ADC/PLL, but no DVI receiver.
Versatile OSD engine meets PC gm5621 S Y S T E M D E S I G N : C O N V E N T I O N AL I N T E R F AC E
OEM specs
Serial Flash/
All system clocks synthesized NVRAM
Crystal
from a single external crystal
Digital color controls and sRGB Analog
TCON with LVDS
compliant Input
10-bit Panel gamma correction
Receiver
SUPPLY LCD
Panel
3.3V IO and 1.8V CORE Keypad & LED
128-pin PQFP
Schmitt
VGA SPI
MCU PLL
Controller
3x ADC
DDC2Bi
LVDS
RSDS Tx
LVDS or
Capture
HDCP
Scaling
Image
CLUT
OSD
or
MUX
DVI RSDS
DVI Rx
Panel
DDC2Bi
Keypad
F E AT U R E D E S C R I P T I O N S
A N A L O G R GB I N P U T O N - C H I P OSD C O N T R O L L E R
Supports up to SXGA 75Hz / UXGA 60Hz On-chip RAM for high-quality programmable menus
Composite-sync and Sync-on-Green (SOG) support 1, 2 and 4-bit per pixel character cells
Input format detection and auto-alignment Horizontal and vertical stretch of OSD menus
Phase clock and image positioning Blinking, transparency and blending
INST ANT AUTO™ IM AGE ADJUSTMENT Supports two independent OSD menu rectangles
Proportional fonts
Faster and more accurate than current conventional
methods L VD S T R A N S M I T T E R S
Auto-adjusts full width and partial width images Double pixel up to SXGA 75Hz output
Auto-adjusts DOS screens and moving images, such as Support for 8 or 6-bit panels (with high-quality dithering)
screen savers and motion pictures
Pin swap, odd / even swap and red / blue group swap of
U L T R A - R E L I A B L E D V I® I N P U T ( gm5 621 /562 6) RGB outputs for flexibility in board layout
Operating speed 165 MHz (up to UXGA 60Hz) Programmable signal amplitude
Direct connect to all DVI-compliant digital transmitters R SD S T R A N S M I T T E R S AND TC ON ( gm56 26 /26 26)
High-bandwidth Digital Content Protection (HDCP) Dual channel 6-bit RSDS compliant serial interface with
INTELLIGENT IM AGE PROCESSING™ direct connect to RSDS compliant column drivers
Programmable coefficients for user sharpness control Support for type 1, type 2 and type 3 bus configuration
Real Recovery™ function provides full color recovery image Pin swap, odd / even swap and red / blue group swap of
for refresh rates higher than those supported by the LCD RGB outputs for flexibility in board layout
panel Low EMI and power save feature include frame, line and in-
line inversion and blanking
ON-CHIP MICROCONTROLLER
HIGHLY INTEGR ATED SYSTEM-ON-A- CHIP
High-performance X86 MCU with on-chip RAM and ROM
Unified memory architecture simplifies chip programming 50mW power saving mode
UART link for ISP and factory setting purpose Two Layer PCB support
Two DDC2Bi with DMA buffer to internal RAM On-chip reset circuit to eliminate external reset IC
Slow clock mode for 50mW sleep mode power consumption Integrated Schmitt trigger for HSYNC and VSYNC
JTAG support for firmware debugging General purpose low bandwidth ADC