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Phoenix GM 5621

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0% found this document useful (0 votes)
207 views2 pages

Phoenix GM 5621

.....

Uploaded by

Triey Ecs
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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PRELIMINARY PRODUCT BRIEF

gm5621/gm5626/gm2621/gm2626
Dual Input LCD Controller for Entry Level Applications
A P P L I C AT I O N DESCRIPTION
ƒ Mainstream analog and dual- Genesis gm5621 and gm5626 are all-in-one dual input LCD monitor controllers
input XGA/SXGA LCD monitors supporting resolutions up to SXGA, available in a very low pin count package.
gm5621/5626 leverage Genesis patented advanced image-processing technology,
as well as a proven integrated ADC/PLL and an Ultra-Reliable DVI® compliant
F E AT U R E S digital receiver to deliver a high-quality solution for mainstream analog and dual
ƒ Zoom (from VGA) and shrink input monitors. gm5621/5626 offer new Instant Auto™ technology, which provides
(from UXGA) scaling fast and accurate image alignment for both static and moving images of the analog
ƒ Triple-channel (8-bit) ADC and input signal. gm5621 includes an on-chip, industry standard, dual channel LVDS
PLL transmitter and a TCON, and gm5626 includes a dual channel RSDS transmitter
for direct interfacing of commercially available LVDS/RSDS LCD panel modules. In
ƒ Ultra-Reliable DVI® receiver addition, gm5621/5626 include an integrated X86 OCM with SPI compatible
(165MHz) – DVI 1.0-compliant
interface, a multicolor proportional font OSD engine, a programmable coefficient
ƒ Dual channel RSDS transmitter scaling engine, dual channel Schmitt and Reset circuitry. Along with the high
and TCON (gm5626/2626 only) quality and reliability, gm5621/5626 also provide a very low cost system design by
ƒ Dual channel LVDS transmitter reducing the number of components and the reduction in the board size.
ƒ Intel X86 compatible
microcontroller with external SPI
gm2621/gm2626 are pin-compatible analog derivative products with integrated
ROM interface ADC/PLL, but no DVI receiver.
ƒ Versatile OSD engine meets PC gm5621 S Y S T E M D E S I G N : C O N V E N T I O N AL I N T E R F AC E
OEM specs
Serial Flash/
ƒ All system clocks synthesized NVRAM
Crystal
from a single external crystal
ƒ Digital color controls and sRGB Analog
TCON with LVDS

compliant Input
ƒ 10-bit Panel gamma correction
Receiver

gm5621 LVDS Column Drivers


and high quality dithering for 8- Digital
gm5621
bit and 6-bit panel interface Input
Row Drivers

ƒ DDC controller for host interface LCD


purposes Panel
Keypad & LED
ƒ Low bandwidth ADC for keypad
interface and cable detection
ƒ Two PWM signals for backlight
and volume control
gm5626 S Y S T E M D E S I G N : O N -P AN E L I N T E R F AC E
ƒ Internal test pattern generator for
factory test purposes Serial Flash/
Crystal
ƒ Energy Spectrum Management® NVRAM
(ESM®)
ƒ Instant Auto™ Image Analog
Input
Adjustment RSDS
gm5626 Column Drivers
Digital gm5626
Input
P AC K AG E & P O W E R
Row Drivers

SUPPLY LCD
Panel
ƒ 3.3V IO and 1.8V CORE Keypad & LED
ƒ 128-pin PQFP

October 2005 www.gnss.com C5621-PBR-01D


© 2004-2005 Genesis Microchip Inc.
GENESIS MICROCHIP INC. g m5 621 / 56 26 /2 621 / 26 26 PR EL IM IN AR Y PROD U C T BR I EF

gm5621/5626 F U N C T I O N AL B L O C K D I AG R AM – LVDS O R RSDS T R AN S M I T T E R


Serial Flash/
CSYNC/ NVRAM Crystal
SOG

Schmitt
VGA SPI
MCU PLL
Controller
3x ADC

DDC2Bi

LVDS

RSDS Tx
LVDS or
Capture
HDCP

Scaling
Image

CLUT

OSD
or

MUX
DVI RSDS
DVI Rx
Panel
DDC2Bi

Test LBADC Reset Circuit ESM


Pattern
Generator

Keypad

F E AT U R E D E S C R I P T I O N S
A N A L O G R GB I N P U T O N - C H I P OSD C O N T R O L L E R
ƒ Supports up to SXGA 75Hz / UXGA 60Hz ƒ On-chip RAM for high-quality programmable menus
ƒ Composite-sync and Sync-on-Green (SOG) support ƒ 1, 2 and 4-bit per pixel character cells
ƒ Input format detection and auto-alignment ƒ Horizontal and vertical stretch of OSD menus
ƒ Phase clock and image positioning ƒ Blinking, transparency and blending

INST ANT AUTO™ IM AGE ADJUSTMENT ƒ Supports two independent OSD menu rectangles
ƒ Proportional fonts
ƒ Faster and more accurate than current conventional
methods L VD S T R A N S M I T T E R S
ƒ Auto-adjusts full width and partial width images ƒ Double pixel up to SXGA 75Hz output
ƒ Auto-adjusts DOS screens and moving images, such as ƒ Support for 8 or 6-bit panels (with high-quality dithering)
screen savers and motion pictures
ƒ Pin swap, odd / even swap and red / blue group swap of
U L T R A - R E L I A B L E D V I® I N P U T ( gm5 621 /562 6) RGB outputs for flexibility in board layout
ƒ Operating speed 165 MHz (up to UXGA 60Hz) ƒ Programmable signal amplitude
ƒ Direct connect to all DVI-compliant digital transmitters R SD S T R A N S M I T T E R S AND TC ON ( gm56 26 /26 26)
ƒ High-bandwidth Digital Content Protection (HDCP) ƒ Dual channel 6-bit RSDS compliant serial interface with
INTELLIGENT IM AGE PROCESSING™ direct connect to RSDS compliant column drivers
ƒ Programmable coefficients for user sharpness control ƒ Support for type 1, type 2 and type 3 bus configuration
ƒ Real Recovery™ function provides full color recovery image ƒ Pin swap, odd / even swap and red / blue group swap of
for refresh rates higher than those supported by the LCD RGB outputs for flexibility in board layout
panel ƒ Low EMI and power save feature include frame, line and in-
line inversion and blanking
ON-CHIP MICROCONTROLLER
HIGHLY INTEGR ATED SYSTEM-ON-A- CHIP
ƒ High-performance X86 MCU with on-chip RAM and ROM
ƒ Unified memory architecture simplifies chip programming ƒ 50mW power saving mode

ƒ 5 general-purpose outputs (GPO) ƒ 5-Volt tolerant inputs

ƒ UART link for ISP and factory setting purpose ƒ Two Layer PCB support

ƒ Two DDC2Bi with DMA buffer to internal RAM ƒ On-chip reset circuit to eliminate external reset IC

ƒ Slow clock mode for 50mW sleep mode power consumption ƒ Integrated Schmitt trigger for HSYNC and VSYNC

ƒ JTAG support for firmware debugging ƒ General purpose low bandwidth ADC

October 2005 www.gnss.com C5621-PBR-01D


© 2004-2005 Genesis Microchip Inc.

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