LTC3588-1

Piezoelectric Energy
Harvesting Power Supply
FEATURES DESCRIPTION
n 950nA Input Quiescent Current (Output in The LTC®3588-1 integrates a low-loss full-wave bridge
Regulation – No Load) rectifier with a high efficiency buck converter to form a
n 450nA Input Quiescent Current in UVLO complete energy harvesting solution optimized for high
n 2.7V to 20V Input Operating Range output impedance energy sources such as piezoelectric
n Integrated Low-Loss Full-Wave Bridge Rectifier transducers. An ultralow quiescent current undervoltage
n Up to 100mA of Output Current lockout (UVLO) mode with a wide hysteresis window allows
n Selectable Output Voltages of 1.8V, 2.5V, 3.3V, 3.6V charge to accumulate on an input capacitor until the buck
n High Efficiency Integrated Hysteretic Buck DC/DC converter can efficiently transfer a portion of the stored
n Input Protective Shunt – Up to 25mA Pull-Down at charge to the output. In regulation, the LTC3588-1 enters
VIN ≥ 20V a sleep state in which both input and output quiescent
n Wide Input Undervoltage Lockout (UVLO) Range currents are minimal. The buck converter turns on and
n Available in 10-Lead MSE and 3mm × 3mm DFN off as needed to maintain regulation.
Packages
Four output voltages, 1.8V, 2.5V, 3.3V and 3.6V, are pin
selectable with up to 100mA of continuous output current;
APPLICATIONS however, the output capacitor may be sized to service a
n Piezoelectric Energy Harvesting higher output current burst. An input protective shunt set
n Electro-Mechanical Energy Harvesting at 20V enables greater energy storage for a given amount
n Wireless HVAC Sensors of input capacitance.
n Mobile Asset Tracking L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
n Tire Pressure Sensors owners.
n Battery Replacement for Industrial Sensors
n Remote Light Switches
n Standalone Nanopower Buck Regulator

TYPICAL APPLICATION
100mA Piezoelectric Energy Harvesting Power Supply LTC3588-1 3.3V Regulator Start-Up Profile
22
CSTORAGE = 22μF, COUT = 47μF
20 NO LOAD, IVIN = 2μA
18
ADVANCED CERAMETRICS PFC-W14
16
PZ1 PZ2 10μH 14 VIN
VOLTAGE (V)

VIN SW VOUT 12
1μF LTC3588-1
VOUT 47μF 10
6V 6V
CAP PGOOD 8
CSTORAGE 2
VIN2 D0, D1 OUTPUT
25V 6
VOLTAGE
4.7μF GND SELECT 4 VOUT
6V 35881 TA01
2 PGOOD = LOGIC 1
0
0 200 400 600
TIME (s)
35881 TA01b

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LTC3588-1
ABSOLUTE MAXIMUM RATINGS (Note 1)

VIN VOUT ....................–0.3V to Lesser of (VIN2 + 0.3V) or 6V

Low Impedance Source ....................... –0.3V to 18V* PGOOD...............–0.3V to Lesser of (VOUT + 0.3V) or 6V
Current Fed, ISW = 0A ...................................... 25mA† IPZ1, IPZ2 ..............................................................±50mA
PZ1, PZ2 ...........................................................0V to VIN ISW .......................................................................350mA
D0, D1.............. –0.3V to [Lesser of (VIN2 + 0.3V) or 6V] Operating Junction Temperature Range
CAP ......................[Higher of –0.3V or (VIN – 6V)] to VIN (Notes 2, 3) ................................................–40 to 125°C
VIN2 ....................–0.3V to [Lesser of (VIN + 0.3V) or 6V] Storage Temperature Range.......................–65 to 125°C
* VIN has an internal 20V clamp Lead Temperature (Soldering, 10 sec)
† For t < 1ms and Duty Cycle < 1%, MSE Only .......................................................... 300°C
Absolute Maximum Continuous Current = 5mA

PIN CONFIGURATION
TOP VIEW

TOP VIEW
PZ1 1 10 PGOOD
PZ1 1 10 PGOOD
PZ2 2 9 D0 PZ2 2 9 D0
11 11
CAP 3 GND 8 D1 CAP 3 8 D1
GND
VIN 4 7 VIN2
VIN 4 7 VIN2
SW 5 6 VOUT
SW 5 6 VOUT
MSE PACKAGE
10-LEAD PLASTIC MSOP
DD PACKAGE
10-LEAD (3mm s 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 45°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
TJMAX = 125°C, θJA = 43°C/W, θJC = 7.5°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB

ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3588EDD-1#PBF LTC3588EDD-1#TRPBF LFKY 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
LTC3588IDD-1#PBF LTC3588IDD-1#TRPBF LFKY 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3588EMSE-1#PBF LTC3588EMSE-1#TRPBF LTFKX 10-Lead Plastic MSOP –40°C to 85°C
LTC3588IMSE-1#PBF LTC3588IMSE-1#TRPBF LTFKX 10-Lead Plastic MSOP –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/

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 LTC3588-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TJ = 25°C. VIN = 5.5V unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Input Voltage Range Low Impedance Source on VIN l 18.0 V
IVIN VIN Quiescent Current
UVLO VIN = 2.5V, Not PGOOD 450 700 nA
Buck Enabled, Sleeping VIN = 4.5V 950 1500 nA
Buck Enabled, Sleeping VIN = 18V 1.7 2.5 μA
Buck Enabled, Not Sleeping ISW = 0A (Note 4) 150 250 μA
VUVLO VIN Undervoltage Lockout Threshold VIN Rising
1.8V Output Selected; D1 = 0, D0 = 0 l 3.77 4.04 4.30 V
2.5V Output Selected; D1 = 0, D0 = 1 l 3.77 4.04 4.30 V
3.3V Output Selected; D1 = 1, D0 = 0 l 4.73 5.05 5.37 V
3.6V Output Selected; D1 = 1, D0 = 1 l 4.73 5.05 5.37 V
VIN Falling
1.8V Output Selected; D1 = 0, D0 = 0 l 2.66 2.87 3.08 V
2.5V Output Selected; D1 = 0, D0 = 1 l 2.66 2.87 3.08 V
3.3V Output Selected; D1 = 1, D0 = 0 l 3.42 3.67 3.91 V
3.6V Output Selected; D1 = 1, D0 = 1 l 3.75 4.02 4.28 V
VSHUNT VIN Shunt Regulator Voltage IVIN = 1mA 19.0 20.0 21.0 V
ISHUNT Maximum Protective Shunt Current 1ms Duration 25 mA
Internal Bridge Rectifier Loss IBRIDGE = 10μA 350 400 450 mV
(|VPZ1 – VPZ2| – VIN)
Internal Bridge Rectifier Reverse VREVERSE = 18V 20 nA
Leakage Current
Internal Bridge Rectifier Reverse IREVERSE = 1μA VSHUNT 30 V
Breakdown Voltage
VOUT Regulated Output Voltage 1.8V Output Selected
Sleep Threshold l 1.812 1.890 V
Wake-Up Threshold l 1.710 1.788 V
2.5V Output Selected
Sleep Threshold l 2.512 2.575 V
Wake-Up Threshold l 2.425 2.488 V
3.3V Output Selected
Sleep Threshold l 3.312 3.399 V
Wake-Up Threshold l 3.201 3.288 V
3.6V Output Selected
Sleep Threshold l 3.612 3.708 V
Wake-Up Threshold l 3.492 3.588 V
PGOOD Falling Threshold As a Percentage of the Selected VOUT 83 92 %
IVOUT Output Quiescent Current VOUT = 3.6V 89 150 nA
IPEAK Buck Peak Switch Current 200 260 350 mA
ILOAD Available Buck Output Current 100 mA
RP Buck PMOS Switch On-Resistance 1.1 Ω
RN Buck NMOS Switch On-Resistance 1.3 Ω
Max Buck Duty Cycle l 100 %
VIH(D0, D1) D0/D1 Input High Voltage l 1.2 V
VIL(D0, D1) D0/D1 Input Low Voltage l 0.4 V
IIH(D0, D1) D0/D1 Input High Current 10 nA
IIL(D0, D1) D0/D1 Input Low Current 10 nA

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LTC3588-1
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note that the maximum ambient temperature is determined by specific
may cause permanent damage to the device. Exposure to any Absolute operating conditions in conjunction with board layout, the rated package
Maximum Rating condition for extended periods may affect device thermal resistance and other environmental factors.
reliability and lifetime. Note 3: TJ is calculated from the ambient TA and power dissipation PD
Note 2: The LTC3588E-1 is guaranteed to meet performance specifications according to the following formula: TJ = TA + (PD • θJA).
from 0°C to 85°C. Specifications over the –40°C to 85°C operating Note 4: Dynamic supply current is higher due to gate charge being
junction temperature range are assured by design, characterization, and
correlation with statistical process controls. The LTC3588I-1 is guaranteed
over the full –40°C to 125°C operating junction temperature range.

TYPICAL PERFORMANCE CHARACTERISTICS

IVIN in UVLO vs VIN IVIN in Sleep vs VIN UVLO Rising vs Temperature
1000 2400 5.2
D1 = D0 = 1 D1 = D0 = 0
2200 D1 = D0 = 1
900
85°C 5.0
800 2000
85°C
700 1800 4.8
25°C

UVLO RISING (V)

600 1600
IVIN (nA)
IVIN (nA)

25°C 4.6
500 –40°C 1400
1200 4.4
400
–40°C
300 1000 4.2
200 800 D1 = D0 = 0
4.0
100 600
0 400 3.8
0 1 2 3 4 5 6 2 4 6 8 10 12 14 16 18 –55 –35 –15 5 25 45 65 85 105 125
VIN (V) VIN (V) TEMPERATURE (°C)
35881 G01 35881 G02 35881 G03

Total Bridge Rectifier Drop

UVLO Falling vs Temperature VSHUNT vs Temperature vs Bridge Current
4.2 21.0 1800
|VPZ1 – VPZ2| – VIN
D1 = D0 = 1
20.8 1600
4.0
20.6 1400
3.8 –40°C
20.4
UVLO FALLING (V)

D1 = 1, D0 = 0 1200
VBRIDGE (mV)
VSHUNT (V)

20.2 ISHUNT = 25mA

3.6 1000 85°C
20.0
ISHUNT = 1mA 800
3.4
19.8 25°C
600
3.2 19.6
19.4 400
3.0
D1 = D0 = 0 19.2 200

2.8 19.0 0
–55 –35 –15 5 25 45 65 85 105 125 –55 –35 –15 5 25 45 65 85 105 125 1μ 10μ 100μ 1m 10m
TEMPERATURE (°C) TEMPERATURE (°C) BRIDGE CURRENT (A)
35881 G04 35881 G05 35881 G06

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 LTC3588-1
TYPICAL PERFORMANCE CHARACTERISTICS

Bridge Leakage vs Temperature Bridge Frequency Response 1.8V Output vs Temperature

20 2.0 1.85
VIN = 18V, LEAKAGE AT PZ1 OR PZ2 4VP-P APPLIED TO PZ1/PZ2 INPUT
18 1.8 MEASURED IN UVLO SLEEP THRESHOLD

16 1.6 1.80
WAKE-UP THRESHOLD
BRIDGE LEAKAGE (nA)

14 1.4
12 1.2 1.75

VOUT (V)
VIN (V)
10 1.0
8 0.8 1.70
6 0.6
PGOOD FALLING
4 0.4 1.65
2 0.2
0 0 1.60
–55 –10 35 80 125 170 10 100 1k 10k 100k 1M 10M 100M –55 –35 –15 5 25 45 65 85 105 125
TEMPERATURE (°C) FREQUENCY (Hz) TEMPERATURE (°C)
35881 G07 35881 G08 35881 G09

2.5V Output vs Temperature 3.3V Output vs Temperature 3.6V Output vs Temperature

2.55 3.35 3.65
SLEEP THRESHOLD SLEEP THRESHOLD SLEEP THRESHOLD
3.30 3.60
2.50
WAKE-UP THRESHOLD WAKE-UP THRESHOLD
WAKE-UP THRESHOLD 3.55
3.25
2.45
3.50
VOUT (V)

3.20 VOUT (V)

VOUT (V)

2.40 3.45
3.15
3.40
2.35
3.10
3.35
PGOOD FALLING PGOOD FALLING
2.30 3.05 PGOOD FALLING 3.30

2.25 3.00 3.25

–55 –35 –15 5 25 45 65 85 105 125 –55 –35 –15 5 25 45 65 85 105 125 –55 –35 –15 5 25 45 65 85 105 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
35881 G10 35881 G11 35881 G12

VOUT Load Regulation VOUT Line Regulation IVOUT vs Temperature

2.56 2.56 120
VIN = 5V, L = 10μH, D1 = 0, D0 = 1 L = 10μH, ILOAD = 100mA, D1 = 0, D0 = 1
110 VOUT = 3.6V
2.54 2.54
100
90
2.52 2.52 VOUT = 3.3V
80
IVOUT (nA)
VOUT (V)
VOUT (V)

2.50 2.50 70
VOUT = 2.5V
60
2.48 2.48
50
VOUT = 1.8V
40
2.46 2.46
30
2.44 2.44 20
1μ 10μ 100μ 1m 10m 100m 4 6 8 10 12 14 16 18 –55 –35 –15 5 25 45 65 85 105 125
LOAD CURRENT (A) VIN (V) TEMPERATURE (°C)
35881 G13 35881 G14 35881 G15

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LTC3588-1
TYPICAL PERFORMANCE CHARACTERISTICS
RDS(ON) of PMOS/NMOS
IPEAK vs Temperature vs Temperature Operating Waveforms
300 2.0
OUTPUT
290
VOLTAGE
1.8
280 50mV/DIV
NMOS AC-COUPLED
270
1.6
SWITCH

RDS(ON) (Ω)
260
IPEAK (mA)

VOLTAGE
250 1.4 2V/DIV
PMOS
240 0V
1.2
230 INDUCTOR
CURRENT
220 200mA/DIV
1.0
210 0mA

200 0.8
–55 –35 –15 5 25 45 65 85 105 125 –55 –35 –15 5 25 45 65 85 105 125 5μs/DIV 35881 G18

TEMPERATURE (°C) TEMPERATURE (°C) VIN = 5V, VOUT = 3.3V

35881 G16 35881 G17 ILOAD = 1mA
L = 10μH, COUT = 47μF

Efficiency vs VIN for Efficiency vs VIN for

Efficiency vs ILOAD, L = 10μH ILOAD = 100mA, L = 10μH VOUT = 3.3V, L = 10μH
100 100 95
VIN = 5V
90
90 85
80
70
80 75
EFFICIENCY (%)
EFFICIENCY (%)
EFFICIENCY (%)

60
50 70 65
40
60 55
30 ILOAD = 100mA
VOUT = 3.6V VOUT = 3.6V ILOAD = 1mA
20 VOUT = 3.3V VOUT = 3.3V ILOAD = 100μA
50 45
10 VOUT = 2.5V VOUT = 2.5V ILOAD = 50μA
VOUT = 1.8V VOUT = 1.8V ILOAD = 10μA
0 40 35
1μ 10μ 100μ 1m 10m 100m 2 4 6 8 10 12 14 16 18 4 6 8 10 12 14 16 18
LOAD CURRENT (A) VIN (V) VIN (V)
35881 G19 35881 G20 35881 G21

Efficiency vs VIN for Efficiency vs VIN for

Efficiency vs ILOAD, L = 100μH ILOAD = 100mA, L = 100μH VOUT = 3.3V, L = 100μH
100 100 95
VIN = 5V
90
90 85
80
70
80 75
EFFICIENCY (%)
EFFICIENCY (%)

EFFICIENCY (%)

60
50 70 65
40
60 55
30 ILOAD = 100mA
VOUT = 3.6V VOUT = 3.6V ILOAD = 100μA
20 VOUT = 3.3V VOUT = 3.3V ILOAD = 50μA
50 45
10 VOUT = 2.5V VOUT = 2.5V ILOAD = 30μA
VOUT = 1.8V VOUT = 1.8V ILOAD = 10μA
0 40 35
1μ 10μ 100μ 1m 10m 100m 2 4 6 8 10 12 14 16 18 4 6 8 10 12 14 16 18
LOAD CURRENT (A) VIN (V) VIN (V)
35881 G22 35881 G23 35881 G24

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 LTC3588-1
PIN FUNCTIONS
PZ1 (Pin 1): Input connection for piezoelectric element or VIN2 (Pin 7): Internal low voltage rail to serve as gate drive
other AC source (used in conjunction with PZ2). for buck NMOS switch. Also serves as a logic high rail for
output voltage select bits D0 and D1. A 4.7μF capacitor
PZ2 (Pin 2): Input connection for piezoelectric element or
should be connected from VIN2 to GND. This pin is not
other AC source (used in conjunction with PZ1).
intended for use as an external system rail.
CAP (Pin 3): Internal rail referenced to VIN to serve as gate
drive for buck PMOS switch. A 1μF capacitor should be D1 (Pin 8): Output Voltage Select Bit. D1 should be tied
connected between CAP and VIN. This pin is not intended high to VIN2 or low to GND to select desired VOUT (see
Table 1).
for use as an external system rail.
D0 (Pin 9): Output Voltage Select Bit. D0 should be tied
VIN (Pin 4): Rectified Input Voltage. A capacitor on this
pin serves as an energy reservoir and input supply for the high to VIN2 or low to GND to select desired VOUT (see
Table 1).
buck regulator. The VIN voltage is internally clamped to a
maximum of 20V (typical). PGOOD (Pin 10): Power good output is logic high when
SW (Pin 5): Switch Pin for the Buck Switching Regulator. VOUT is above 92% of the target value. The logic high is
referenced to the VOUT rail.
A 10μH or larger inductor should be connected from SW
to VOUT. GND (Exposed Pad Pin 11): Ground. The Exposed Pad
VOUT (Pin 6): Sense pin used to monitor the output volt- should be connected to a continuous ground plane on the
age and adjust it through internal feedback. second layer of the printed circuit board by several vias
directly under the LTC3588-1.

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LTC3588-1
BLOCK DIAGRAM
VIN 4

20V INTERNAL RAIL

GENERATION

3 CAP
PZ1 1

5 SW

7 VIN2
PZ2 2

BUCK
UVLO
CONTROL

11 GND

SLEEP
BANDGAP
REFERENCE VOUT
6
8, 9
2
D1, D0
PGOOD
COMPARATOR 10 PGOOD

35881 BD

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 LTC3588-1
OPERATION
The LTC3588-1 is an ultralow quiescent current power Internal Rail Generation
supply designed specifically for energy harvesting and/or
Two internal rails, CAP and VIN2, are generated from VIN and
low current step-down applications. The part is designed to are used to drive the high side PMOS and low side NMOS
interface directly to a piezoelectric or alternative A/C power of the buck converter, respectively. Additionally the VIN2
source, rectify a voltage waveform and store harvested rail serves as logic high for output voltage select bits D0
energy on an external capacitor, bleed off any excess power and D1. The VIN2 rail is regulated at 4.8V above GND while
via an internal shunt regulator, and maintain a regulated the CAP rail is regulated at 4.8V below VIN. These are not
output voltage by means of a nanopower high efficiency intended to be used as external rails. Bypass capacitors
synchronous buck regulator. are connected to the CAP and VIN2 pins to serve as energy
reservoirs for driving the buck switches. When VIN is below
Internal Bridge Rectifier
4.8V, VIN2 is equal to VIN and CAP is held at GND. Figure 1
The LTC3588-1 has an internal full-wave bridge rectifier shows the ideal VIN, VIN2 and CAP relationship.
accessible via the differential PZ1 and PZ2 inputs that
18
rectifies AC inputs such as those from a piezoelectric
16
element. The rectified output is stored on a capacitor at
the VIN pin and can be used as an energy reservoir for the 14
VIN
buck converter. The low-loss bridge rectifier has a total 12

VOLTAGE (V)
drop of about 400mV with typical piezo generated currents 10

(~10μA). The bridge is capable of carrying up to 50mA. 8

One side of the bridge can be operated as a single-ended 6 VIN2

DC input. PZ1 and PZ2 should never be shorted together 4
when the bridge is in use. 2 CAP

0
0 5 10 15
Undervoltage Lockout (UVLO) VIN (V)
35881 F01

When the voltage on VIN rises above the UVLO rising

threshold the buck converter is enabled and charge is Figure 1. Ideal VIN, VIN2 and CAP Relationship
transferred from the input capacitor to the output capaci-
tor. A wide (~1V) UVLO hysteresis window is employed Buck Operation
with a lower threshold approximately 300mV above the The buck regulator uses a hysteretic voltage algorithm
selected regulated output voltage to prevent short cycling to control the output through internal feedback from the
during buck power-up. When the input capacitor voltage VOUT sense pin. The buck converter charges an output
is depleted below the UVLO falling threshold the buck capacitor through an inductor to a value slightly higher
converter is disabled. Extremely low quiescent current than the regulation point. It does this by ramping the
(450nA typical) in UVLO allows energy to accumulate on inductor current up to 260mA through an internal PMOS
the input capacitor in situations where energy must be switch and then ramping it down to 0mA through an in-
harvested from low power sources. ternal NMOS switch. This efficiently delivers energy to the
output capacitor. The ramp rate is determined by VIN, VOUT,
and the inductor value. If the input voltage falls below the

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LTC3588-1
OPERATION
UVLO falling threshold before the output voltage reaches Table 1. Output Voltage Selection
regulation, the buck converter will shut off and will not D1 D0 VOUT VOUT QUIESCENT CURRENT (IVOUT)
be turned on until the input voltage again rises above the 0 0 1.8V 44nA
UVLO rising threshold. During this time the output voltage 0 1 2.5V 62nA
will be loaded by less than 100nA. When the buck brings 1 0 3.3V 81nA
the output voltage into regulation the converter enters a 1 1 3.6V 89nA
low quiescent current sleep state that monitors the output
The internal feedback network draws a small amount of
voltage with a sleep comparator. During this operating mode
current from VOUT as listed in Table 1.
load current is provided by the buck output capacitor. When
the output voltage falls below the regulation point the buck Power Good Comparator
regulator wakes up and the cycle repeats. This hysteretic
method of providing a regulated output reduces losses A power good comparator produces a logic high referenced
associated with FET switching and maintains an output to VOUT on the PGOOD pin the first time the converter
at light loads. The buck delivers a minimum of 100mA of reaches the sleep threshold of the programmed VOUT,
average load current when it is switching. signaling that the output is in regulation. The PGOOD pin
will remain high until VOUT falls to 92% of the desired
When the sleep comparator signals that the output has regulation voltage. Several sleep cycles may occur during
reached the sleep threshold the buck converter may be this time. Additionally, if PGOOD is high and VIN falls below
in the middle of a cycle with current still flowing through the UVLO falling threshold, PGOOD will remain high until
the inductor. Normally both synchronous switches would VOUT falls to 92% of the desired regulation point. This
turn off and the current in the inductor would freewheel allows output energy to be used even if the input is lost.
to zero through the NMOS body diode. The LTC3588-1 Figure 2 shows the behavior for VOUT = 3.6V and no load.
keeps the NMOS switch on during this time to prevent the At t = 75s VIN becomes high impedance and is discharged
conduction loss that would occur in the diode if the NMOS by the quiescent current of the LTC3588-1 and through
were off. If the PMOS is on when the sleep comparator servicing VOUT which is discharged by its own leakage
trips the NMOS will turn on immediately in order to ramp current. VIN crosses UVLO falling but PGOOD remains high
down the current. If the NMOS is on it will be kept on until until VOUT decreases to 92% of the desired regulation point.
the current reaches zero. The PGOOD pin is designed to drive a microprocessor or
Though the quiescent current when the buck is switching other chip I/O and is not intended to drive higher current
is much greater than the sleep quiescent current, it is still loads such as an LED.
a small percentage of the average inductor current which
results in high efficiency over most load conditions. The 6
CVIN = CVOUT = 100μF
buck operates only when sufficient energy has been ac-
5
cumulated in the input capacitor and the length of time the VIN

converter needs to transfer energy to the output is much 4 VIN = UVLO FALLING
VOLTAGE (V)

less than the time it takes to accumulate energy. Thus, the VOUT
buck operating quiescent current is averaged over a long 3

period of time so that the total average quiescent current 2

is low. This feature accommodates sources that harvest PGOOD
small amounts of ambient energy. 1

Four selectable voltages are available by tying the output 0

0 100 200 300
select bits, D0 and D1, to GND or VIN2. Table 1 shows TIME (s)
the four D0/D1 codes and their corresponding output 35881 F02

voltages. Figure 2. PGOOD Operation During Transition to UVLO

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 LTC3588-1
OPERATION
The D0/D1 inputs can be switched while in regulation as Energy Storage
shown in Figure 3. If VOUT is programmed to a voltage with
Harvested energy can be stored on the input capacitor
a PGOOD falling threshold above the old VOUT, PGOOD will
or the output capacitor. The wide input range takes ad-
transition low until the new regulation point is reached.
vantage of the fact that energy storage on a capacitor is
When VOUT is programmed to a lower voltage, PGOOD
proportional to the square of the capacitor voltage. After
will remain high through the transition.
the output voltage is brought into regulation any excess
energy is stored on the input capacitor and its voltage
5 increases. When a load exists at the output the buck can
COUT = 100μF, ILOAD = 100mA
efficiently transfer energy stored at a high voltage to the
D1=D0=0 D1=D0=1 D1=D0=0
4 regulated output. While energy storage at the input utilizes
the high voltage at the input, the load current is limited
VOUT VOLTAGE (V)

3 to what the buck converter can supply. If larger loads

need to be serviced the output capacitor can be sized to
2 VOUT
support a larger current for some duration. For example,
a current burst could begin when PGOOD goes high and
1
PGOOD = LOGIC1 would continuously deplete the output capacitor until
PGOOD went low.
0
0 2 4 6 8 10 12 14 16 18 20
TIME (ms)
35881 F03

Figure 3. PGOOD Operation During D0/D1 Transition

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LTC3588-1
APPLICATIONS INFORMATION
Introduction The LTC3588-1 is well-suited to a piezoelectric energy
harvesting application. The 20V input protective shunt
The LTC3588-1 harvests ambient vibrational energy
can accommodate a variety of piezoelectric elements. The
through a piezoelectric element in its primary application.
low quiescent current of the LTC3588-1 enables efficient
Common piezoelectric elements are PZT (lead zirconate
energy accumulation from piezoelectric elements which
titanate) ceramics, PVDF (polyvinylidene fluoride) poly-
can have short-circuit currents on the order of tens of
mers, or other composites. Ceramic piezoelectric elements
microamps. Piezoelectric elements can be obtained from
exhibit a piezoelectric effect when the crystal structure
manufacturers listed in Table 2.
of the ceramic is compressed and internal dipole move-
ment produces a voltage. Polymer elements comprised Table 2. Piezoelectric Element Manufacturers
of long-chain molecules produce a voltage when flexed Advanced Cerametrics www.advancedcerametrics.com
as molecules repel each other. Ceramics are often used Piezo Systems www.piezo.com
under direct pressure while a polymer can be flexed more Measurement Specialties www.meas-spec.com
readily. A wide range of piezoelectric elements are avail- PI (Physik Instrumente) www.pi-usa.us
able and produce a variety of open-circuit voltages and MIDE Technology Corporation www.mide.com
short-circuit currents. Typically the open-circuit voltage Morgan Technical Ceramics www.morganelectroceramics.com
and short-circuit currents increase with available vibrational
energy as shown in Figure 4. Piezoelectric elements can
The LTC3588-1 will gather energy and convert it to a use-
be placed in series or in parallel to achieve desired open-
able output voltage to power microprocessors, wireless
circuit voltages.
sensors, and wireless transmission components. Such a
12 wireless sensor application may require much more peak
power than a piezoelectric element can produce. However,
the LTC3588-1 accumulates energy over a long period of
9
INCREASING time to enable efficient use for short power bursts. For
PIEZO VOLTAGE (V)

VIBRATION ENERGY
continuous operation, these bursts must occur with a low
6 duty cycle such that the total output energy during the burst
does not exceed the average source power integrated over
3
an energy accumulation cycle. For piezoelectric inputs the
time between cycles could be minutes, hours, or longer
depending on the selected capacitor values and the nature
0
0 10 20 30 of the vibration source.
PIEZO CURRENT (μA)
35881 F04

Figure 4. Typical Piezoelectric Load Lines

for Piezo Systems T220-A4-503X

35881f

12
 LTC3588-1
APPLICATIONS INFORMATION

OUTPUT
PZ1 PZ2 VOLTAGE
VIN PGOOD EN TX 20mV/DIV
1μF AC-COUPLED
10μH MICROPROCESSOR
6V 3.3V
10μF CAP LTC3588-1 SW CORE
25V GND
VIN2 VOUT LOAD
CURRENT
4.7μF D1 47μF 25mA/DIV
6V D0 6V
GND 5mA

35881 F05a 35881 F05b

VIN = 5V 250μs/DIV
L = 10μH, COUT = 47μF
LOAD STEP BETWEEN 5mA and 55mA

Figure 5. 3.3V Piezoelectric Energy Harvester Powering a Microprocessor

with a Wireless Transmitter and 50mA Load Step Response

PGOOD Signal letting VIN charge to a high voltage, or both. Enough energy
should be stored on the input so that the buck does not
The PGOOD signal can be used to enable a sleeping
reach the UVLO falling threshold which would halt energy
microprocessor or other circuitry when VOUT reaches
regulation, as shown in Figure 5. Typically VIN will be transfer to the output. In general:
somewhere between the UVLO thresholds at this time
and a load could only be supported by the output capaci-
1
(
PLOAD tLOAD = ηCIN VIN 2 − VUVLOFALLING 2
2
)
tor. Alternatively, waiting a period of time after PGOOD VUVLOFALLING ≤ VIN ≤ VSHUNT
goes high would let the input capacitor accumulate more
energy allowing load current to be maintained longer as The above equation can be used to size the input capaci-
the buck efficiently transfers that energy to the output. tor to meet the power requirements of the output for the
While active, a microprocessor may draw a small load desired duration. Here η is the average efficiency of the
when operating sensors, and then draw a large load to buck converter over the input range and VIN is the input
transmit data. Figure 5 shows the LTC3588-1 responding voltage when the buck begins to switch. This equation
smoothly to such a load step. may overestimate the input capacitor necessary since load
current can deplete the output capacitor all the way to the
Input and Output Capacitor Selection lower PGOOD threshold. It also assumes that the input
The input and output capacitors should be selected based source charging has a negligible effect during this time.
on the energy needs and load requirements of the ap- The duration for which the regulator sleeps depends on
plication. In every case the VIN capacitor should be rated the load current and the size of the output capacitor. The
to withstand the highest voltage ever present at VIN.
sleep time decreases as the load current increases and/or
For 100mA or smaller loads, storing energy at the input
as the output capacitor decreases. The DC sleep hysteresis
takes advantage of the high voltage input since the buck
window is ±12mV around the programmed output volt-
can deliver 100mA average load current efficiently to the
age. Ideally this means that the sleep time is determined
output. The input capacitor should then be sized to store
by the following equation:
enough energy to provide output power for the length of
time required. This may involve using a large capacitor, 24mV
t SLEEP = COUT
ILOAD

35881f

13
LTC3588-1
APPLICATIONS INFORMATION
This is true for output capacitors on the order of 100μF of loss. Tradeoffs between price, size, and DCR should be
or larger, but as the output capacitor decreases towards evaluated. Table 3 lists several inductors that work well
10μF delays in the internal sleep comparator along with with the LTC3588-1.
the load current may result in the VOUT voltage slewing
Table 3. Recommended Inductors for LTC3588-1
past the ±12mV thresholds. This will lengthen the sleep
MAX MAX
time and increase VOUT ripple. A capacitor less than 10μF INDUCTOR L IDC DCR SIZE in mm MANU-
is not recommended as VOUT ripple could increase to an TYPE (μH) (mA) (Ω) (L × W × H) FACTURER
undesirable level. CDRH2D18/LDNP 10 430 0.180 3×3×2 Sumida

If transient load currents above 100mA are required then a 107AS-100M 10 650 0.145 2.8 × 3 × 1.8 Toko

larger capacitor can be used at the output. This capacitor EPL3015-103ML 10 350 0.301 2.8 × 3 × 1.5 Coilcraft
will be continuously discharged during a load condition MLP3225s100L 10 1000 0.130 3.2 × 2.5 × 1.0 TDK
and the capacitor can be sized for an acceptable drop in XLP2010-163ML 10 490 0.611 2.0 × 1.9 × 1.0 Coilcraft
VOUT: SLF7045T 100 500 0.250 7.0 × 7.0 × 4.5 TDK
I −I
COUT = ( VOUT+ − VOUT– ) LOAD BUCK VIN2 and CAP Capacitors
tLOAD
A 1μF capacitor should be connected between VIN and
Here VOUT+ is the value of VOUT when PGOOD goes high CAP and a 4.7μF capacitor should be connected between
and VOUT– is the desired lower limit of VOUT. IBUCK is the VIN2 and GND. These capacitors hold up the internal rails
average current being delivered from the buck converter, during buck switching and compensate the internal rail
typically IPEAK /2. generation circuits. In applications where the input source
A standard surface mount ceramic capacitor can be used is limited to less than 6V, the CAP pin can be tied to GND
for COUT, though some applications may be better suited and the VIN2 pin can be tied to VIN as shown in Figure 6.
to a low leakage aluminum electrolytic capacitor or a An optional 5.6V Zener diode can be connected to VIN to
supercapacitor. These capacitors can be obtained from clamp VIN in this scenario. The leakage of the Zener diode
manufacturers such as Vishay, Illinois Capacitor, AVX, below its Zener voltage should be considered as it may
or CAP-XX. be comparable to the quiescent current of the LTC3588-1.
This circuit does not require the capacitors on VIN2 and
Inductor CAP, saving components and allowing a lower voltage
rating for the single VIN capacitor.
The buck is optimized to work with an inductor in the range
of 10μH to 22μH, although inductor values outside this
range may yield benefits in some applications. For typical PIEZO SYSTEMS T220-A4-503X

applications, a value of 10μH is recommended. A larger

inductor will benefit high voltage applications by increasing PZ1 PZ2
the on-time of the PMOS switch and improving efficiency VIN PGOOD PGOOD
by reducing gate charge loss. Choose an inductor with a VIN2
LTC3588-1 10μH
VOUT
DC current rating greater than 350mA. The DCR of the 5.6V
10μF
6V
CAP SW
1.8V
inductor can have an impact on efficiency as it is a source (OPTIONAL) D1 VOUT
10μF
D0 6V
GND

35881 F06

Figure 6. Smallest Solution Size 1.8V Low Voltage Input

Piezoelectric Power Supply

35881f

14
 LTC3588-1
APPLICATIONS INFORMATION
Additional Applications with Piezo Inputs A piezo powered LTC3588-1 can also be used in concert
with a battery connected to VIN to supplement the system
The versatile LTC3588-1 can be used in a variety of con-
if ambient vibrational energy ceases as shown in Figure 8.
figurations. Figure 7 shows a single piezo source powering
A blocking diode placed in series with the battery to VIN
two LTC3588-1s simultaneously, providing capability for
prevents reverse current in the battery if the piezo source
multiple rail systems. This setup features automatic sup-
charges VIN past the battery voltage. A 9V battery is shown,
ply sequencing as the LTC3588-1 with the lower voltage
but any stack of batteries of a given chemistry can be used
output (i.e. lower UVLO rising threshold) will come up first.
as long as the battery stack voltage does not exceed 18V.
As the piezo provides input power both VIN rails will
In this setup the presence of the piezo energy harvester
initially come up together, but when one output starts
can greatly increase the life of the battery. If the piezo
drawing power, only its corresponding VIN will fall as the
source is removed the LTC3588-1 can serve as a stand-
bridges of each LTC3588-1 provide isolation. Input piezo
alone nanopower buck converter. In this case the bridge
energy will then be directed to this lower voltage capacitor
is unused and the blocking diode is unnecessary.
until both VIN rails are again equal. This configuration is
expandable to any number of LTC3588-1s powered by a
single piezo as long as the piezo can support the sum total
of the quiescent currents from each LTC3588-1.
PIEZO SYSTEMS T220-A4-503X

PZ1 PZ2 PZ1 PZ2

PGOOD1 PGOOD VIN VIN PGOOD PGOOD2
1μF 1μF
10μH LTC3588-1 6V 6V LTC3588-1 10μH
3.6V SW CAP CAP SW 1.8V
10μF 10μF
VOUT VIN2 25V 25V VIN2 VOUT
10μF D1 D1 10μF
6V 4.7μF 4.7μF 6V
D0 6V 6V D0
GND GND

35881 F07

Figure 7. Dual Rail Power Supply with Single Piezo and

Automatic Supply Sequencing

PIEZO SYSTEMS T220-A4-503X

IR05H40CSPTR PZ1 PZ2

VIN PGOOD PGOOD
1μF
6V LTC3588-1 10μH
VOUT
CAP SW
100μF 3.3V
9V 16V VIN2 VOUT
47μF
BATTERY D1 PZ1
4.7μF 6V
6V D0 PZ2
GND

35881 F08

Figure 8. Piezo Energy Harvester with Battery Backup

35881f

15
LTC3588-1
APPLICATIONS INFORMATION
DANGER! HIGH VOLTAGE!
DANGEROUS AND LETHAL POTENTIALS ARE PRESENT IN OFFLINE CIRCUITS!
150k 150k BEFORE PROCEEDING ANY FURTHER, THE READER IS WARNED THAT

120VAC CAUTION MUST BE USED IN THE CONSTRUCTION, TESTING AND USE OF

60Hz 150k 150k OFFLINE CIRCUITS. EXTREME CAUTION MUST BE USED IN WORKING WITH
PZ1 PZ2 AND MAKING CONNECTIONS TO THESE CIRCUITS. REPEAT: OFFLINE
VIN PGOOD PGOOD CIRCUITS CONTAIN DANGEROUS, AC LINE-CONNECTED HIGH VOLTAGE
1μF
LTC3588-1 10μH POTENTIALS. USE CAUTION. ALL TESTING PERFORMED ON AN OFFLINE
6V VOUT
CAP SW CIRCUIT MUST BE DONE WITH AN ISOLATION TRANSFORMER CONNECTED
10μF 3.6V
VIN2 VOUT BETWEEN THE OFFLINE CIRCUIT’S INPUT AND THE AC LINE. USERS AND
25V
100μF CONSTRUCTORS OF OFFLINE CIRCUITS MUST OBSERVE THIS PRECAUTION
D1 6V
4.7μF WHEN CONNECTING TEST EQUIPMENT TO THE CIRCUIT TO AVOID ELECTRIC
6V D0
GND SHOCK. REPEAT: AN ISOLATION TRANSFORMER MUST BE CONNECTED
BETWEEN THE CIRCUIT INPUT AND THE AC LINE IF ANY TEST EQUIPMENT IS
35881 F09
TO BE CONNECTED.

Figure 9. AC Line Powered 3.6V Buck Regulator with

Large Output Capacitor to Support Heavy Loads

COPPER PANEL PANELS ARE PLACED 6" COPPER PANEL

(12" s 24") FROM 2' s 4' FLUORESCENT (12" s 24")
LIGHT FIXTURES

PZ1 PZ2
VIN PGOOD PGOOD
1μF
6V LTC3588-1 10μH
CAP SW 3.3V
10μF
25V VIN2 VOUT
10μF
D1 6V
4.7μF
6V D0
GND

35881 F10

Figure 10. Electric Field Energy Harvester

Alternate Power Sources harvest energy from the electric field around the light.
The frequency of the emission will be 120Hz for magnetic
The LTC3588-1 is not limited to use with piezoelectric ele-
ballasts but could be higher if the light uses electronic
ments but can accommodate a wide variety of input sources
ballast. The LTC3588-1 bridge rectifier can handle a wide
depending on the type of ambient energy available. Figure 9
range of input frequencies.
shows the LTC3588-1 internal bridge rectifier connected
to the AC line in series with four 150k current limiting The LTC3588-1 can also be configured for use with DC
resistors. This is a high voltage application and minimum sources such as a solar panel or thermal couple as shown
spacing between the line, neutral, and any high voltage in Figures 11 and 12 by connecting them to one of the
components should be maintained per the applicable UL PZ1/PZ2 inputs. Connecting the two sources in this way
specification. For general off-line applications refer to UL prevents reverse current from flowing in each element.
regulation 1012. Current limiting resistors should be used to protect the
PZ1 or PZ2 pins. This can be combined with a battery
Figure 10 shows an application where copper panels are
backup connected to VIN with a blocking diode.
placed near a standard fluorescent room light to capacitively
35881f

16
 LTC3588-1
APPLICATIONS INFORMATION

300Ω
PZ1 PZ2
IR05H4OCSPTR
VIN PGOOD PGOOD
1μF LTC3588-1
+ 5V TO 16V 6V 10μH
VOUT
– SOLAR PANEL 100μF CAP SW 2.5V
9V 25V VIN2 VOUT
BATTERY
+ 3F
D0
4.7μF 2.7V
D1 10μF
6V GND NESS SUPER CAPACITOR
6V
ESHSR-0003CO-002R7
35881 F11

Figure 11. 5V to 16V Solar-Powered 2.5V Supply with Supercapacitor for

Increased Output Energy Storage and Battery Backup

RS, 5.2Ω 100Ω

PG-1 THERMAL PZ1 PZ2
GENERATOR VIN PGOOD PGOOD
P/N G1-1.0-127-1.27 1μF
(TELLUREX) LTC3588-1 10μH
6V VOUT
5.4V 1μF CAP SW
2.5V
16V VIN2 VOUT
47μF
D0 6V
4.7μF
6V D1 GND

35881 F12

Figure 12. Thermoelectric Energy Harvester

35881f

17
LTC3588-1
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)

R = 0.115 0.38 ± 0.10

TYP
6 10
0.675 ±0.05

3.50 ±0.05 1.65 ±0.05 3.00 ±0.10 1.65 ± 0.10

2.15 ±0.05 (2 SIDES) (4 SIDES) (2 SIDES)
PIN 1
PACKAGE TOP MARK
OUTLINE (SEE NOTE 6)
(DD) DFN 1103

5 1
0.25 ± 0.05 0.200 REF 0.75 ±0.05 0.25 ± 0.05
0.50 0.50 BSC
BSC 2.38 ±0.10
2.38 ±0.05 (2 SIDES)
0.00 – 0.05
(2 SIDES) BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE

35881f

18
 LTC3588-1
PACKAGE DESCRIPTION
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661 Rev E)

BOTTOM VIEW OF
EXPOSED PAD OPTION
2.06 p 0.102
2.794 p 0.102 0.889 p 0.127
(.110 p .004) 1 (.081 p .004)
(.035 p .005)
1.83 p 0.102
(.072 p .004)

5.23
2.083 p 0.102 3.20 – 3.45
(.206)
(.082 p .004) (.126 – .136)
MIN

10

0.305 p 0.038 0.50 3.00 p 0.102

(.0120 p .0015) (.0197) (.118 p .004) 0.497 p 0.076
TYP BSC (NOTE 3) (.0196 p .003)
RECOMMENDED SOLDER PAD LAYOUT 10 9 8 7 6
REF

4.90 p 0.152 3.00 p 0.102

(.193 p .006) (.118 p .004)
(NOTE 4)
DETAIL “A”
0.254
(.010)
0o – 6o TYP
GAUGE PLANE 1 2 3 4 5

0.53 p 0.152 1.10 0.86

(.021 p .006) (.043) (.034)
MAX REF
DETAIL “A”
0.18
(.007)
SEATING
PLANE 0.17 – 0.27 0.1016 p 0.0508
(.007 – .011) (.004 p .002)
0.50
TYP MSOP (MSE) 0307 REV B
NOTE: (.0197)
1. DIMENSIONS IN MILLIMETER/(INCH) BSC
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

35881f

19
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC3588-1
TYPICAL APPLICATION
Piezoelectric 3.3V Power Supply with LDO Peak-to-Peak Output Ripple vs COUT1
Post Regulator for Reduced Output Ripple 120
COUT2 = 1μF

VOUT RIPPLE PEAK-TO-PEAK (mV)

100

PZ1 PZ2 VOUT1 (LTC3588-1)

80
VIN PGOOD SHDN
1μF VOUT1
10μH 3.6V LT3009-3.3 VOUT2 60
6V
47μF CAP LTC3588-1 SW IN OUT 3.3V
25V 20mA 40
VIN2 VOUT GND
D1
4.7μF COUT1 COUT2 VOUT2 (LT3009-3.3)
D0 10μF 1μF 20
6V GND
6V 6V
0
35881 TA02a
10 100
COUT1 (μF)
35881 TA02b

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35881f

20 Linear Technology Corporation

LT 0110 • PRINTED IN USA

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