Computer Organization

Control Unit

Department of Computer Science

Missouri University of Science & Technology
[email protected]

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 Computer Organization

Note, this unit will be covered in three

lectures. In case you finish it earlier, then
you have the following options:
1) Take the early test and start CS3889.module6
2) Study the supplement module
(supplement CS3889.module5)
3) Act as a helper to help other students in
studying CS3889.module5
Note, options 2 and 3 have extra credits as noted in course
outline. 2
 Computer Organization

{
Glossary of prerequisite topics

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Enforcement Familiar with the topics? CS3889.module5.background
of background Yes
Take Test
At the end give a
No test, record the score,
Pass? Remedial action

{
and impose remedial
Yes
action if not
Glossary of topics successful

No
Familiar with the topics? Take the Module
Yes
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Pass?
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Lead a group of students in

Study next module? this module (extra credits)?
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 Computer Organization

CPU

CU ALU

Information
Result
Input Unit Memory Unit Output Unit

Data Path
Control Path

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Control Unit
In general control unit has two major
tasks:
Instruction Sequencing: the way
instructions are selected.
Instruction Interpretation: the way
instructions are executed.

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Control Unit ─ Instruction Interpretation

 Each assembly (machine) level instruction is an orderly sequence
of µ-operations.
 Assembly (machine) level instructions are executed by means of
control functions (control signals).
 Each control function is a Boolean function which enables the
execution of a µ-operation.
 It is the task of control unit to generate control signals in an orderly
fashion.
 A control unit is the realization of control functions. It is simply a
decoder that based on an input pattern, generates a proper output
pattern, where each output signal is a control signal.

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Control Unit ─ Simple machine Control Signals

OPR MAR ⇐ PC
q
0
3x8 .
.. MBR ⇐ (M[MAR])
Decoder
.

q Control
I
7
Unit .
.
.
t0
2x4
Decoder
t3

Counter C0 C1 C2 C3
2x4
Clock Decoder

F R
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Control Unit ─ Simple machine

 In the simple machine, main memory has been repeatedly read in
various routine. c0t0: MAR ← PC
ct: MBR ← (M[MAR]), PC ← (PC) + 1
c0 c01t10: MAR ← (MBR(ADDRESS))
c0t2: OPR ← (MBR(op)), I ← (MBR(I))
t1 This signal initiates: qc tc12M
:t0: MAR MBR ← (M[MAR])
← (MBR(address))
M B R ⇐q'10(7Ic [
t M
: AR ]
R ) ← 1
qc10tc22:t01:3 MBR idle← (M[MAR])
c (q7+I')c0t3: F ← 1
1
t1 qc10tc32:t2: AC F←←(AC) 1, RΛ←(MBR)
0
q0c2t3: ...
c2
t1
q
0
c2
t
q1
1
c2
t1
q
2
c2
t
q1
6 8
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Control Unit
Naturally, such an ad hoc approach is justifiable when
dealing with simple organizations. In case of complex
systems one needs to use a more systematic approach in
the design of control unit. Two approaches have been
proposed:
Hardwired: Realization of the control unit as a
sequential device.
µ-Programming: Realization of the control unit by
means of programming routines.

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Control Unit ─ Hardwired

State Table Method
Delay Element Method
Sequence Counter
Programmable Logic Array

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Control Unit ─ µ-Programmed

As one can visualize, a hardwired control unit is a "big
decoder" which, at each moment in time, based on the
input pattern (system's status) generates a bit pattern as
output (control signals). This bit pattern then activates
the proper functional boxes.
A microprogrammed control unit is simply a
mechanism which allows to:
 i) Store all possible output bit patterns in a memory, and
 ii) Read them in an orderly fashion.

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Control Unit ─ µ-Programmed

Suppose we have a memory (control memory), like any
other memory organization, composed of memory
words (control word).
Further, each bit of a memory word is designated by a
mnemonic name which represents a specific function:

Control PC ⇐ (PC) + 1
Word • • •
MAR ⇐ PC MBR ⇐(M[MAR])

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Control Unit ─ µ-Programmed

It is also assumed that we have a facility to set
up the control words by different patterns:

1 0 0 0 • • • 0

0 1 1 0 • • • 0
•
•
•

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µ-Programmed Control Unit

If one has a mechanism to fetch the control
words and interpret their contents, then fetching
the previous two memory words in proper
order, generates the sequence of control
functions needed to perform fetch cycle.

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µ-Programmed Control Unit ─ Hardware

Requirements
Control Store to store micro instructions. This storage
could be a part of main memory or a dedicated storage
medium.
Hardware facility to fetch, decode and execute micro
instructions.
Mechanism to map the operation codes (at assembly
level) to the proper addresses in the control store.

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µ-Programmed Control Unit ─ Flow of Control

Micro instructions are stored in groups. Each group of
micro instructions represents a macro instruction
(assembly instruction). Similar to a "case statement",
the operation code of a macro instruction transfers
control to a designated collection of micro instructions.
 A macro instruction is fetched.
 The operation code is mapped into a block of the control store
which represents that macro instruction.
 The designated micro instructions are fetched and executed in
an orderly fashion.

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µ-Programmed Control Unit

Control Store
─ Flow of
Control
PC •
Main •
Memory •
2
Fetch a
Macro Inst.
Map macro
1
inst. to a
block
•
Macro (assembly 3
level) instructions • Each block
Fetch and represents a
execute the • sequence of
µ - inst. µ - inst. for a
macro inst.

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µ-Programmed Control
Macro Inst. Unit

Mapping Process Increment

Control Address Register Return Address

Reg. or Stack

•
Status
bits Branch
Control
Logic
Memory

Micro operations
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µ-Programmed Control Unit ─ µ-Instruction
Format
A µ-instruction (in general) is composed to two parts:
control field and address field.
 Control field is used to activate functional units.
 Address field is used to fetch µ-instructions in an orderly fashion.
However, similar to the concept of the program counter, the address
field can be eliminated at the expense of a register called micro
program counter.
In some cases control words have additional field(s) called
Emit-Field(s) - say to initialize a register.

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Questions
Compare and contrast µ-programmed and
hardwired control units against each other.
How can we reduce the length of the µ-
instructions?
Discuss the factors that could effect the length
of the µ-instructions.

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µ-Programmed Control Unit ─ µ-

Instruction Format
Based on the degree of parallelism and
representation of µ-operations, µ-instructions
can be classified into three groups:
Horizontal
Vertical
Diagonal

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 µ-Programmed Control Unit ─ µ-Instruction Format

 Horizontal: each bit of the control part represents a distinct µ-operation.
A horizontal µ-instruction is characterized by:
 Long format.
 Ability to express a high degree of parallelism.
 Little encoding of the control information.
 Vertical: control part represents just one µ-operation. A vertical format is
characterized by:
 Short format
 No degree of parallelism
 Considerable encoding of the control information
 Diagonal: it is a compromise between horizontal and vertical formats. It
is characterized by:
 Moderate length format
 Some degree of parallelism
 Some encoding of the control information

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µ-Programmed Control Unit ─ An Example

The computer configuration is as follows:
1 11
PC
Main Memory
1 11
MAR
2k * 16
Control Store

128 * 20 1 16
MBR
1 7
CAR 1 16
7 AC
1
SBR 23
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µ-Programmed Control Unit ─ An Example

Macro Instruction Format

1 2 5 6 16

Mode Bit Operand

Op-Code

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µ-Programmed Control Unit ─ An Example

Sixteen possible instructions, such as
ADD 0000 AC⇐ (AC)+(M)
BRANCH 0001 if AC<0 then PC ⇐ effective address
STORE 0010 M ⇐ (AC)

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µ-Programmed Control Unit ─ An Example

µ-Instruction Format
3 3 3 2 2 7
F1 F2 F2 CD BR ADF
F1, F2, and F3 fields are the control part. Having F1, F2,
and F3 as part of control part implies some degree of
parallelism.
 000 100 101 implies 2 micro operations
 F1 = 000 ⇒ no operation
 F2 = 100 ⇒ MBR ⇐ (M[MAR])
 F3 = 101 ⇒ PC ⇐ (PC) + 1
 CD, BR and ADF fields collectively represent a (conditional)
transfer control.
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µ-Programmed Control Unit ─ An Example
CD is 2-bits long and defines status conditions:
CD Condition
00 U unconditional 1
01 I Indirect mode bit MBR(I)
10 S Sign of AC AC(S)
11 Z Zero value in AC AC = 0

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µ-Programmed Control Unit ─ An Example
BR is 2-bits long and defines different types of branches:
BR
00 JMP CAR ⇐ (ADF) if condition is true
CAR ⇐ (CAR)+1 otherwise
01 CALL CAR⇐ (ADF), SBR⇐ (CAR)+1 if condition is true
CAR ⇐ (CAR)+1 otherwise
10 RET CAR ⇐ (SBR)
11 MAP CAR(2-5) ⇐ (MBR(Op-Code)), CAR(1,6,7) ⇐ 0

ADF is 7-bits long and represents the address field.

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µ-Programmed Control Unit ─ An Example

Similar to the assembly instructions, a symbolic
notation can be used to represent each µ-instruction.
In our system, each µ-instruction is composed of six
elements:
 A label followed by semi-colons
 µ-op-codes separated by commas
 CD fields (U, I, S, Z)
 BR field (JMP, CALL, RET, MAP)
 ADF field (a label, NEXT, or blank)
 Comments

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µ-Programmed Control Unit ─ An Example

FETCH Cycle
The first 64 words in the control store represent the
micro instructions for 16 macro instructions. For each
macro instruction, a block of four µ-instruct-ions is
designated. Therefore, the micro code to represent the
instruction fetch cycle is stored somewhere in the high
order half part of the control store.
FETCH: PCTAR U JMP NEXT
READ, INCPC U JMP NEXT
BRTAR U MAP

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 µ-Programmed Control Unit ─ An

Example
ADD
ADD: NOP I CALL INDRCT
READ U JMP NEXT
ADD U JMP FETCH

BRANCH
BRANCH: NOP S JMP OVER
NOP U JMP FETCH
OVER: NOP I CALL INDRCT
BRTPC U JMP FETCH

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µ-Programmed Control Unit ─ An

Example
STORE
STORE: NOP I CALL INDRCT
ACTBR U JMP NEXT
WRITE U JMP FETCH

Indirect Cycle
INDRCT: READ U JMP NEXT
BRTAR U RET
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 µ-Programmed Control Unit ─ Microprocessor Sequencer

It is a unit which allows to fetch the µ-instructions in an
orderly fashion.
Macro Inst.
Map
L
External

I0 I1 Mapping Process Increment

Switch 3 2 1 0 SBR
S0 L
Logic
S1
•
Return Address
1 CAR Increment Control Address Register
Reg. or Stack
T
I MUX.
S •
Z
Status
bits Branch
Control Memory Logic
Control
Memory

µ-codes CD BR A DF

Micro operations 33
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µ-Programmed Control Unit ─ Microprocessor

Sequencer
BR I0 I1T S0 S 1 L

JMP 00 0 0 0 0 0 0
JMP 00 0 0 1 1 0 0
CALL 01 0 1 0 0 0 0
CALL 01 0 1 1 1 0 1
RET 10 1 0 X 0 1 0
MAP 11 1 1 X 1 1 0
S0 = I 0 I 1 T+I 0 I 1 T+I 0 I 1 = I 0 T( I 1 +I 1 )+ I 0 I 1 = I 0 T+I 0 I 1
S1 = I 0 I 1 +I 0 I 1 = I 0 ( I 1 +I 1 )=I 0
L = I 0I 1T 34
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Control Unit
 Control unit: A computer module with two major tasks:
instruction sequencing and instruction interpretation.
 Instruction sequencing: The way instructions are selected.
 Instruction Interpretation: The way instructions are executed.
 Hardwired control unit: A way to design the control unit, in which
the control signals are generated by random logic.

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Control Unit
Micro programming: A way to design the control unit,
in which the control signals are generated by reading
them from the control store.
State table method: A hardwired technique for the
design of control unit.
Delay elements method : A hardwired technique for the
design of control unit.
Sequence counter method: A hardwired technique for
the design of control unit.
Programmable logic array: A hardwired technique for
the design of control unit.

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Questions
In a general purpose computer, what are the major tasks
of a control unit?
Based on our earlier discussion about the simple
machine, there are missing input signals to the control
unit diagram of the simple machine. What are they?
What is a correct answer? Control unit:
 Is a decoder which interprets the status of the computer at each
moment of time.
 Is a black box which generates control signals in an orderly
fashion.
 Initiates the execution of micro operations.
 None of the above.
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