Design and FPGA Implementation of Real-Time Automatic Image Enhancement Algorithm
Design and FPGA Implementation of Real-Time Automatic Image Enhancement Algorithm
Enhancement Algorithm
DONG GuoWei*a, HOU ZuoXuna, TANG Qia, PAN Zhenga, LI Xina
a
Beijing Institute of Space Mechanics & Electricity, Beijing, China 100190
ABSTRACT
In order to improve image processing quality and boost processing rate, this paper proposes an real-time automatic
image enhancement algorithm. It is based on the histogram equalization algorithm and the piecewise linear enhancement
algorithm, and it calculate the relationship of the histogram and the piecewise linear function by analyzing the histogram
distribution for adaptive image enhancement. Furthermore, the corresponding FPGA processing modules are designed to
implement the methods. Especially, the high-performance parallel pipelined technology and inner potential parallel
processing ability of the modules are paid more attention to ensure the real-time processing ability of the complete
system. The simulations and the experimentations show that the algorithm is based on the design and implementation of
FPGA hardware circuit less cost on hardware, high real-time performance, the good processing performance in different
sceneries. The algorithm can effectively improve the image quality, and would have wide prospect on imaging
processing field.
Key words: histogram equalization, piecewise linear, FPGA, parallel structures, pipeline technology
1. INTRODUCTION
In recent years, image enhancement technology is widely used in biomedical, machine vision, aerospace remote
sensing[1]. Obtaining high-quality images is a difficulty among these areas due to several reasons that image quality can
be affected by environment, light, movement and exposure. At the same time, processing the image in real time is more
challenge, because the image resolution and the frame rate are higher. That means the traditional way which enhancing
the image in frequency domain cannot satisfy the requirement of real-time image because of the transform between
different domains.
In real-time automatic image enhancement application, histogram equalization[2-3] and piecewise linear transformation[4-5]
are the common methods. The advantage of histogram equalization is that it can automatically enhance contrast ratio of
the image. However, the effects of enhancement cannot be controlled. This method enhances the targets and also the
background noise at the same time; sometimes gray-scale merger phenomenon may happen. While piecewise linear
transformation is comparatively easier than previous method that it has higher adaptability because it can be any form of
combination. More user inputs required such as determining the segment region and setting scale coefficient to obtain a
better enhancement effect is the defect.
Thus, this paper aims to propose a modified piecewise linear transformation algorithm which utilizes the advantages of
the histogram equalization method and the piecewise linear transform method, and adaptively adjusts the scale
coefficient of the piecewise linear function by analyzing the histogram information. The algorithm is adapted to be used
for the color images, and can be easily implemented by the FPGA. It can effectively improve the image quality and can
be used in real-time systems.
Selected Papers of the Chinese Society for Optical Engineering Conferences held July 2016,
edited by Yueguang Lv, Weimin Bao, Guangjun Zhang, Proc. of SPIE Vol. 10141, 1014113
© 2016 SPIE · CCC code: 0277-786X/16/$18 · doi: 10.1117/12.2251105
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Figure 1. The example image that the pixels locates in a narrow interval.
Based on the above considerations, we consider how to divide the interval, and transform each interval in reasonable
piecewise linear function, its core is to automatically determine the he coefficient of each interval and to find the
relationship between different coefficients.
First, determine the number and pattern of dividing the interval. Simplicity, using the average range method to evenly
dividing the image into a plurality of gray value range. After analysis, more than five ranges can better describe a
picture. Below, we describe the image by five intervals.
The image gray level is from 0 to 255, evenly divided into five sections, respectively [0,51], (51,102], (102,153],
(153,204], (204,255]. If it is a color image, we should make the YUV transform, use the Y component to the make image
enhancement processing, and remain the U and V components. Just use the linear functions to make the transform, and
the formula is:
K1*x x∈ 0,51
K2* x-51 +y1 x∈ 51,102
y= K3* x-102 +y2 x∈(102,153] (1)
K4* x-153 +y3 x∈(153,204]
K5* x-204 +y4 x∈(204,255]
Where y1 = 51 * K1, y2 = 51 * (K1 + K2), y3 = 51 * (K1 + K2 + K3), y4 = 51 * (K1 + K2 + K3 + K4).
Second, determine the coefficients for each interval linear function. There are some coefficients affects the enhancement
algorithm, including the scale factors K1~K5. If we want to make the enhancement automatically, the proportionality
coefficient of the 5 functions ought to be generated automatically.
This paper proposes a method that can generate the K1~K5 automatically. The enhanced images should be in the
character of relatively uniform distribution for the histogram equalization method. As a reference, the scale factor of five
sections of the interval histogram can be determined through calculating the pixel number R1~R5 in the 5 interval of the
histogram. And generating the scale factor K1~K5 by constructing the linear relationship between K and R.
Mathematically, it is assumed between them satisfies the following formula:
Kn=k*Rn+b k>0, n=1,2…5 (2)
Where the variable k is linear factor, b is the threshold factor. From this formula, if the number of pixels is bigger in a
interval, suppose a larger amount of image information contained in this interval, and should set a larger scale factor
consequentially. If automatic extending the interval according to the computed scale factor, the contrast of this interval is
increased as a result.
3. IMPLEMENTATION IN FPGA
The modularization programming method[7] is applied in the design of FPGA to improve the timing and reduce the delay
effectively. And the parallel structures[8] and pipelined technology[9] are used in the realization of these modules.
Figure 2 shows the block diagram of image processing system based on FPGA of a CMOS[10] camera. The automatic
enhancement module which is marked in the grey box is the core of the system.
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4. EXPERIMENTAL RESULT
The automatic enhancement algorithm is applied to a certain type of visible light CMOS camera in the laboratory, and
the test is carried out. PC software is developed by VC. The video display is achieved by calling the API function to
operate the image acquisition card .In order to verify the robustness of the algorithm, multiple tests were performed on
different types of images. Below is an example of one of the examples for analysis.
Figure 5 shows the contrast enhancement effect under different threshold factors (b=0.75, b=0.6 and b=0.33). Figure
5.(a) shows the original image and enhanced image. Figure 5.(b) is the histogram of each sub graph in Figure 5.(a). It can
be seen that the original image is dark. A lot of detail information is concentrated in the gray value of [20,80] interval
which is not suitable for human eye to identify. The enhanced image becomes bright and the details are clear. The
enhancement intensity becomes larger with the decrease of the b value of the enhancement coefficient.
It can be seen from the histogram, the area with large amount of information is stretched, the area with less information
is compressed. For example, the gray value of the detail information in Figure 5.(b)(4) is in [50,160] interval. It is 2
times larger than the original image whose gray value is in [20,80] interval. In Figure 5.(b)(4), the gray value range of
[100,220] which has little information in the original image is compressed to [170,220] range. The area is compressed by
1/2.
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Figure 5. Processing effect of the proposed algorithm with different threshold factor b: (a) image, (b) histogram, (1)original
image, (2) b=0.75, (3) b=0.6, (4) b=0.33.
Table 1 is the histogram statistical tables for the five segments of the original image. R1~R5 represents the number of Y
component pixel in five segments. Table 2 gives the K value of the corresponding interval when the b value is different.
Table 1. The pixel numbers in five intervals of the histogram.
R1 R2 R3 R4 R5
Original image 1459960 483298 28678 12708 88956
Table 2. The values of the 5 scale coefficient with different threshold factor b.
K1 K2 K3 K4 K5
b=0.75 1.630 1.041 0.768 0.758 0.804
b=0.6 2.008 1.066 0.628 0.612 0.686
b=0.33 2.688 1.111 0.377 0.350 0.474
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5. CONCLUSION
In this paper, a piecewise linear enhancement algorithm is proposed, which can generate the ratio coefficient of five
sections automatically. It can enhance the color image automatically. The idea of histogram equalization and the
flexibility of piecewise linear transformation are comprehensively utilized. And then the above algorithm is implemented
by FPGA. In order to meet the real-time requirement of the system, the high efficiency parallel pipeline technique is
considered and the potential parallelism of the hardware modules is considered. The algorithm is easy to implement and
has strong adaptability. It can effectively improve the image information and image quality, and make the information
rich area fully displayed.
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