17/07/2019 Suresh's official blog...

: Design Rule Checks: max trans, max cap

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Design Rule Checks: max trans, max cap
Two of the frequently used design rules for STA are max transition and
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max capacitance. These rules check that all ports and pins in the
design meet the specified limits for transition time1 and capacitance.
These limits can be specified using: Blog Archive
· set_max_transition
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► 2019 (1)
· set_max_capacitance ▼
▼ 2018 (33)
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► July (6)
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► June (4)
As part of the STA, any violations to these design rules are reported in
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► May (2)
terms of slack. Here are some examples. set_max_transition 0.6
IOBANK # Sets a limit of 600ps on IOBANK. set_max_capacitance ►
► March (4)
0.5 [current_design] # Max capacitance is set to 0.5pf on all nets in # ▼
▼ January (17)
current design. Clocks
List of STA Topics
Two of the frequently used design rules for STA are Constraints - brief commands
i) max transition from start to end
ii) max capacitance Intel interview
AMD interview
These rules check that all ports and pins in the design meet Temperature vs delay in lower
the specified limits for transition time technologies
and capacitance. These limits can be specified using: CPPR
• set_max_transition Cross talk effects
• set_max_capacitance
Constraints validation

As part of the STA, any violations to these design rules are reported What are the sing-off checks for
STA during TapeOu...
in terms of slack. Here are some examples.
ETM (Extracted TIming Model):
How to read spef:
set_max_transition 0.6 IOBANK
# Sets a limit of 600ps on IOBANK. RC corners
Min pulse width violation and
set_max_capacitance 0.5 [current_design] fixing

# Max capacitance is set to 0.5pf on all nets in current design. Design Rule Checks: max
trans, max cap

The capacitance on a net is calculated by taking the sum of all the pin Timing Exceptions

capacitances plus any IO load plus any interconnect capacitance on Interview Queries
the net.
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► 2017 (45)
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► 2010 (8)
There are other design rule checks that can also be specified for a
design.

These are:
set_max_fanout
(specifies a fanout limit on all pins in design),

set_max_area
(for a design); however these checks apply for synthesis and not for
STA.

Posted by sureshkodam at 9:34 AM

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17/07/2019 Suresh's official blog...: Design Rule Checks: max trans, max cap

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