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Chapter 2-2 PDF

This document discusses Class A power amplifiers. It defines Class A amplifiers as having collector current that is non-zero for 100% of the input signal cycle. This results in low efficiency as some power is dissipated even without an input signal. The document discusses setting the quiescent point in the middle of the load line to avoid distortion, and defines related concepts like efficiency and large signal load lines. Examples are provided for determining quiescent point parameters from a given circuit.
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0% found this document useful (1 vote)
115 views

Chapter 2-2 PDF

This document discusses Class A power amplifiers. It defines Class A amplifiers as having collector current that is non-zero for 100% of the input signal cycle. This results in low efficiency as some power is dissipated even without an input signal. The document discusses setting the quiescent point in the middle of the load line to avoid distortion, and defines related concepts like efficiency and large signal load lines. Examples are provided for determining quiescent point parameters from a given circuit.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 78

All people think their problems are the

biggest, but in fact only a


small problem, the greatest is Allah
Subhanahuwataala.

Chapter 2
Power Amplifier

Mohd Riduwan bin Ghazali (Grad.IEM)


Content
• The Class A Power Amplifiers
• The Class B and AB Power
Amplifiers

Topic Outcome (TO)


• Able to identify Class A Power Amplifiers
• Able to identify Class B and AB Power Amplifiers
Introduction
• Power amplifiers are used to deliver a relatively high
amount of power, usually to a low resistance load.
• Typical load values range from 300W (for transmission
antennas) to 8W (for audio speaker).
• Although these load values do not cover every possibility,
they do illustrate the fact that power amplifiers usually
drive low-resistance loads.
• Typical output power rating of a power amplifier will be
1W or higher.
• Ideal power amplifier will deliver 100% of the power it
draws from the supply to load. In practice, this can never
occur.
• The reason for this is the fact that the components in the
amplifier will all dissipate some of the power that is being
drawn form the supply.

3
Amplifier Power Dissipation
V CC
The total amount of power I CC
being dissipated by the
amplifier, Ptot , is
Ptot = P1 + P2 + PC + PT + PE I1
I CQ
P =I R2
R1 RC PC = I 2CQ R C
The difference between this 1 1 1
total value and the total
power being drawn from the PT = I 2TQ R T
supply is the power that
actually goes to the load – i.e. I EQ
P 2 = I22R 2 R2 RE PE = I 2EQ R E
output power.

I2

4
Amplifier Efficiency η
• A figure of merit for the power amplifier is its
efficiency, η .
• Efficiency ( η ) of an amplifier is defined as the ratio
of ac output power (power delivered to load) to dc
input power .
• By formula : η = ac output power × 100% = Po (ac) × 100%
dc input power Pi (dc)

• As we will see, certain amplifier configurations have


much higher efficiency ratings than others.
• This is primary consideration when deciding which
type of power amplifier to use for a specific
application.

BTE 5
Amplifier Classifications
• Power amplifiers are classified according to the
percent of time that collector current is nonzero.
• The amount the output signal varies over one
cycle of operation for a full cycle of input signal.

v in Av v out Class-A

v in Av v out Class-B

v in Av v out Class-C
EE3110 Power Amplifier (Class A) Ref:080327HKN 6
Efficiency Ratings
• The maximum theoretical efficiency ratings of
class-A, B, and C amplifiers are:

Amplifier Maximum Theoretical


Efficiency, ηmax
Class A 25%
Class B 78.5%
Class C 99%

EE3110 Power Amplifier (Class A) Ref:080327HKN 7


Class A Amplifier
v in Av v out

• νoutput waveform → same shape → νinput waveform


+ π phase shift.

• The collector current is nonzero 100% of the time.


→ inefficient, since even with zero input signal,
ICQ is nonzero
(i.e. transistor dissipates power in the rest, or
quiescent, condition)

EE3110 Power Amplifier (Class A) Ref:080327HKN 8


Basic Operation
Common-emitter (voltage-divider) configuration (RC-coupled
amplifier)
+V CC

I CC

I CQ RC
I1
R1

RL

v in R2
RE

EE3110 Power Amplifier (Class A) Ref:080327HKN 9


Typical Characteristic Curves
for Class-A Operation

EE3110 Power Amplifier (Class A) Ref:080327HKN 10


Typical Characteristic
• Previous figure shows an example of a sinusoidal
input and the resulting collector current at the
output.
• The current, ICQ , is usually set to be in the center
of the ac load line.
(DC and AC analyses)

EE3110 Power Amplifier (Class A) Ref:080327HKN 11


Q-point in the middle of the
load line
When Q-point located at the middle of load line AC (between Cutoff and saturate)

Value of Ic can change


whether increased to
Ic(sat) or reduced to Ic
(cutoff)

Peak value ic = ICQ


Peak value Vce = VCEQ
Q-point in the middle of
the load line
• when the input signal is too large, the amplifier will
operate in the cutoff and saturation.
• distortion occurs when Vi is too large
Q- point of not being in
the middle of the load line
• Vce will be limited to a maximum value just had.
• if the point Q is located close to the cutoff, Vce will
be limited by the cuts and if the input signal is raised
again, the amplitude of the output waveform will
be distorted in one pass.
Large signal load line
• amplifier has two load line, direct current (DC) and
alternating current (AC) load line.

Class A Amplifier common Emitter Configuration


Large signal load line
• DC Load Line drawing (capacitor open)
VCC − VCE − I C ( RC + RE ) = 0 VB − VBE
I CQ ≈
I C ( sat ) happen when VCE ( sat ) = 0 RE
so,
VCC  R2 
I C ( sat ) ≈ VB =   VCC
RC + RE R
 1 + R2 

VCE ( cutoff ) = VCC When I C = 0 VCEQ ≈ VCC − I C ( RC + RE )

DC equivalent circuit and the DC load line


Large signal load line
• AC Load Line drawing (supply off &
capacitor short)

AC equivalent circuit and the AC load line


Large signal load line
• Large signal load line

From circuit vce = −ic rL or ic = −vce


rL
Where rL = RC // RL

Equation ic and vce can be expressed in terms of changes in the DC


−VCE + VCEQ ic = I C − I CQ
Substitute equation, I C − I CQ =
rL vce = VCE − VCEQ
VCEQ
Saturation : I C = ic ( sat ) and VCE = vce ( sat ) ≈ 0 so ic ( sat ) = I CQ + rL

cutoff : VCE = vce ( cutoff ) andI C = ic ( cutoff ) ≈ 0 ce ( cutoff ) = VCEQ + I CQ rL


vso
Large signal load line
Large signal load line
Example 1
• draw the DC load line and AC load line for the
circuit below. Assume that the capacitance of the
capacitor reactance is zero.
Answer
Example 2
• Determine the parameters of the Q-point ic(sat) and
vce(sat) of the circuit below. Assume that the
capacitance of the capacitor reactance is zero.
Solution
rL = RC // RL
 R2  1k × 1.5k
VB =  VCC
rL = = 600Ω
R
 1 + R2 
1k + 1.5k
 4.7k Ω  VCEQ
VB =   × 10 = 3.2V ic ( sat ) = I CQ +
 10k Ω + 4.7k Ω  rL
2.2
V − VBE ic ( sat ) = 5.3m + = 8.97mA
I E = I CQ = B 600
RE
3.2 − 0.7 vce ( cutoff ) = VCEQ + I CQ rL
I CQ = = 5.3mA
470
vce ( cutoff ) = 2.2 + 5.3m × 600 = 5.38V
VCC − VCE − I C ( RC + RE ) = 0

VCEQ = VCC − I C ( RC + RE )
VCEQ = 10 − 5.3m (1k + 470 ) = 2.2V
Solution

• Note that the Q-point is not the center line of the AC load,
then the maximum peak output signal is limited by:

∆I C = ic ( sat ) − I CQ ∆VCE = VCEQ − vce ( sat )


∆I C = ( 8.97 − 5.3) mA ∆I C = ( 2.2 − 0 ) V
∆I C = 3.67mA ∆I C = 2.2V
Large signal load line
• Adjust the Q-point in the middle of the load line:
using this equation. vce ( cutoff ) VCEQ + I CQ rL
VCEQ = =
2 2
 VCEQ 
I CQ +  
ic ( sat ) r
 L 
I CQ = =
2 2

• From this equation: 2VCEQ = VCEQ + I CQ rL


VCEQ = I CQ rL
VCEQ ' = I CQ ' rL
• to adjust the Q-point towards the cutoff on the same AC load line, ICQ shall be
reduced by adding the RE.
• While to adjust point-Q toward saturation region, the ICQ should be added by
reducing the RE.
Example 3
• Refer example 2, determine the RE to produce the
Q-point in the middle of the AC load line.
Solution
ic ( sat ) vce ( cutoff )
I CQ ( center ) = VCEQ ( center ) =
2 2
8.97m 5.38
I CQ ( center ) = = 4.49mA VCEQ ( center ) = = 2.69V
2 2

So new RE value: VCEQ ( center ) = VCC − I CQ ( center ) ( RC + RE ( new ) )


VCC − VCEQ ( center ) − ( I CQ ( center ) ) RC
RE ( new ) =
I CQ ( center )
10 − 2.69 − (4.49m )1k
RE ( new ) =
4.49m
RE ( new ) = 628Ω
Large signal load line
• Q-point amplifier class A should be in the middle of
the AC load line
• For DC load line, no problem because it is easy to
be designed.
• When the output load is applied, the AC load will
overlap with the Q-point DC load line. This will limit
the maximum oscillation the output signal without
distortion.
Power amplifier Class A
• Operational of Amplifier Class A

• For optimum operational, Q-point must be in the middle of the


AC load line for The maximum signal without distortion
• Q-point must be in safe operational area (SOA) for operational
transistor power ratings do not exceed the maximum limit.

safe operational Area


DC Input Power +V CC

The total dc power, Pi(dc) , that an I CC


amplifier draws from the power supply :
I CQ RC
I1
R1

Pi (dc) = VCC I CC RL

I CC = I CQ + I 1
v in R2
I CC ≈ I CQ ( I CQ >> I 1 ) RE

Pi ( dc ) = VCC I CQ
Note that this equation is valid for most amplifier power analyses. We can
rewrite for the above equation for the ideal amplifier as

Pi (dc ) = 2VCEQ I CQ
EE3110 Power Amplifier (Class A) Ref:080327HKN 30
AC Output Power
AC output (or load) power, Po(ac) ic

2 vo
vo ( rms )
Po ( ac ) = ic ( rms ) vo ( rms ) =
RL vin vce
rC RC//RL

Above equations can be used to R1//R2


calculate the maximum possible
value of ac load power.

EE3110 Power Amplifier (Class A) Ref:080327HKN 31


IC(sat) = V CC /(R C +R E ) IC(sat) = ICQ + (VCEQ/rC)

DC Load Line ac load line


IC
IC
(mA)
V CE(off) = V CC
VCE(off) = VCEQ + ICQrC

V CE VCE

ac load line vo2( rms )  I V  1


Po ( ac ) = = ic ( rms ) vo ( rms ) =  CQ   CEQ  = I CQVCEQ
RL  2  2  2
IC Q - point

dc load line 1
Po(ac) VCEQ I CQ
η= ×100% = 2 ×100% = 25%
Pi(dc) 2VCEQ I CQ

VCE

EE3110 Power Amplifier (Class A) Ref:080327HKN 32


Limitation

EE3110 Power Amplifier (Class A) Ref:080327HKN 33


Example 4
• Determine the AC power and power efficiency of
amplifier below when operating with maximum
output signal
Solution
Calculate ICQ and VCEQ

 R2 
VB =   × VCC
 R2 + R1 
 1k 
(
−VCC +VCEQ + I CQ RC + RE = 0 )
VB =   × 24
 1k + 4.7k  (
VCEQ =VCC − ICQ RC + RE )
VB = 4.2V VCEQ = 24 − 35m(330 +100)
−VB + VBE + I E RE = 0 VCEQ = 9V
 VB − VBE 
I E = I CQ =  
 RE 
 4.2 − 0.7 
I CQ =   = 35mA
 100 
Solution
When Q-point at the
Calculate ic(sat) and vce(cutoff): middle of AC load line:

330 × 330 ic ( sat ) 89.5m


rL = RC // RL = = 165Ω '
I CQ = = = 44.8mA
330 + 330 2 2
VCEQ v 14.8
ic ( sat ) = I CQ + '
VCEQ = ce ( cutoff ) = = 7.4V
rL 2 2
9
ic ( sat ) = 35m + = 89.5mA
165
vce ( cutoff ) = VCEQ + I CQ rL
vce ( cutoff ) = 9 + (35m ×165) = 14.8V
Solution
Power Efficiency:
vce (max) = I CQ rL = 35m ×165 = 5.8V
vce (max) = vo ( p ) = 5.8V
vo ( p ) 5.8
vo ( rms ) = =
2 2
2
 5.8 
( v )
2
 
=  = 51mW
o ( rms ) 2
Po ( ac ) =
RL 330
Pi ( dc ) = Vcc × I CQ = 24 × 35m
Po ( ac ) 51m
η= = = 0.06@ 6.1%
Pi ( dc ) 24 × 35m
Example 5
Class A amplifier RC coupling in the figure below is biased in
VCEQ = 12 V and the output voltage Vo is the maximum without
distortion. Determine:
• a) the average of the DC power supply
• b) Power AC delivered to the load
• c) Efficiency of power amplifier
Solution
−VCC + VCEQ + I CQ RC = 0
a) At Q-point:
 V − VCEQ 
I CQ =  CC  graf
 RC 
 24 − 12 
I CQ =   = 0.24 A
 50 

Pi ( dc ) = Vcc × I CQ = 24 × 0.24 = 5.76W


VCEQ = 12V
I CQ rL = (0.24)(50 // 50) = 6V
vo ( p ) = 6V
Solution
2
• b) Power AC
Po ( ac ) =
( vo(rms ) )
RL
2
 vo ( p ) 
 
Po ( ac ) =  2 
RL
2

Po ( ac ) =
(v )o( p )
=
62
= 0.36W
2 RL 2(50)
• c) efficiency
Po ( ac ) 0.36
η= = = 0.0625@ 6.25%
Pi ( dc ) 5.76
Class A Amplifier (transformer
coupling)
• The dc biasing of a transformer-coupled class-A
amplifier is very similar to any other class-A amplifier
with one important exception :→ → the value of VCEQ is
designed to be as close as possible to VCC.
• This Amplifier have advantages compared RC
coupling is because the transformer can achieve
impedance matching for maximum power transfer
to the load than can block the flow of direct
current through the load.
• Maximum power efficiency 50 %.
Class A Amplifier (transformer
coupling)

Circuit + graph

1
DC Load line: gradient = − = −∞
RDC
When DC analysis,
f = 0 Hz, X L = 2π fL = 0Ω 2
 Np 
• therefore, no direct current voltage drop rL =   × RL
N
 s
across the inductor and DC load line
vertical line drawn from a point
voltages: VCEQ = VCC because VCC = VCEQ + I CQ X L
• when Q-point is in the middle of the AC
load line, vce ( cutoff ) = 2VCEQ and i = 2I
c ( sat ) CQ
Class A Amplifier (transformer
coupling)
AC Load Line:
• Efficiency: 1

rL
2
(v o ( rms ) ) In maximum input condition : ∆I C 1 I
Po ( ac ) =
RL
= = CQ
 Ns  ∆VCE rL VCEQ
 vo ( p ) 
2
vo ( p ) =  × Vcc
  N VCEQ VCC
 2   p  I CQ = = 2
Po ( ac ) = 2
rL  Np 
RL  Ns    × RL
 Ns 
2
(v )
2   × Vcc
Np 
=
o( p)
Po ( ac ) = Po ( ac ) Po ( ac )
2 RL η= × 100%
2 RL Pi ( dc )
2
Pi ( dc ) = VCC × I CQ  Ns  2
  × Vcc
 Np 
2 RL
η= = 50%
VCC
VCC × 2
 Np 
  × RL
N
 s
Example 7
Class A Amplifier (transformer coupling)
1. Calculate ICQ and VCEQ
2. Efficiency
Solution
a) When DC analysis, f = 0 Hz, X L = 2π fL = 0Ω
VCC = VCEQ + I CQ X L
∆I C 1 I
= = CQ
∆VCE rL VCEQ
VCEQ = VCC = 15V
VCEQ 15
2 I CQ = = = 0.45 A
 Np  rL 33.3
rL =   × RL
N
 s
2
 14.6 
rL =   (10 ) = 33.3Ω
 8 
Graf
1 1
− =− = −0.03
rL 33.3
Solution
N 
b) vo ( p ) =  s  × Vcc
N 
 p
 8 
vo ( p ) =   ×15 = 8.22V
 14.6  Po ( ac )
η= ×100%
2 Pi ( dc )
Po ( ac ) =
(v )
o( p)

2 RL 3.38
η= = 0.5@ 50%
2 6.75
Po ( ac ) =
(8.22 ) = 3.38W
2(10)

Pi ( dc ) = VCC × I CQ
Pi ( dc ) = 15 × 0.45 = 6.75W
Basic class B amplifier operation (noninverting).
Class B push-pull ac operation.
Crossover distortion in a class B
push-pull amplifier
When VB = 0 V
Input should more than VBE for Transistor ON

The transistors conduct only during the portions of the input indicated by the
shaded areas.
Common-collector class B amplifier.
DC and AC Load Line Amplifier
Class B, Push-Pull
• DC equivalent circuit (capacitor open) • Q1 not operate:
• So :
• AC source grounded VB = 0V
Q1 and Q2 not operate. VCEQ = VCC
So VEQ = 0 V I CQ = 0 A

VCEQ ( cutoff ) = VCC


VCC VCC
I C ( sat ) = = =∞
RDC 0

I C ( sat ) = ∞

show that DC load line is a straight line.


DC and AC Load Line
Amplifier Class B, Push-Pull
• AC equivalent circuit (capacitor short and DC supply OFF)

VCEQ
As known: ic ( sat ) = I CQ +
rL

But ICQ=0 A and rL=RL


VCEQ VCC
So ic ( sat ) = =
rL RL

and vce ( cutoff ) = VCEQ + I CQ rL

vce ( cutoff ) = VCEQ = VCC


DC and AC Load Line Amplifier
Class B, Push-Pull
Output of Amplifier Class B, push-pull
Efficiency Power Amplifier Class B
Push-Pull
2

The average power delivered to the load: Po ( ac ) =


( vo( p ) ) (V )
= CC
2

2 RL 2 RL

Average power from the power supply: PDC = 2VCC I CC

But I CC = I C ( average ) waveform as half full wave rectifier

So, IC ( p ) VCC
I C ( average ) = =
π π RL 2
(VCC )
VCC 2VCC 2 Po ( ac ) 2 RL
Then PDC = 2VCC × = ηmax = =
π RL π RL Pi ( dc ) 2VCC 2
π RL
2
Maximum Efficiency: (V ) π RL π
ηmax = CC × 2
= = 0.785@ 78.5%
2 RL 2VCC 4
Example 8
Determine power efficiency and power dissipated each transistor when
Output peak voltage Vo(p) are :
a) 2 V
b) 8 V
Solution
a) For vo(p) = 2 V

( vo( p ) )
2 2 Po ( ac ) 25m
Po ( ac ) = =
( 2) = 25mW η= × 100 = × 100 = 13.1%
2 RL 2(80) Pi ( dc ) 191m

PDC = 2VCC I CC
PDC = 2VCC I C ( average )
Power dissipated each transistor:
IC ( p ) vo ( p )
I C ( average ) = = PDC − Po ( ac ) 191m − 25m
π π RL PDQ1 = = = 83mW
vo ( p ) 2 2
PDC = 2VCC × PDQ1 = PDQ 2
π RL
2
PDC = 2(12) × = 191mW
π (80)
Solution
b) For vo(p) = 8 V

( vo( p ) )
2 2 Po ( ac ) 400m
Po ( ac ) = =
( 8) = 400mW η= × 100 = × 100 = 52.3%
2 RL 2(80) Pi ( dc ) 764m

PDC = 2VCC I CC
PDC = 2VCC I C ( average )
Power dissipated each transistor:
IC ( p ) vo ( p )
I C ( average ) = = PDC − Po ( ac ) 764m − 400m
π π RL PDQ1 = = = 182mW
vo ( p ) 2 2
PDC = 2VCC × PDQ1 = PQ 2
π RL
8
PDC = 2(12) × = 764mW
π (80)
Example 9
If the output voltage of the amplifier circuit (example 8) is vo = 8sin ωt
Determine the power dissipation in the two transistors.

PDQ = PDC − Po ( ac )

vo ( p )  ( vo ( p ) ) 
 2

PDQ =  2VCC × − 
 π RL   2 RL 
 
 2(12)(8)   82 
PDQ =  −  = 363.94mW
 π (80)   2(80) 
Power Amplifier Class AB

Problem occur in Amplifier Class B caused


by the way the composition of the biasing
circuit is used.
• Crossover Distortion
• Thermal Runaway
Crossover Distortion
Crossover distortion happen to output signal

Class B amplifier is biased in the cutoff region.


voltage amplifier input signal must overcome the barrier voltage base-
emitter junction, VBE = 0.7 V before the output signal follows the input signal
Vo.
Crossover Distortion
• To overcome this problem, the two transistors to be apply a DC bias
voltage that is enough to overcome the VBE
• Operational amplifier is now no longer in class B real, but in class AB
• The class AB push-pull with the bias voltage divider, which aims to
eliminate crossover distortion.

Power amplifier class AB push-pull with the bias voltage divider


Example 10
Refer figure below, Give parameter: VCC = ±12V , R1 = 11 kΩ, R2 = 700 Ω,
and RL = 80 Ω.
Determine Q-point.
Solution
Consider Transistor Q1:
VEQ1
I EQ1 =
 R2  RL
VBQ1 =  VCC
R
 2 + R1
0
 0.7k  I EQ1 = = 0A
VBQ1 =   12 = 0.7V 80
 0.7k + 11.3k 
−VBQ1 + VBE1 + VEQ1 = 0 I CQ1 = I EQ1 = 0 A
VEQ1 = VBQ1 − VBE1 VCC = VCEQ1 + VEQ1
VEQ1 = 0.7 − 0.7 = 0V
VCEQ1 = VCC − VEQ1
VCEQ1 = 12 − 0 = 12V
Thermal Runaway
• VBE will change as the temperature changed.
• when the temperature increases, the VBE will be reducing, β will
increase and IC also increase.

I-V characteristic graph transistor to temperature changes


Thermal Runaway
• When IC is increased, the temperature will rise, VBE decreases and
eventually the device will be damaged.
• In other words, a class AB amplifier biasing voltage divider allow
Thermal runaway, which can cause damage to the transistor.
• To overcome this problem, the class AB amplifier biasing diode used
as below.

Power Amplifier class AB amplifier biasing diode


Power amplifier Class AB
biasing of a supply
Class AB power amplifier (one supply DC) voltage divider biasing and
diode biasing.
Load Line for Power Amplifier
Class AB
DC Load Line:
Class AB power amplifier (one supply DC) VCC = VCEQ1 + VCEQ 2
Because of Q1 and Q2 in series
I CQ1 ≈ I CQ 2
VCEQ1 = VCEQ 2

So, VCC = VCEQ1 + VCEQ1 = 2VCEQ1


V
VCEQ1 = VCEQ 2 = CC
2
Because of Q1 and Q2 biasing in cutoff:
VCC
I CQ1 = I CQ 2 = 0 I C ( sat ) =
RDC
RDC = 0Ω V
I C ( sat ) = CC = ∞
0
VCC
VCE ( cutoff ) = = VCEQ
2
Load Line for Power Amplifier
Class AB
AC Load Line:
Class AB power amplifier (one supply DC) VCEQ
As known: ic ( sat ) = I CQ +
rL
vce ( cutoff ) = VCEQ + I CQ rL

But, I CQ = 0 A and rL = RL
Hence, i VCEQ VCC
c ( sat ) = =
rL 2 RL

Cause, I CQ = 0 A
VCC
So, vce ( cutoff ) = VCEQ =
2
Example 9
Power amplifier class AB below,
given VCC = + 12 V, R1=R3=800 Ω, R2=200 Ω and RL=80 Ω

a) Sketch DC and AC Load Line


b) Determine maximum efficiency of power amplifier
a) Solution
 R2 + R3  DC Load Line:
VBQ1 =  VCC
 R1 + R2 + R3 
I CQ1 = I CQ 2 = 0
 800 + 200 
VBQ1 =   12 = 6.7V VCC
 800 + 200 + 800  I C ( sat ) = VCC
I
RDC C ( sat ) = =∞
0
VBQ1 = VBE1 + VEQ1
VCC 12
VCE ( cutoff ) = = = 6V
6.7 = 0.7 + VEQ1 2 2
VEQ1 = 6V
VCC = VCEQ1 + VEQ1
12 = VCEQ1 + 6
VCC
VCEQ1 = 12 − 6 = 6V =
2
Solution
AC Load Line:
VCEQ VCC
ic ( sat ) = =
rL 2 RL
12
ic ( sat ) = = 75mA
2(80)
VCC
vce ( cutoff ) = VCEQ =
2
12
vce ( cutoff ) = = 6V
2
Solution
2

b) Po ( ac ) = PL =
( v ) o( p )
=
62
= 0.225W
2 RL 2(80)
PDC = VCC × I CC
I CC = I C1( average ) + I1
ic ( sat ) Po ( ac )
I C1( average ) = ηmax = × 100
π Pi ( dc )
75m
I C1( average ) = = 23.87mA
π 0.225
ηmax = × 100 = 61.47%
I CC = I C ( average ) + I1
0.366
I CC = 23.87m + 6.67m = 30.54mA

PDC = (12)(30.54m ) = 0.366W


Example 10
Power amplifier class AB below,
given VCC = + 20 V, R1=R2=100 Ω, and RL=8 Ω

a) Sketch DC and AC Load Line


b) Determine maximum efficiency of power amplifier
Solution
−VCC + I1 ( R1 + R2 ) + VD1 + VD 2 = 0
VCC − VD1 − VD 2
I1 = VBQ1 = VBE1 + VEQ1
( R1 + R2 )
20 − 0.7 − 0.7 10.7 = 0.7 + VEQ1
I1 = = 93mA
100 + 100 VEQ1 = 10V
VCC = VCEQ1 + VEQ1
VCC = I1R1 + VBQ1 20 = VCEQ1 + 10
VBQ1 = VCC − I1R1 VCC
VCEQ1 = 20 − 10 = 10V =
VBQ1 = 20 − (93m)100 = 10.7V 2
DC Load Line:
Solution
VCC
I CQ1 = I CQ 2 = 0 vce ( cutoff ) = VCEQ =
2
VCC VCC 20
I C ( sat ) = I = =∞ vce ( cutoff ) = = 10V
RDC C ( sat ) 2
0
VCC 20
VCE ( cutoff ) = = = 10V
2 2

AC Load Line:

VCEQ VCC
ic ( sat ) = =
rL 2 RL
20
ic ( sat ) = = 1.25 A
2(8)
Solution
2

b) Po ( ac ) = PL =
( v ) o( p )
=
102
= 6.25W
2 RL 2(8)
PDC = VCC × I CC
I CC = I C1( average ) + I1 Po ( ac )
ic ( sat ) ηmax = × 100
I C1( average ) =
π
Pi ( dc )
1.25 6.25
I C1( average ) = = 0.4 A
π ηmax = × 100 = 63.39%
9.86
I CC = I C ( average ) + I1
I CC = 0.4 + 93m = 0.493 A

PDC = (20)(0.493) = 9.86W

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