Fast, Rail-to-Rail, Low Power, 2.5 V to 5.

5 V,
Single-Supply TTL/CMOS Comparator
Data Sheet AD8469
FEATURES GENERAL DESCRIPTION
Qualified for automotive applications The AD8469 is a fast comparator fabricated on XFCB2, an
Fully specified rail-to-rail at VCC = 2.5 V to 5.5 V Analog Devices, Inc., proprietary process. This comparator is
Input common-mode voltage: VEE − 0.2 V to VCC + 0.2 V exceptionally versatile and easy to use. Features include an input
Low glitch TTL-/CMOS-compatible output stage range from VEE − 0.2 V to VCC + 0.2 V, low noise, TTL- and
40 ns propagation delay CMOS-compatible output drivers, adjustable hysteresis control,
Low power: 1.4 mW at 2.5 V and a shutdown input. The device offers a 40 ns propagation
Shutdown pin delay driving a 15 pF load with 10 mV overdrive on 500 µA
Programmable hysteresis typical supply current.
Power supply rejection better than −50 dB
A flexible power supply scheme allows the device to operate
−40°C to +125°C operation
from a single +2.5 V positive supply with a −0.2 V to +2.7 V
APPLICATIONS input signal range up to a +5.5 V positive supply with a −0.2 V
High speed instrumentation to +5.7 V input signal range.
Clock and data signal restoration The TTL-/CMOS-compatible output stage is designed to drive
Logic level shifting or translation up to 15 pF with full rated timing specifications and to degrade
High speed line receivers in a graceful and linear fashion as additional capacitance is added.
Threshold detection The input stage of the comparator offers robust protection against
Peak and zero-crossing detectors large input overdrive, and the outputs do not phase reverse when
High speed trigger circuitry the valid input signal range is exceeded.
Pulse-width modulators
The AD8469 is available in an 8-lead MSOP package and features
Current/voltage controlled oscillators
a shutdown pin and hysteresis control. It is fully specified over
an operating temperature range of −40°C to +125°C.

FUNCTIONAL BLOCK DIAGRAM

VP NONINVERTING
INPUT
Q OUTPUT
AD8469 TTL/CMOS
Q OUTPUT
VN INVERTING
INPUT
10490-001

HYS INPUT
SDN INPUT

Figure 1.

Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
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Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2012 Analog Devices, Inc. All rights reserved.
AD8469 Data Sheet

TABLE OF CONTENTS
Features .............................................................................................. 1 Applications Information .................................................................8
Applications ....................................................................................... 1 Power/Ground Layout and Bypassing ........................................8
General Description ......................................................................... 1 TTL-/CMOS-Compatible Output Stage ....................................8
Functional Block Diagram .............................................................. 1 Optimizing Performance..............................................................8
Revision History ............................................................................... 2 Comparator Propagation Delay Dispersion ................................8
Specifications..................................................................................... 3 Comparator Hysteresis .................................................................9
Electrical Characteristics ............................................................. 3 Crossover Bias Point .....................................................................9
Absolute Maximum Ratings............................................................ 4 Minimum Input Slew Rate Requirement ................................ 10
Thermal Resistance ...................................................................... 4 Typical Applications Circuits ........................................................ 11
ESD Caution .................................................................................. 4 Outline Dimensions ....................................................................... 12
Pin Configuration and Function Descriptions ............................. 5 Ordering Guide .......................................................................... 12
Typical Performance Characteristics ............................................. 6 Automotive Products ................................................................. 12

REVISION HISTORY
1/12—Revision 0: Initial Version

Rev. 0 | Page 2 of 12
Data Sheet AD8469

SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VCC = 2.5 V, TA = −40°C to +125°C, typical values at TA = 25°C, unless otherwise noted.

Table 1.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
DC INPUT CHARACTERISTICS
Voltage Range VP, VN VCC = 2.5 V to 5.5 V −0.2 VCC + 0.2 V
Common-Mode Range VCM VCC = 2.5 V to 5.5 V −0.2 VCC + 0.2 V
Differential Voltage VCC = 2.5 V to 5.5 V VCC V
Offset Voltage VOS −5.0 ±3 +5.0 mV
Bias Current IP, IN −0.4 +0.4 µA
Offset Current −1.0 +1.0 µA
Capacitance CP, CN 1 pF
Differential Mode Resistance −0.5 V to VCC + 0.5 V 200 7000 kΩ
Common-Mode Resistance −0.5 V to VCC + 0.5 V 100 4000 kΩ
Active Gain AV 80 dB
Common-Mode Rejection Ratio CMRR VCM = −0.2 V to +2.7 V, VCC = 2.5 V 50 dB
VCM = −0.2 V to +2.7 V, VCC = 5.5 V 50 dB
Hysteresis RHYS = ∞ 0.1 mV
HYSTERESIS MODE AND TIMING
Hysteresis Mode Bias Voltage Current = 1 μA 1.145 1.25 1.35 V
Minimum Resistor Value Hysteresis = 120 mV 30 120 kΩ
SHUTDOWN PIN CHARACTERISTICS 1
Input Voltage High VIH Comparator is operating 2.0 VCC V
Input Voltage Low VIL Shutdown guaranteed −0.2 +0.4 V
Input Current High IIH VIH = VCC −6 +6 µA
Sleep Time tSD lCC < 100 µA 300 ns
Wake-Up Time tH VP = 10 mV, output valid 150 ns
DC OUTPUT CHARACTERISTICS VCC = 2.5 V
Output Voltage High VOH IOH = 0.8 mA VCC − 0.4 V
Output Voltage Low VOL IOL = 0.8 mA 0.4 V
AC PERFORMANCE 2
Rise Time/Fall Time tR/tF 10% to 90%, VCC = 2.5 V 25 to 50 ns
10% to 90%, VCC = 5.5 V 45 to 75 ns
Propagation Delay tPD VOD = 10 mV, VCC = 2.5 V 30 to 50 ns
VOD = 50 mV, VCC = 5.5 V 35 to 60 ns
Propagation Delay Skew
Rising-to-Falling Transition VCC = 2.5 V 4.5 ns
VCC = 5.5 V 8 ns
Q to Q VCC = 2.5 V 3 ns
VCC = 5.5 V 4 ns
Overdrive Dispersion 10 mV < VOD < 125 mV 12 ns
Common-Mode Dispersion −0.2 V < VCM < VCC + 0.2 V 1.5 ns
POWER SUPPLY
Supply Voltage Range VCC 2.5 5.5 V
Positive Supply Current IVCC VCC = 2.5 V 550 650 μA
VCC = 5.5 V 800 1100 μA
Power Dissipation PD VCC = 2.5 V 1.4 1.7 mW
VCC = 5.5 V 4.5 7 mW
Power Supply Rejection Ratio PSRR VCC = 2.5 V to 5.5 V −50 dB
Shutdown Current ISD VCC = 2.5 V to 5.5 V 150 260 μA
1
The output is high impedance when the device is in shutdown mode. Note that this feature must be used with care because the enable/disable time is much longer
than with a true tristate output.
2
VIN = 100 mV square input at 1 MHz, VCM = 0 V, CL = 15 pF, VCC = 2.5 V, unless otherwise noted.

Rev. 0 | Page 3 of 12
AD8469 Data Sheet

ABSOLUTE MAXIMUM RATINGS

Table 2. THERMAL RESISTANCE
Parameter Rating θJA is specified for the worst-case conditions, that is, a device
Supply Voltages, VCC and VEE soldered in a circuit board for surface-mount packages.
VCC to Ground −0.5 V to +6.0 V
Table 3.
Differential Supply Voltage −6.0 V to +6.0 V
Analog Inputs, VP and VN Package Type θJA1 Unit
Input Voltage −0.5 V to VCC + 0.5 V 8-Lead MSOP (RM-8) 130 °C/W
Differential Input Voltage ±(VCC + 0.5 V) 1
Measurement in still air.
Maximum Input/Output Current ±50 mA
Shutdown Pin, SDN ESD CAUTION
Applied Voltage (SDN to Ground) −0.5 V to VCC + 0.5 V
Maximum Input/Output Current ±50 mA
Hysteresis Control Pin, HYS
Applied Voltage (HYS to Ground) −0.5 V to VCC + 0.5 V
Maximum Input/Output Current ±50 mA
Output Current, Q and Q ±50 mA
Operating Temperature
Ambient Temperature Range −40°C to +125°C
Junction Temperature 150°C

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

Rev. 0 | Page 4 of 12
Data Sheet AD8469

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

VCC 1 8 Q
VP 2 AD8469 7 Q
TOP VIEW
VN 3 (Not to Scale) 6 VEE

10490-002
SDN 4 5 HYS

Figure 2. Pin Configuration

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description
1 VCC Positive Supply Voltage.
2 VP Noninverting Analog Input.
3 VN Inverting Analog Input.
4 SDN Shutdown. Drive this pin low to shut down the device.
5 HYS Hysteresis Control. Bias this pin with a resistor or current source for hysteresis.
6 VEE Negative Supply Voltage.
7 Q Noninverting Output. In compare mode, Q is at logic high if the analog voltage at the noninverting input (VP)
is greater than the analog voltage at the inverting input (VN).
8 Q Inverting Output. In compare mode, Q is at logic low if the analog voltage at the noninverting input (VP) is
greater than the analog voltage at the inverting input (VN).

Rev. 0 | Page 5 of 12
AD8469 Data Sheet

TYPICAL PERFORMANCE CHARACTERISTICS

VCC = 2.5 V, TA = 25°C, unless otherwise noted.
400 160
150
300 140
130
200 120
HYS PIN CURRENT (µA)

VCC = 2.5V VCC = 5.5V 110

HYSTERESIS (mV)
100 100
90
0 80
70
–100 60
50 VCC = 2.5V
–200 40
30
–300 20 VCC = 5.5V
10
–400
10490-003
0

10490-006
–1 0 1 2 3 4 5 6 7 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300
HYS PIN VOLTAGE (V) HYS RESISTOR (kΩ)

Figure 3. HYS Pin Current vs. Voltage, VCC = 2.5 V and 5.5 V Figure 6. Hysteresis vs. HYS Resistor, VCC = 2.5 V and 5.5 V

5 1.5
VCC = 2.5V
4 SOURCE

3 1.0
SINK
2
LOAD CURRENT (mA)
BIAS CURRENT (µA)

1 0.5

–1 0

–2
+125°C
–3 –0.5
+25°C
–4
–40°C
–5 –1.0
10490-004

10490-007
–1.0 –0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 –1.0 –0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
COMMON-MODE VOLTAGE (V) OUTPUT VOLTAGE (V)

Figure 4. Input Bias Current vs. Input Common-Mode Voltage, VCC = 2.5 V Figure 7. Load Current vs. Output Voltage

60 38.0

37.8
55
37.6 FALL DELAY
PROPAGATION DELAY (ns)

PROPAGATION DELAY (ns)

50
37.4
45
37.2
VCC = 5.5V
40 RISE DELAY 37.0
RISE DELAY
36.8
35 VCC = 5.5V
FALL DELAY 36.6
30 VCC = 2.5V
FALL DELAY 36.4
25 VCC = 2.5V 36.2
RISE DELAY VCC = 2.5V
20 36.0
10490-005

10490-008

0 50 100 150 0.5 1.0 1.5 2.0 2.5 3.0

OVERDRIVE (mV) COMMON-MODE VOLTAGE (V)

Figure 5. Propagation Delay vs. Input Overdrive, VCC = 2.5 V and 5.5 V Figure 8. Propagation Delay vs. Input Common-Mode Voltage, VCC = 2.5 V

Rev. 0 | Page 6 of 12
Data Sheet AD8469

Q
Q

Q
Q

10490-009

10490-010
0.5V/DIV 10ns/DIV 1V/DIV 10ns/DIV

Figure 9. 1 MHz Output Voltage Waveform, VCC = 2.5 V Figure 10. 1 MHz Output Voltage Waveform, VCC = 5.5 V

Rev. 0 | Page 7 of 12
AD8469 Data Sheet

APPLICATIONS INFORMATION
POWER/GROUND LAYOUT AND BYPASSING VLOGIC

The AD8469 comparator is a high speed device. Despite the

low noise output stage, it is essential to use proper high speed A1 Q1

design techniques to achieve the specified performance. Because

comparators are uncompensated amplifiers, feedback in any
phase relationship is likely to cause oscillations or undesired +IN OUTPUT
hysteresis. Of critical importance is the use of low impedance AV
–IN
supply planes, particularly the output supply plane (VCC) and
the ground plane. Separate supply planes are recommended
as part of a multilayer board. Providing the lowest inductance
A2 Q2
return path for switching currents ensures the best possible
performance in the target application.

10490-011
GAIN STAGE OUTPUT STAGE
It is also important to adequately bypass the input and output
Figure 11. Simplified Schematic Diagram of
supplies. Place a 0.1 μF bypass capacitor as close as possible to
TTL-/CMOS-Compatible Output Stage
each supply pin. The capacitors should be connected to the
ground plane with redundant vias placed to provide a physically OPTIMIZING PERFORMANCE
short return path for output currents flowing back from ground As with any high speed comparator, proper design and layout
to the VCC pin. Use high frequency bypass capacitors for mini- techniques are essential to obtain the specified performance. Stray
mum inductance and effective series resistance (ESR). Parasitic capacitance, inductance, common power and ground impedances,
layout inductance should also be strictly controlled to maximize or other layout issues can severely limit performance and often
the effectiveness of the bypass at high frequencies. cause oscillation. Source impedance should be minimized as
TTL-/CMOS-COMPATIBLE OUTPUT STAGE much as possible. High source impedance, in combination with
the parasitic input capacitance of the comparator, causes an unde-
To achieve the specified propagation delay performance, keep
sirable degradation in bandwidth at the input, therefore degrading
the capacitive load at or below the specified maximum value.
the overall response. Higher impedances encourage undesired
The outputs of the AD8469 are designed to directly drive one
coupling.
Schottky TTL or three low power Schottky TTL loads (or
equivalent). For large fan outputs, buses, or transmission lines, COMPARATOR PROPAGATION DELAY DISPERSION
use an appropriate buffer to maintain the excellent speed and The AD8469 comparator is designed to reduce propagation delay
stability of the comparator. dispersion over a wide input overdrive range of 10 mV to VCC − 1 V.
With the rated 15 pF load capacitance applied, more than half Propagation delay dispersion is the variation in propagation delay
of the total device propagation delay is output stage slew time. that results from a change in the degree of overdrive or slew rate—
For this reason, the total propagation delay decreases as VCC that is, how far or how fast the input signal exceeds the switching
decreases, and instability in the power supply may appear as threshold (see Figure 12 and Figure 13).
excess delay dispersion. The propagation delay dispersion specification becomes important
Delay is measured to the 50% point of the supply that is in use; in high speed, time critical applications, such as data communica-
therefore, the fastest times are observed with the VCC supply at tion, automatic test and measurement, and instrumentation. It is
2.5 V, and larger delay values are observed when driving loads also important in event driven applications, such as pulse spectros-
that switch at other levels. copy, nuclear instrumentation, and medical imaging. Dispersion is
the variation in propagation delay as the input overdrive conditions
Overdrive and input slew rate dispersions are not significantly
are changed (see Figure 12).
affected by output loading and VCC variations.
The propagation delay dispersion of the AD8469 is typically <12 ns
A simplified schematic diagram of the TTL-/CMOS-compatible
as the overdrive varies from 10 mV to 125 mV. This specification
output stage is shown in Figure 11. Because of its inherent sym-
applies to both positive and negative signals because the device has
metry and generally good behavior, this output stage is readily
very closely matched delays for both positive-going and negative-
adaptable for driving various filters and other unusual loads.
going inputs, and very low output skews. Note that for repeatable
dispersion measurements the actual device offset is added to the
overdrive.

Rev. 0 | Page 8 of 12
Data Sheet AD8469
500mV OVERDRIVE
The customary technique for introducing hysteresis into a
comparator uses positive feedback from the output back to the
INPUT VOLTAGE input. One limitation of this approach is that the amount of
10mV OVERDRIVE
hysteresis varies with the output logic level, resulting in hysteresis
that is not symmetric about the threshold. The external feedback
VN ± VOS
network can also introduce significant parasitics that reduce high
speed performance and can even induce oscillation in some cases.
The AD8469 comparator offers a programmable hysteresis

10490-012
DISPERSION

Q/Q OUTPUT
feature that significantly improves accuracy and stability. By
connecting an external pull-down resistor or current source
Figure 12. Propagation Delay—Overdrive Dispersion
from the HYS pin to ground, the user can vary the amount of
hysteresis in a predictable, stable manner. Leaving the HYS pin
INPUT VOLTAGE disconnected or driving it high removes the hysteresis. The
1V/ns maximum hysteresis that can be applied using the HYS pin is
approximately 160 mV. Figure 15 illustrates the amount of
VN ± VOS
10V/ns hysteresis applied as a function of the external resistor value.
160
150
140
130
120
10490-013

DISPERSION
110

HYSTERESIS (mV)
Q/Q OUTPUT
100
Figure 13. Propagation Delay—Slew Rate Dispersion 90
80
COMPARATOR HYSTERESIS 70
60
The addition of hysteresis to a comparator is often desirable in 50 VCC = 2.5V
noisy environments or when the differential input amplitudes 40
30
are relatively small or slow moving. The transfer function for a 20 VCC = 5.5V
comparator with hysteresis is shown in Figure 14. 10
0

10490-019
0 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300
OUTPUT
HYS RESISTOR (kΩ)

Figure 15. Hysteresis vs. HYS Resistor

VOH
The HYS pin appears as a 1.25 V bias voltage seen through a
series resistance of 7 kΩ ± 20% throughout the hysteresis control
range. The advantages of applying hysteresis in this manner are
VOL
improved accuracy, improved stability, reduced component
count, and maximum versatility. An external bypass capacitor is
not recommended on the HYS pin because it impairs the latch
function and often degrades the jitter performance of the device.
10490-014

0.0V INPUT
–VH +VH When the HYS pin is driven low, hysteresis may become large,
2 2
but in this device, the effect is not reliable or intended as a latch
Figure 14. Comparator Hysteresis Transfer Function
function.
As the input voltage approaches the threshold (0.0 V in Figure 14)
CROSSOVER BIAS POINT
from below the threshold region in a positive direction, the com-
parator switches from low to high when the input crosses +VH/2. Rail-to-rail inputs in both op amps and comparators have a dual
The new switching threshold becomes −VH/2. The comparator front-end design. Certain devices are active near the VCC rail, and
remains in the high state until the threshold, −VH/2, is crossed others are active near the VEE rail. At some predetermined point
from below the threshold region in a negative direction. In this in the common-mode range, a crossover occurs. At the crossover
way, noise or feedback output signals centered on the 0.0 V input point (normally VCC/2), the direction of the bias current is reversed
cannot cause the comparator to switch states unless they exceed and there are changes in measured offset voltages and currents.
the region bounded by ±VH/2. The AD8469 elaborates slightly on this scheme. The crossover
points are at approximately 0.8 V and 1.6 V.

Rev. 0 | Page 9 of 12
AD8469 Data Sheet
MINIMUM INPUT SLEW RATE REQUIREMENT With additional capacitive loading or poor bypassing, oscillation
With the rated load capacitance and normal good PCB design may be encountered. These oscillations are due to the high gain
(see the Power/Ground Layout and Bypassing section), the bandwidth of the comparator in combination with feedback
AD8469 comparator should be stable at any input slew rate with through parasitics in the package and PCB. In many applications,
no hysteresis. Broadband noise from the input stage is observed chatter is not harmful.
in place of the excessive chatter that is seen with most other high
speed comparators.

Rev. 0 | Page 10 of 12
Data Sheet AD8469

TYPICAL APPLICATIONS CIRCUITS

5V

10kΩ

82pF AD8469 OUTPUT

HYS

CONTROL 10kΩ

10490-016
VOLTAGE
0V TO 2.5V 150kΩ 150kΩ

Figure 16. Voltage Controlled Oscillator

5V

10kΩ
INPUT +
AD8469 0.02µF OUTPUT
VREF –
10kΩ
0.1µF
HYS

10490-017
Figure 17. Duty Cycle to Differential Voltage Converter

2.5V

CMOS
AD8469 PWM
OUTPUT
INPUT
1.25V ± 50mV

VREF INPUT
1.25V 10kΩ
10kΩ

ADCMP601

10kΩ 82pF HYS

100kΩ
10490-018

Figure 18. Oscillator and Pulse-Width Modulator

Rev. 0 | Page 11 of 12
AD8469 Data Sheet

OUTLINE DIMENSIONS
3.20
3.00
2.80

8 5 5.15
3.20 4.90
3.00 4.65
2.80 1
4

PIN 1
IDENTIFIER

0.65 BSC

0.95 15° MAX

0.85 1.10 MAX
0.75
0.80
0.15 6° 0.23
0.40 0.55
0.05 0° 0.09 0.40
COPLANARITY 0.25

10-07-2009-B
0.10

COMPLIANT TO JEDEC STANDARDS MO-187-AA

Figure 19. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)
Dimensions shown in millimeters

ORDERING GUIDE
Model 1, 2 Temperature Range Package Description Package Option Branding
AD8469WBRMZ −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 Y4F
AD8469WBRMZ-RL −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 Y4F
1
Z = RoHS Compliant Part.
2
W = Qualified for Automotive Applications.

AUTOMOTIVE PRODUCTS
The AD8469W models are available with controlled manufacturing to support the quality and reliability requirements of automotive
applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers
should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in
automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to
obtain the specific Automotive Reliability reports for these models.

©2012 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.
D10490-0-1/12(0)

Rev. 0 | Page 12 of 12