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Lab Report 1

The students designed and built a full adder circuit using logic gates. They constructed the circuit using IC chips for AND, OR, and XOR gates. However, the circuit did not produce the correct truth table outputs for a full adder. After checking connections, the students determined the IC chips were faulty and the objective of verifying the full adder truth table was not able to be completed.

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Zani Phiri
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26 views

Lab Report 1

The students designed and built a full adder circuit using logic gates. They constructed the circuit using IC chips for AND, OR, and XOR gates. However, the circuit did not produce the correct truth table outputs for a full adder. After checking connections, the students determined the IC chips were faulty and the objective of verifying the full adder truth table was not able to be completed.

Uploaded by

Zani Phiri
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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The University Of Zambia in Conjunction with the Zambia ICT College

Bachelor of Engineering in Electrical Electronics

Level 3

Lab Report 1- Full Adder.

Student Name Student ID


Binali Sakala 2010588
Soka Phiri 1822503
Joe Katoka 1822500
Chibale Osward C 1913939
Tanthew Mpambanya 2010571
1. Introduction

In this lab, the students designed a simple digital circuit called a full adder. The students then use
logic gates to draw a schematic for the circuit. Finally, they verified the correctness of the Full Adder
truth table.

1.2 Background

An adder is a combinational circuit that performs calculations by adding one binary bit to
another. A full adder accepts inputs A and B plus a carry-in (Cin) giving
outputs S and Cout. Once we have a full adder, then we can string eight of them together to
create a byte-wide adder and cascade the carry bit from one adder to the next. The truth table
and the circuit diagram for a full-adder
is shown in the figures below. If you look at the S bit, it is 1 if an odd number of the three
inputs is
one, i.e., S is the XOR of the three inputs. The full adder can be realized as shown below.
Notice that the full adder can be constructed from two half adders and an OR gate.
Cin A B S Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Figure shows the truth table of a full adder.

U1:A
1 U1:B
A 0 3 4
2 6 S
?
5
B 0 7486
7486

CIN 0

U2

AND U4

? COUT

OR

U3

AND

Figure showing the circuit diagram for a Full Adder.


2. Methods

2.1 Equipment

1 Assembly desk

3 Modules IC-D14

1 Module IC-D6

1 Module IC-D4

1 Ns 7486

1 Ns 7432

1 Ns 7408

1 +5 Volts D.C. source

2.2 Procedure

(i) The modules were placed on the assembly.

(ii) The students then reviewed the data sheets of the IC’s SN 7408, SN 7486 and SN 7432
respectively.

(iii) The SN 7408, SN 7486 and SN 7432 were each fixed into the sockets on a modules.

The students then connected the circuit as guided by the lab manual

2.3 Results

The findings of this lab experiment are as displayed in the truth table below.

Cin A B S Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 1 0
1 1 1 1 0

The circuit didn’t give the intended results. The students then decided to rewire the circuit for to
check for and wrong connections or loose connections. Even after that, the circuit still didn’t give the
intended result. This led to the conclusion that the IC’s were not in good working condition.
Conclusion

The results led to the conclusion that the IC’s were not in good working condition.

The objective of the lab experiment was inconclusive due to this.

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