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Introduction To Mems EA C415: Dr. N.N. Sharma

This document discusses microfabrication processes used to construct MEMS and electronics devices on silicon wafer substrates. It begins by explaining how silicon is obtained from sand and purified into electronic-grade silicon ingots and wafers. The Czochralski and float zone methods for growing silicon single crystal boules from melted silicon are described. Various wafer cleaning, grinding, polishing and dicing steps are outlined. Common materials used in microfabrication like silicon dioxide, silicon carbide, silicon nitride and polysilicon are introduced. The next lecture will cover wafer-level processes.

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Arjit Goswami
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103 views33 pages

Introduction To Mems EA C415: Dr. N.N. Sharma

This document discusses microfabrication processes used to construct MEMS and electronics devices on silicon wafer substrates. It begins by explaining how silicon is obtained from sand and purified into electronic-grade silicon ingots and wafers. The Czochralski and float zone methods for growing silicon single crystal boules from melted silicon are described. Various wafer cleaning, grinding, polishing and dicing steps are outlined. Common materials used in microfabrication like silicon dioxide, silicon carbide, silicon nitride and polysilicon are introduced. The next lecture will cover wafer-level processes.

Uploaded by

Arjit Goswami
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We take content rights seriously. If you suspect this is your content, claim it here.
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INTRODUCTION TO MEMS

EA C415

Dr. N.N. SHARMA

LECTURE 6-8
MICROFABRICATION

It is about constructing the electronics


device and MEMS components on substrates
that are in form of initially flat Wafers

Objective is to find process sequence


(PROCESS MODEL) that creates the desired
structure in an accurate and manufacturable
manner and at an acceptable cost
MICROFABRICATION

This scanning-electron-microscope (SEM) picture shows an


array of indium bumps on 8-µm centers. Each indium bump is
approximately 4 µm at the base. A human hair has been placed
on the array for comparison.
MICROFABRICATION
MICROFABRICATION
MICROFAB STEPS
Cleaning
 Sand to Wafer Oxidation
Wafer Level Process Diffusion Ion Implantation
Drive-in-diffusion
Deposition
Etching
Physical Vapor/Chemical Vapor/ Wet
Spin Casting/Sol-gel deposition
Isotropic/
Anisotropic
Pattern Transfer (Lithography)
Dry
Micromachining Vapor based/Plasma
assisted/RIE (DRIE)
BULK SURFACE LIGA
MICROFABRICATION
 SAND TO WAFER
 Silicon is abundant (25.7% of Earth crust)
Refining starts with Quartzite sand (SiO2)
 Sand to MGS (Metallurgical grade silicon: Purity 98%)
SiO2 + SiC + Heat (2000°C)  Si + SiO + CO
 MGS to EGS (Electronic grade Silicon: Purity 2 ppb)
Si + HCL (ground and Mixed)  SiHCL/SiH4 (Silane)
SiHCL3/SiH2CL2/SiH3CL
NOTE: SiHCL3 is Liquid which is fractionally distilled in Vapor
deposition chamber to get EGS
MICROFABRICATION
 SAND TO WAFER
Czockralski Method (CZ Method)
EGS to WAFER

Float Zone Method (FZ Method)

CZOCKRALSKI METHOD
 Converts EGS to single crystal silicon wafers
Oldest method since 1920’s with very little alteration
 Higher rate of production
 Higher impurities (draw back)
Adopted from Mitsubishi Materials
CZOCKRALSKI METHOD

Polysilicon rod is broken into pieces


Put in crucible maintained at temperature above
1417C (Silicon melting point)
Charge of 100 kg in 50 cm dia. crucible
produces 1 m. long 20 cm dia. Boule
Small seed crystal with pre-selected orientation
is inserted
Seed is gradually pulled out, while crucible and
rod containing seed are rotated
CZOCKRALSKI METHOD

Silicon atom form the melt bond to the


seed atom, lattice plane by plane
Large dia wafer can be obtained
Rate of pull and thermo-mechanics decides
the dia of boule
CZ wafers have higher amount of chemical
impurities
Heat Balance in CZ Method

•Zone 1: Isotherm just inside the liquid


•Zone 2: Isotherm just inside the solid
•Zone 3: freezing zone (heat of fusion removed)

L(dm/dt) + kL (dT/dx1)A1 = ks(dT/dx2)A2


Neglect middle term (we obtain an upper bound on pull rate)

dm/dt = Vp AN
Or Vpmax = ks/LN (dT/dx2)
Heat Balance in CZ Method

dQ = (2r dx) ( T exp 4)


But Q = ks (r2) dT/dx
Or dQ/dx = ks (r2) d2T/dx2 + (r2) dT/dx dks/dx
Neglecting second term we have
d2T/dx2 = 2 T exp 4/ ks r
Also
ks = km Tm/T
Substituting and solving the differential equation
for dT/dx , we have

Relation between Pull Rate and Diameter of Boule (Plummer


2000):
CZOCKRALSKI METHOD
Pull Rate and Diameter of Boule (Plummer 2000):

2 K M TM
5
1
V p max 
LN 3r

V p max  max. crystal pull rate; r  radius of the boule

  Stefan Boltzman constant;   Emissivity of silicon

L  Latent heat of fusion; N  Density of silicon

K M  Thermal conductivity at melting point;TM  M elting point of silicon


CZOCKRALSKI METHOD
Pull Rate and Diameter of Boule (Plummer 2000):

2 K M TM
5
1
V p max 
LN 3r

V p max  max. crystal pull rate; r  radius of the boule

  Stefan Boltzman constant;   Emissivity of silicon

L  Latent heat of fusion; N  Density of silicon

K M  Thermal conductivity at melting point;TM  M elting point of silicon


CZOCKRALSKI METHOD
#Ex. Calculate the maximum pull rate for a 6 inch CZ crystal.

2 K M TM
5
1
V p max 
LN 3r

 
2  5.67  10 5 erg/cm 2 sec K 4 
0.550.048 cal/sec cm K 16905 

1 2.39  10 8

cal/erg
V p max

430 cal/gm  2.328 gm/cm 3  3  7.62 cm

 0.00656 cm/sec
 23.6 cm/hr
FLOAT ZONE METHOD
 No crucible used

Reduced impurity levels


Small dia wafer are obtained
 Rod of polysilicon (EGS) is clamped at both ends
with bottom in contact to single crystal seed
RF coil provides I 2R heating and local melting
takes place
Melting is initiated in a zone at seed end and slowly
moved up
Single crystal rod is formed thus.
TREATMENT TO BOULE
Grinding with diamond wheel on lathe like m/c for
uniform dia
Saw cut with 400 m thick diamond wheels
Mechanical lapping with Al2O3 mixed in pressurized
water and glycerin to remove taper
 Flatness obtained is  2 m
Flat wafers loaded as cassettes and rinsed in HNO3 +
HF and acetic acid to remove surface damaged layers
Chemical mechanical polishing under 20 psi pressure;
wafers are rotated in polishing m/c in a slurry of 10 nm
fine SiO2 particles in aqueous solution of NaOH (MIRROR FINISH)
WAFER CLEANING FOR MEMS & ELECTRONICS

NOTE: Standard set of Wafer cleaning steps called as RCA clean.

Step 1: Remove all organic coatings in a strong oxidant (7:3


mix. of H2SO4 & H2O2 also known as Pirhana)
Step 2: Remove organic residue (5:1:1 mix. of H2O, H2O2 and
NH4OH)
Step 3: Above two steps may grow an oxide layer/remove
oxide using dilute HF (step is omitted when oxide layer is
desired)
Step 4: Remove ionic contaminants (6:1:1 mix. of H2O, H2O2
and HCL)
RCA clean must be performed before every high temp. step
like oxidation diffusion or thin film deposition
SILICON CRYSTALLOGRAPHY

BECAUSE OF ASSYMETRICAL AND NON-UNIFORM


PLANAR ATOMIC DENSITIES, SINGLE CRYSTAL
SILICON EXHIBIT ANISOTROPIC THERMOPHYSICAL
AND MECHANICAL PROPERTIES

100 110 111


SILICON CRYSTALLOGRAPHY

Lattice distance between adjacent atoms are


shortest for 111 plane
Atomic forces between atoms are stronger in
this plane therefore
Also 111 plane contains three of the four center
atoms
Therefore growth and etching on 111 plane is
difficult
MOS technology uses 100 wafers because of the low defect density
that can be achieved in Si + SiO2 interface
BJT technology used 111 wafers by convention/now also using 100
wafers
SiO2
 thermal & electrical insulator
Used as mask in etching of silicon substrate
Used as sacrificial layer in surface micromachining
SiO2 has greater resistance to most etchants than Si
Preparation Si + O2  SiO2 (dry); Si + H2O  SiO2 + 2H2 (Wet)

SiC
 high dimensional and chemical stability high temperature
Strong resistance to oxidation even at high temperature
Deposited (thin film) on MEMS components to protect from
extreme temperature
Used as protective/passivation layer
Preparation By product in CZ method
Si3N4 Excellent barrier to diffusion of H2O & ions
Ultra strong resistance to oxidation
Used as masks in deep etching
Preparation 3SiCl2H2 + 4NH3  Si3N4 + 6HCl +6H2

Polysilicon deposited onto Silicon substrate by CVD at


600C
Isotropic properties
Performance as regards carrier mobility is poor
in comparison to single crystal silicon/more
defects in comparison to SCS
GaAs excellent material for monolithic integration of
electronics & Photonic devices/mobility of
electrons seven times higher than silicon/low
yield stress (1/3 of silicon)
NEXT LECTURE

WAFER LEVEL PROCESSES

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