HVDC Control Multitask PDF
HVDC Control Multitask PDF
a r t i c l e i n f o a b s t r a c t
Article history: A robust control strategy for a VSC–HVDC transmission scheme between two ac networks is presented.
Received 27 July 2011 The VSC converters at both ends of the dc line are equipped with a multi-task controller that facilitates:
Accepted 2 May 2013 power management between the two ac systems, provision of independent reactive power control at the
point of common couplings (PCCs) and frequency regulation at the sending-end side. The paper investi-
gate the utilization of VSC–HVDC system to provide frequency regulation to an ac network; this is useful
Keywords: for networks with high penetration of renewables (e.g. wind), and nuclear generation. The proposed con-
Fault-Ride Through capability
trol strategies for the VSCs are presented in detail, investigating further the tuning method for the proper
Power management
Frequency control
operation of the inner controllers. The robustness of the control system is tested under large distur-
Pulse width modulation bances. The study is conducted in Matlab/Simulink and results that substantiate the dynamic perfor-
Reactive power compensation mance of the VSC–HVDC with the proposed control are thoroughly discussed.
Ó 2013 Published by Elsevier Ltd.
⇑ Corresponding author. Address: School of Electrical and Nuclear Engineering, where R1 = RT1 + RF1 and L1 = LT1 + LF1.
University of Science and Technology, 61th Avenue, Eastern Diems, PO Box 72, To simplify the design of the control system, the three-phase
Khartoum, Sudan. Tel.: +00249 121 077 716. quantities are expressed in the dq reference frame using the Park
E-mail address: [email protected] (O.A. Giddani). transformation matrix given in Eq. (2) as:
dc link
ac network1
ac network2
C C
B1 B2
T3 T1 SR1 SR2 T2
TL
SG1 SG2
C C
K pi
s þ KK ii 3
L1 pi pðtÞ ¼ v sd ðtÞ isd ðtÞ ð16Þ
GðsÞ ¼ ðR1 þK pi Þ
ð13Þ 2
K ii
s2 þ L1
s þ L1
Hence, the dq current reference values are:
From the current characteristic Eq. (13) [14], the proportional and
integral gains of the current controller are defined as follow [15]:
2P
kpi ¼ 2fxn L1 R1 isd ¼ ð17Þ
3v sd
ð14aÞ
kii ¼ x2n L1
In the dc and ac voltage controllers, the measured dc and ac volt-
where, xn and f are the natural frequency and damping factor,
ages are compared with the reference voltages, the error signals
respectively. These values must be selected carefully to ensure sta-
are processed by PI controllers to generate the d-axis and q-axis ref-
ble operation over the full operating range.
erence currents ðisd & isq Þ. The mathematical equations of the dc
The operation mode of the converters is chosen such that VSC2
and ac voltage controllers to generate the dq-references currents
controls the dc voltage and the ac voltage at B2, whilst VSC1 con-
are:
trols the active power and the ac voltage at B1.
Z
3.1. Active power, dc and ac voltage controllers isd ¼ kpdc ðV dc V dc Þ þ kidc ðV dc V dc Þdt ð18Þ
Z
The instantaneous active and reactive power delivered to the
isq ¼ kpac ðV ac V ac Þ þ kiac ðV ac V ac Þdt ð19Þ
point of common coupling (PCC), in the dq frame are given as:
3
pðtÞ ¼ ½v sd ðtÞ isd ðtÞ þ v sq ðtÞ isq ðtÞ where kpdc, kidc, kpac, kiac are the proportional and integral gains of
2 ð15aÞ the dc voltage controller and the ac voltage controller, respectively.
3
qðtÞ ¼ ½v sd ðtÞ isq ðtÞ þ v sq ðtÞ isd ðtÞ The feed-forward term in Eq. (18) is neglected in this paper due to
2 its slow dynamics compared to the inner current control loop. The
For balanced steady-state operation vsq = 0, therefore Eq. (15) can be complete control system (including inner and outer controllers)
expressed as [13]: for the sending and receiving ends VSCs is shown in Fig. 2.
(a)
(b)
Fig. 2. Schematic control system of the VSC–HVDC system: (a) sending-end converter control system; (b) receiving-end converter control system).
O.A. Giddani et al. / Electrical Power and Energy Systems 53 (2013) 684–690 687
4. Power management and reactive power provision The active power flow change at B1 and B2 is shown in Fig. 3a and b.
As expected, the phase angles of the VSC converters change to en-
The active and the reactive power flow between the VSC and the able the converters to control the active power flow between the
ac system can be expressed as [16,17]: converters and the ac networks as shown in Fig. 3. The voltages at
B1 and B2 are maintained constant regardless of the change in the
V c V s sinðdÞ
P¼ ð20Þ power level. The ac voltage controllers control the reactive power
Xt exchange between the converters and the buses to keep the voltage
V c V s cosðdÞ V 2c profile constant as shown in Fig. 3d. Notice that the reactive power
Q¼ ð21Þ
Xt Xt changes together with the active power as shown in Fig. 3a and b.
The STATCOM functionality of the VSCs is assessed by switching
From Eqs. (20) and (21), it can be seen that:
the dc transmission system to sleep mode (in Fig. 3a the power is
switched to zero between t = 2.25 s and t = 3.0 s).
The active power flow is controlled by the phase angle D. If D (0,
then the active power flows from the converter to the ac system 5. VSC–HVDC control to provide network frequency support
otherwise the power flow is in the opposite direction.
The capability of the VSC–HVDC to control the power flow is
The reactive power flow is controlled by the ac source voltage valuable during load demand changes in the ac networks. Any
vs, and the VSC converter voltage Vc. The converter generates reac-
tive power if Vc > Vs and consumes it for Vc < Vs.
change in the network load will result in acceleration or decelera- difference will generate the correction signal in order to stabilize
tion of the generation units to maintain power balance and to the system frequency. This correction factor Di is added to id1 old
stabilize the network frequency. which is obtained from the active power set-point to obtain a
VSC–HVDC transmission systems can be used to participate in new reference current id1 new that incorporates the effect of any ac-
frequency regulation together with conventional generation units. tive power mismatch DPL. The maximum value for the correction
The dynamic response of the dc system during a load change is factor is set such that the converter station VSC1 can increase or de-
described by: crease its output power at any time by ±20% of the converter rating
without exceeding its current limit.
dDx Fig. 5 shows the simulation results obtained during system
2Hc ¼ DPdc DPL ð22Þ
dt over/and under frequency events initiated by the loss or addition
where Dx is the frequency deviation, DPdc is the change on the dc of (60 + j25) MVA load at time t = 5 s in the sending-end network.
transmitted power, DPL is the load change, and Hc is the effective dc It can be observed that the converter station VSC1 and the synchro-
inertia constant, defined as [7]: nous machine SG1 adjust their output powers to stabilize the net-
work frequency during the loss or addition of load at ac network 1,
Total ac system inertia as shown in Fig. 5b and c. Also, it can be noticed that VSC1 has
Hc ¼ ð23Þ
MW rating of the dc system responded much faster than SG1 by providing most of the power
required to stabilize the frequency during the first transient period
A PI frequency controller could be included within the active power
after the load change, due to its small inertia ð12 CV2dc =S ¼ 38msÞ
controller to enable the VSC–HVDC system to respond to frequency
compared to that of SG1 with H = 4.25 s.
fluctuations in the ac1 network frequency (Fig. 4). The frequency
Fig. 5a shows the ac network frequency of the ac network 1 dur-
controller is based on the active power-frequency characteristics gi-
ing sudden loss/ and addition of load into ac network 1. The partic-
ven in [7] which are represented by a linear equation as
ipation of the VSC–HVDC in frequency support is very useful,
f ¼ f0 þ KðP P0 Þ. The correction signal of the frequency controller
especially in networks high penetration of wind and nuclear power
is derived as:
generation (as nuclear is preferred to be operated at constant out-
Z
put power). Fig. 5d shows the frequency of ac network 1 during a
Di ¼ kpf ðf f Þ þ kif ðf f Þdt ð24Þ
sudden load change with/and without the frequency controller
implemented in the VSC. It can be observed that with the fre-
where, kpf and kif are the proportional and integral gains of the quency controller in operation, the time required for the frequency
frequency controller. The VSC1 converter senses the network to recover to its pre-disturbance value is shorter and with a lower
frequency and compares it with the nominal frequency, any overshoot than without the frequency controller.
Fig. 5. Key simulation results demonstrate frequency support at sending end side during over and under frequency.
O.A. Giddani et al. / Electrical Power and Energy Systems 53 (2013) 684–690 689
Fig. 6. Key simulation demonstrates the transient behaviour of the VSC–HVDC during three-phase fault at B2.
6. System behavior during an AC fault at the receiving end This operation complies with Grid Codes requirements, which state
that the voltage must recover to 90% after fault clearance within
If a short circuit occurs somewhere in the ac grid, the fault may less than 0.5 s.
extend across the system until the fault is terminated by circuit The dc link voltage of the receiving-end converter (VSC2) has in-
breakers. In this investigation, a VSC–HVDC is used to improve the creased during the fault to compensate for adjustment of the load
Fault Ride-Through capability of the ac system during abnormal angle between the voltage Vs at the receiving-end bus and the volt-
conditions by isolating the two systems. To demonstrate the tran- age at converter terminals VC. The dc capacitor tries to maintain the
sient behaviour of the VSC–HVDC during abnormal disturbances, dc link voltage during the fault and this leads to oscillations in the
the test system in Fig. 1 is subjected to a three-phase fault at bus active power as shown in Fig. 6b. The active power at the sending-
B2, at t = 0.6 s with duration of 100 ms (5 cycles). Fig. 6 shows the end converter (VSC1), which is less sensitive to the fault at the receiv-
key waveforms obtained from this case. The voltage at ing end, reduces to zero during the fault by blocking the dc convert-
the sending-end (bus B1) is less sensitive to the ac fault than at the ers (Fig. 6b) to prevent the excessive increase in the dc voltage and
receiving-end (bus B2) as illustrated in Fig. 6a. This reflects that the active power at the receiving end after the clearance of the fault.
the VSC–HVDC link actually manages to improve the ac ride through
capability of the sending-end by completely isolating it from
the receiving end (decoupled operation). The converters need to 7. Conclusions
be blocked during ac system faults to protect the IGBT switches from
excessive over-currents. In the test system the dc voltage increase This paper presented the design and modelling of a VSC–HVDC
during the fault is acceptable and not dangerous to the converter transmission system multi-tasking controllers that are able to reg-
equipment, hence a chopper was not used in the DC link circuit to ulate ac current, active power, dc link voltage, ac voltage and ac
prevent the excessive increase in the dc link voltage during the ac network frequency. The proposed multi-tasking control approach
fault. of the HVDC systems can be used as the main provider for fre-
The ac voltage at the receiving-end bus collapses during the quency support in ac networks highly populated by nuclear and
fault and recovers to the pre-fault value after fault clearance. The other renewable power plants. The proposed multi-tasking con-
ac voltage and power after fault removal recover to a value greater trollers can be extended to regulate ac frequency in both sending
than the pre-fault value with noticeable transient oscillations and receiving ends without significantly compromising the decou-
(Fig. 6a and b); this causes the controllers to reverse the direction pling feature of VSC–HVDC systems. But this may require high-
of the modulation index to reduce the overshoot until the system is bandwidth communication systems. The robustness of the pro-
totally stabilized [2]. After fault clearance the ac voltage on the posed controllers has been tested under large disturbances such
receiving-end recovers to 100% the pre-fault value within 0.1 s. as major load changes and ac faults.
690 O.A. Giddani et al. / Electrical Power and Energy Systems 53 (2013) 684–690