NEC3106 EXPERIMENT NO.
4 FEEDBACK & CONTROL LAB
LEARNING OBJECTIVES
At the end of this experiment, the learner should be able to:
1. Learn how to design an ADC circuit that converts analog input signals to
corresponding binary output values.
2. Build, test, and troubleshoot an ADC circuit using Multisim.
INTRODUCTION
In many applications, ADCs and DACs are used together to provide a digital
interface to an analog world. One such example is the entertainment industry.
The music industry uses analog to digital conversion (ADC) techniques to record
musicians playing in a studio (analog signal source) and this analog signal is
encoded into a digital format which is then stored in compact disks (CD) and sold
to the consumer. The consumer then takes his/her compact disk and plays it in a
CD player.
The CD player uses digital to analog conversion (DAC) techniques to decode the
digital signal and reconstitute the original recorded sounds of the musicians into
an analog format. This analog signal in the audio band (20 Hz to 20 kHz) is then
amplified and used to drive speakers. This same analogy also applies to the film
industry, which now stores and distributes its movies on DVD (Digital Video
Disk).
Analog to Digital Converters or ADCs are used to convert analog signals into
corresponding digital signals. The digital signal generated in this fashion is a
binary representation of the original analog signal’s amplitude.
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NEC3106 EXPERIMENT NO. 4 FEEDBACK & CONTROL LAB
At a very fundamental level, ADCs determine the digital representation of an
analog input signal by comparing it to a given reference voltage. The resulting
digital value represents the proportion between the analog input signal and the
reference voltage.
Using an example, if Vin = 2.5V and Vref = 5V for an 8-bit ADC we would expect to
see a binary value of 10000000 at the ADC output. Why?
Because 2.5 / 5V = 50% and 50% of 2 8 = 256 = 10000000. We will
cover this in more detail in the circuit analysis section below.
Many ADC techniques are currently employed in industry; however, we will
provide a brief overview of only the techniques that are most widely used.
1. Parallel converter or Flash converter – uses many comparators connected in
parallel, each with a different reference voltage. The outputs of these
comparators are then input into a priority encoder. This encoder provides a
binary output based on which comparator outputs are high and which are low.
The number of bits the flash ADC accommodates determines the number of
comparators used. e.g., an 8-bit flash ADC would require 28 – 1 = 255
comparators to implement the 8-bits. Therefore, while flash ADCs are the fastest
converters, but they are limited in the number of bits they can accommodate.
Generally, flash converters are limited to 4-bit up through 10-bit digital output
resolutions.
2. Dual-Slope converter – this type of converter uses an op-amp integrator,
comparator, digital control circuits, and digital clock circuits, along with a
counter to generate the binary or BCD value from an analog source signal.
The fundamental idea is to switch the integrator input in a synchronized fashion
between the analog signal to be converted and a known reference voltage (a
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NEC3106 EXPERIMENT NO. 4 FEEDBACK & CONTROL LAB
negative voltage). This enables both charging and discharging of the integration
capacitor at a constant rate.
When the integration capacitor charges to a specific level, it triggers the
comparator. The comparator then triggers both discharging of the integrator
capacitor and a counter that is used to count during the capacitor’s discharge
cycle.
The value of the count is the amplitude of the analog input signal. This count
value is then converted to a binary or BCD value and made available at the latch
outputs of the ADC. Although the part count and circuit complexity for the dual-
slope converter is much less than that of the flash converter, the dual-slope
converter is considerably slower due to the charge and discharge times required
for its integrating capacitor.
3. Successive-Approximation converter – this type of converter employs the use
of a DAC and a successive approximation register (SAR), along with control logic
circuits, latch and output drivers to perform its ADC operations.
Initially, all binary or BCD bits in the successive approximation register are set to
zero. Once the conversion starts, the MSB is set to “1” and the bits (e.g.,
10000000 for an 8-bit converter) are then fed, in a parallel fashion, into the DAC
input, where the binary or BCD value is converted by the DAC into a reference
voltage.
This reference voltage is then fed into a comparator input where it is compared
with the analog input signal. If the analog input signal is greater than the DAC
derived reference voltage, the MSB is left as a “1” in the SAR; otherwise, it is set
to “0”. Then, this new binary value is shifted out to the DAC where a new
reference voltage is generated and compared with the analog input signal.
This function essentially provides a means of performing a binary search on the
analog input voltage level. This cycle continues until all binary bit values, from
the MSB to the LSB, in the SAR have been set accordingly. Finally, the value is
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NEC3106 EXPERIMENT NO. 4 FEEDBACK & CONTROL LAB
shifted out from the SAR into latch and output drivers to be made available
outside of the ADC.
Most of the off-the-shelf ADC ICs incorporate the SAR type converter.
PROBLEM STATEMENT
Design an 8-bit ADC circuit that utilizes LEDs to indicate its binary output value.
Use a reference voltage of 2.5V to 5 VDC. Design the circuit such that it will
continually update its binary output for a changing analog input signal. Design
the circuit to accommodate positive voltage (unipolar) operation only.
SOLUTION
The implementation of the above design requirements is relatively
straightforward considering the unipolar operating requirement. To enable the
device to operate in a unipolar fashion, the positive Vref must be tied to the 2.5
to 5V reference as described above and negative Vref must be tied to ground.
Additionally, setting the ADC to constantly update based on a changing analog
input signal requires an external clock to toggle the ADC’s SOC (Start of
Conversion) pin. Additionally, the ADC’s OE (Output Enable) pin must be pulled
high to ensure constant updating of the binary output value.
Refer to Figures 4-1 & 4-2 for a schematic of such implementation.
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NEC3106 EXPERIMENT NO. 4 FEEDBACK & CONTROL LAB
Figure 4-1. ADC output with the analog input voltage equal to approximately 0V and +V ref = 5V
Figure 4-2. ADC output with the analog input voltage equal to the reference voltage of 5V and +V ref = 5V.
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NEC3106 EXPERIMENT NO. 4 FEEDBACK & CONTROL LAB
CIRCUIT ANALYSIS
Referring to Figures 4-1 & 4-2, we see an adjustable reference voltage available
to +Vref (VREFP in the schematic) via voltage supply V1 and potentiometer R2.
The varying analog input signal is also derived from V1 using potentiometer R1 to
provide signal variation to the VIN input of the ADC.
Additionally, we note –Vref (VREFN) pulled to ground to enable the unipolar
output operation. The SOC (Start of Conversion) pin is tied to a square wave
signal generator to provide the necessary clock source to ensure continual
updating of the ADC.
Note, when designing such a continually updating (i.e., free-running) ADC
application, care must be taken to ensure the SOC clock frequency provides
enough time to allow the converter to complete the conversion process in its
entirety.
Failure to do so will result in erroneous conversion in the binary output values. In
this case, a clock frequency of 2 KHz provides a period of 500 μs, which is more
than enough time for a worst case ADC conversion cycle (e.g., the National
Semiconductor ADC0804 requires a worst case conversion time of 114 μs).
The OE pin of the ADC is pulled to ground to ensure the binary outputs are
constantly updated as conversions are completed. Data output pins are tied to
indicators per the problem definition requirements.
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NEC3106 EXPERIMENT NO. 4 FEEDBACK & CONTROL LAB
Mathematical analysis of the ADC circuit is as follows:
The following parameters are important when characterizing the performance of
an ADC circuit design:
1) An ADC’s % resolution can be defined in either of the following ways:
Equation #1: ADC % resolution = [1 / (2n)] x 100%
Or
Equation #2: ADC % resolution = (Step Size / Vref) x 100%
2) An ADC’s Step Size is defined as the smallest possible voltage representation
of the ADC or the voltage that is equivalent to its LSB value:
Equation #3: ADC step size = Vref / (2n)
Where: ADC % resolution represents % of Vref
Vref = the ADC reference voltage
n = # of bits accommodated by the ADC
(e.g., 8-bit ADC = 256 values)
Note: Observing equations #1 & 2, it is clear that the ADC resolution could be
improved by either increasing the number of bits employed or decreasing the
reference voltage. However, increasing number of bits increases cost and
conversion time and decreasing the reference voltage makes the conversion
more sensitive to errors due to noise.
Therefore, in the circuits of Figures 4-1 & 4-2:
Step size = 5V / (28) = 19.53 mV
% Resolution = [19.53mV / 5V] x 100% = 0.3906%
Or
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% Resolution = [1 / (2 )] x 100% = 0.3906%
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NEC3106 EXPERIMENT NO. 4 FEEDBACK & CONTROL LAB
This means that the smallest analog voltage step size that can be represented by
the ADC with a Vref = 5V is 19.53 mV and that this step size is 0.3906% of Vref
(or Full Scale Voltage)
To determine the binary value for a given Vin:
Equation #4: ADC decimal number output = INT [(Vin / Vref) 2n]
Then convert the ADC decimal number to binary to obtain binary equivalent of
Vin
Where: Vin is the ADC analog input voltage to be converted
Vref = the ADC reference voltage
n = # of bits accommodated by the ADC (e.g., 8-bit ADC)
INT indicates taking the integer of the calculated value by
truncating the calculated quantity in [ ]
Referring to Figure 4-1:
ADC decimal number output = INT [ (5μV / 5V) 28] = INT [0.000256] = 010
010 = 000000002
Referring to Figure 4-2:
ADC decimal number output = INT [ (5V / 5V) 28] = INT [256] = 25610
25610 = 1 x 28 + 0 x 27 + 0 x 26 + 0 x 25 + 0 x 24 + 0 x 23 + 0 x 22 + 0 x 21 + 0 x 20
25610 = 1000000002
However, because the ADC is limited to a maximum value represented by 8-bits
or 28–1, its full-scale output will show the following:
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NEC3106 EXPERIMENT NO. 4 FEEDBACK & CONTROL LAB
25510 = 1 x 27 + 1 x 26 + 1 x 25 + 1 x 24 + 1 x 23 + 1 x 22 + 1 x 21 + 1 x 20 = 111111112
This value is represented in the circuit simulation in Figure 4-2
As an additional example, assume Vin = 2.5V, then we would expect to see the
following at the ADC output:
ADC decimal number output = INT [ (2.5V / 5V) 28] = INT [128] = 12810
25610 = 1 x 27 + 0 x 26 + 0 x 25 + 0 x 24 + 0 x 23 + 0 x 22 + 0 x 21 + 0 x 20 = 100000002
PROCEDURE
1. Build the circuit indicated in Figures 4-1 & 4-2 using Multisim. Choose 0.1%
increment for potentiometers R1 & R2 and set adjustment keys as shown.
2. Adjust R1 (by pressing the A or SHIFT-A keys) until VIN (Vin) is equal to 5V
3. Adjust R2 (by pressing the B or SHIFT-B keys) until VREFP (Vref) is equal to 5V
4. Using Multisim and equation #4 complete the following table of ADC binary
output values for given voltage input values.
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NEC3106 EXPERIMENT NO. 4 FEEDBACK & CONTROL LAB
Table 4-1
Vin (R1 setting as Binary Output Binary Output
indicated by U1) Calculated Indicated (X7 – X0)
0V
0.020V
0.040V
0.080V
0.160V
0.320V
0.640V
1.280V
2.500V
3.750V
4.375V
4.680V
5.000V
QUESTIONS AND PROBLEMS
1. As the Vin value was increasing, did you notice a pattern in the corresponding
binary output values? What form did this pattern of binary values take? Was it
linear, or nonlinear?
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NEC3106 EXPERIMENT NO. 4 FEEDBACK & CONTROL LAB
2. Based on the results cited in question 1, explain the reason for the observed
binary output value pattern.
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3. Set R2 such that VREFP is set to 2.500V as indicated on U2. If you were to vary
Vin over the same voltage range as in Table 4-1, what would the binary output
values indicate for each Vin value? Why?
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NEC3106 EXPERIMENT NO. 4 FEEDBACK & CONTROL LAB
4. If Vin exceeded Vref in a real ADC IC, would it actually damage the IC? If not,
what would the binary output values be for a given Vin that was larger than Vref?
Refer to the data sheet of the National Semiconductor ADC0804 IC and check the
absolute maximum ratings & electrical characteristics section to reinforce your
understanding.
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NEC3106 EXPERIMENT NO. 4 FEEDBACK & CONTROL LAB
EXPERIMENTAL DISCUSSION
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CONCLUSION
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NEC3106 EXPERIMENT NO. 4 FEEDBACK & CONTROL LAB
REFERENCES (APA Format):
Books
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Internet Source
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Instructor’s Initial: _____________
Date performed: ______________
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