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Gujarat Technological University

The document contains exam questions for a course on software development for embedded systems. It includes multiple choice and long answer questions covering topics like instruction sets, embedded software processes, IC technologies, decoders, file transfers to targets, and more. The questions provide information to test students' knowledge of concepts in embedded systems.

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Jainesh
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73 views

Gujarat Technological University

The document contains exam questions for a course on software development for embedded systems. It includes multiple choice and long answer questions covering topics like instruction sets, embedded software processes, IC technologies, decoders, file transfers to targets, and more. The questions provide information to test students' knowledge of concepts in embedded systems.

Uploaded by

Jainesh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Seat No.: ________ Enrolment No.

___________
GUJARAT TECHNOLOGICAL UNIVERSITY
MCA - SEMESTER–V • EXAMINATION – WINTER 2013
Subject Code: 650012 Date: 30-11-2013
Subject Name: Software Development for Embedded Systems
Time: 02.30 pm - 05.00 pm Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.

Q.1 (a) 1. What is a single-purpose processor? What are the benefits of 03


choosing a single-purpose processor over a general-purpose
processor?
2. What is the difference between synchronous and asynchronous
circuit? Determine whether the following are synchronous or 04
asynchronous:
(a) multiplexer (b) register

(b) Explain Embedded software development process with proper 07


diagram.

Q.2 (a) For a particular product, you determine the NRE cost and unit cost to 07
be the following for the three listed IC technologies: FPGA: ($10,000,
$50); ASIC: ($50,000, $10); VLSI: ($200,000, $5). Determine precise
volumes for which each technology yields the lowest total cost.

(b) Design 3x8 decoder. Start from a truth table, use K-maps to minimize 07
logic and draw the final circuit.

OR
(b) 1. Briefly define EEPROM, SRAM, DRAM 03
2. Compose 1Kx 8 ROM into an 8Kx 8ROM 04

Q.3 (a) Add one instruction to the instruction set to the following instruction 07
set that would reduce the size of our summing assembly program by 1
instruction:.

MOV Rn,direct
MOV direct,Rn
MOV @Rn,Rm
MOV Rn,#immed
ADD Rn,Rm
SUB Rn,Rm
JZ Rn,relative

(b) Explain the role of Cross-Compiler, Cross-Assembler and 07


Linker/Locator for embedded software.
OR
Q.3 (a) Design a circuit that does the matrix multiplication of matrices A and 07
B. Matrix A is 2x2 and matrix B is 2x2. The multiplication works as
follows:
1
A B C
a b g h a*g+b*j a*h+b*k
c d j k = c*g+d*j c*h+d*k

(b) Explain test system for Embedded System with diagram. 07

Q.4 (a) Explain all the five methods for transferring file into target system. 07
(b) Four lights are connected to a decoder. Build a circuit that will blink 07
the lights in the following order: 1, 2, 1, 3, 0, 2,… Start from a state
diagram, draw the state table, minimize the logic, and draw the final
circuit.

S01
0 1 2 3
Controller
S11 decoder

OR
Q.4 (a) 1.Discuss the advantages and disadvantages using 04
Memory-mapped I/O versus Standard I/O.

2. Explain the benefits that Interrupt address table has over


fixed and vectored interrupt method. 03

Q.4 (b) Design an Extended Parallel I/O Peripherals.Provide (i) a State- 07


machine description and (ii) a Structural Description

Q.5 (a) Write a Note on Instruction Set Simulator. 07

(b) Convert 1.0, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6,1.7,1.8 and 1.9 to fixed-point 07
representation using (i) two-bits for the fractional part (ii) three-bits
for the fractional part

OR
Q.5 (a) Write a short note on Logic Analyzers. 07

(b) Write two C routines that, each, takes as input two 32-bit fixed point 07
numbers and perform addition and multiplication using 4-bits for the
fractional part and the remaining bits for the whole part.

*************

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