Electronic Engineering Practice Lukesh Ankamwar
Electronic Engineering Practice Lukesh Ankamwar
Lukesh Ankamwar
181060038
PRACTICAL 2
AIM: Design and implement a Booth Multiplier of 4 bits. Show the output using test
bench and output waveforms.
Pin Description:
Algorithm:
//Lukesh Ankamwar
//181060038
module booth_multiplier
(
input [3:0]m, //Multiplier
input [3:0]q, //Multiplicand
output [7:0]out //Product output
);
always@(*) begin
if (count <= 3'b011) begin
case({Q[0], Qb})
2'b00: {A, Q,Qb} <= {Q[0], A, Q};
2'b01: begin A = A + m; {A, Q,Qb} = {Q[0], A, Q}; end
2'b10: begin A = A + ((~m) + 1); {A, Q,Qb} = {Q[0], A, Q}; end
2'b11: {A, Q,Qb} <= {Q[0], A, Q};
endcase
$display("A = %b B = %b : Qb = %b ", A, Q, Qb);
count <= count + 3'b001;
end
end
endmodule
Verilog TestBench Code:
module Booth_Multiplier_TB();
reg [3:0] a, b;
wire [7:0]OUT;
//Creating instant
booth_multiplier i1
(
.m(a),
.q(b),
.out(OUT)
);
initial
begin
$monitor($time, " M = %b Q = %b :: prodcut = %b ", a, b, OUT);
$dumpfile("a.vcd");
$dumpvars(0, Booth_Multiplier_TB);
end
initial
begin
a = 4'd7; b = 4'd3;
#40 a = 4'd1; b = 4'd1;
#40 a = 4'b1110; b = 4'b1110;
#40 $finish;
end
endmodule
Iverilog Output:
Iverilog Output:
Waveform Output:
CONCLUSION: