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Electronic Engineering Practice Lukesh Ankamwar

The document describes a student's design and implementation of a 4-bit Booth multiplier circuit using Verilog. It includes the pin descriptions, algorithm, Verilog code for the multiplier module and test bench, and sample output waveforms. The student used open-source tools like iVerilog and GTKwave to test the Booth multiplier design. In conclusion, the Booth algorithm was found to be faster than traditional multiplication methods.

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0% found this document useful (0 votes)
71 views6 pages

Electronic Engineering Practice Lukesh Ankamwar

The document describes a student's design and implementation of a 4-bit Booth multiplier circuit using Verilog. It includes the pin descriptions, algorithm, Verilog code for the multiplier module and test bench, and sample output waveforms. The student used open-source tools like iVerilog and GTKwave to test the Booth multiplier design. In conclusion, the Booth algorithm was found to be faster than traditional multiplication methods.

Uploaded by

LUKESH ankamwar
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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ELECTRONIC ENGINEERING PRACTICE

Lukesh Ankamwar
181060038
PRACTICAL 2

AIM: Design and implement a Booth Multiplier of 4 bits. Show the output using test
bench and output waveforms.

Software: iVerilog , GTKwave , Quartus prime , modelsim , yosys

Pin Description:

Pin Names Description

A0 - A3 Operand Multiplier Input (ACTIVE HIGH)


B0 - B3 Operand Multiplicand Input (ACTIVE HIGH)

F0 - F8 Product Output(ACTIVE HIGH)

Algorithm:

 First Load multiplicand into Q.


 And initialize A = 0 and Q minus 1 with also zero.
 Then according to the state of Q[0] and Q minus 1 do the operation:
Q[0] Q minus 1 operation

0 0 Arithmetic Right Shift


0 1 A + M and ARS
1 0 A - M and ARS
1 1 Arithmetic Right Shift

 Then After 4 Iteration answer will be in {A, Q}


VerilogCode:

//Lukesh Ankamwar
//181060038

module booth_multiplier
(
input [3:0]m, //Multiplier
input [3:0]q, //Multiplicand
output [7:0]out //Product output
);

//Variables needed for operation:


reg [3:0]A; //Contains Higher nibble of output
reg [3:0]Q; //Contains Lower nibble of output
reg Qb; //Last Q's 1 Bit
reg [2:0]count; //Count Variable for counter

assign out = {A,Q}; //Continuous Assignment of output.

//Initializing Always block


always@(q) begin
Q = q; //Initializing to the Multiplicand value
count = 3'b000; //Starting count from 0
Qb = 1'b0; //Initializing the Q-1 bit as 0
A = 4'b0000; //Initializing Higher nibble of output as zero
$display(" Initial block M = %b Q = %b :: Count = %b ", A, Q, count);
end

always@(*) begin
if (count <= 3'b011) begin
case({Q[0], Qb})
2'b00: {A, Q,Qb} <= {Q[0], A, Q};
2'b01: begin A = A + m; {A, Q,Qb} = {Q[0], A, Q}; end
2'b10: begin A = A + ((~m) + 1); {A, Q,Qb} = {Q[0], A, Q}; end
2'b11: {A, Q,Qb} <= {Q[0], A, Q};
endcase
$display("A = %b B = %b : Qb = %b ", A, Q, Qb);
count <= count + 3'b001;
end
end
endmodule
Verilog TestBench Code:

//Test Bench for 4 Bit Multiplier


`include "Booth_Multiplier.v"

module Booth_Multiplier_TB();

reg [3:0] a, b;
wire [7:0]OUT;

//Creating instant
booth_multiplier i1
(
.m(a),
.q(b),
.out(OUT)
);

initial
begin
$monitor($time, " M = %b Q = %b :: prodcut = %b ", a, b, OUT);
$dumpfile("a.vcd");
$dumpvars(0, Booth_Multiplier_TB);
end

initial
begin
a = 4'd7; b = 4'd3;
#40 a = 4'd1; b = 4'd1;
#40 a = 4'b1110; b = 4'b1110;
#40 $finish;
end
endmodule
Iverilog Output:
Iverilog Output:

Waveform Output:
CONCLUSION:

Thus, I have implemented a 4 Booth’s multiplier in verilog . In which I have used


open source softwares like iverilog and gtkwave to perform the operation. In
conclusion Booth Algorithm is faster than normal multiplication using addition or
using shifting

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