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Lifetime Estimation of DC-link Capacitors

This document discusses lifetime estimation of DC-link capacitors in adjustable speed drives under grid voltage unbalances. It proposes a mission profile based reliability evaluation method for capacitors to estimate lifetime. It also investigates the lifetime of capacitors in different DC-link configurations and under varying grid conditions.

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0% found this document useful (0 votes)
275 views15 pages

Lifetime Estimation of DC-link Capacitors

This document discusses lifetime estimation of DC-link capacitors in adjustable speed drives under grid voltage unbalances. It proposes a mission profile based reliability evaluation method for capacitors to estimate lifetime. It also investigates the lifetime of capacitors in different DC-link configurations and under varying grid conditions.

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silpa
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This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2018.2863701, IEEE
Transactions on Power Electronics

Lifetime Estimation of DC-link Capacitors in


Adjustable Speed Drives Under
Grid Voltage Unbalances
Haoran Wang, Student Member, IEEE, Pooya Davari, Member, IEEE, Huai Wang, Senior Member, IEEE, Dinesh
Kumar, Member, IEEE, Firuz Zare, Senior Member, IEEE, and Frede Blaabjerg, Fellow, IEEE

Abstract—Electrolytic capacitor with a DC-side inductor is a filters are an important part of a standard ASD, in terms
typical DC-link filtering configuration in grid-connected diode of size, cost, and failure. It serves to limit the DC-link
rectified Adjustable Speed Drives (ASDs). The criteria to size voltage ripple, absorb harmonics, and provide certain amount
the DC-link filter are mainly from the aspects of stability
and power quality. Nevertheless, the reliability of the DC-link of energy storage for abnormal and transient operations [3],
filter is also an essential performance factor to be considered, [4]. In many power electronics applications, DC-link LC filter
which depends on both the component inherent capability and including a large electrolytic capacitor is preferred due to
the operational conditions (e.g., electro-thermal stresses) in the cost-effectiveness and simplicity. The criteria for sizing DC-
field operation. Nowadays, unbalanced voltage has the most link filters are mostly from the stability and power quality
frequent occurrence in many distribution networks. It brings
more electrical-thermal stress to the component, affecting the point of view, such as voltage and current ripple limitations,
reliability of the capacitors. In order to study the reliability dynamic response, hold-up energy requirement, stability of
performance of the LC filter in an ASD system quantitatively, the overall grid-connected drives and so on [5]. However,
this paper proposes a mission profile based reliability evaluation the use of electrolytic capacitor raises reliability concern. The
method for capacitors. Different from the conventional lifetime primary cause of electrolytic capacitor degradation is due to
estimation, a nonlinear accumulated damage model is proposed
for the long-term estimation, considering the nonlinear process of electrolyte evaporation and electro-chemical reaction, which
ESR growth and capacitance reduction during the degradation. highly depends on the electro-thermal stresses. High ripple
Based on the proposed lifetime estimation procedure, four case currents cause internal self-heating, increasing the hot-spot
studies are investigated: 1) Lifetime benchmarking of capacitors temperature, and resulting in aging. Moreover, it can cause
in LC filtering and slim capacitor filtering configurations; 2) an increased capacitor Equivalent Series Resistor (ESR) over
Scalability analysis for the lifetime of capacitors in terms of
system power rating and grid-unbalanced levels; 3) Lifetime time. An increase in its ESR causes more heating for a given
estimation of capacitors in DC-link filter with long-term mission ripple current, thus increasing the core temperature rise and
profile, and 4) The impact of the capacitor sizing on the lifetime accelerating the degradation process [3]. Thus, for capacitor
of DC-link capacitor under grid-balanced and grid-unbalanced sizing in DC-link LC filter, the reliability performance is an
conditions. The results serve as a guideline for proper selection essential aspect to be investigated. It depends on both the in-
of DC-link configurations and parameters to fulfill a specification
in adjustable speed drives. herent capability of the selected capacitors and the operational
conditions (e.g., electro-thermal stresses) in the field operation
Index Terms—Grid-connected ASD drives, DC-link capacitor, [6], [7]. In recent years, drives with significantly smaller
reliability, lifetime, unbalance voltage.
DC-link capacitance (i.e., slim drive) implemented by film
capacitors have been in the market, due to the reduction of line
I. I NTRODUCTION current harmonics emission and the potential to an improved
The advancement of power electronic devices and their reliability [8]. However, a comprehensive analysis of the
decreasing price due to market demand have increased the lifetime estimation and comparison between the conventional
use of gird-connected Adjustable Speed Drive (ASD) systems LC filters and slim capacitor DC-link solutions do not exist in
as an effective energy saving solution in various industri- the literature.
al, commercial and residential applications [1], [2]. DC-link Modern distribution networks face different power quali-
ty issues, such as voltage unbalance, background harmonic
distortion, voltage sag, swell and line frequency variation,
etc. Recent power quality issues show that among the dif-
Partial results of this manuscript have been presented at the IEEE Energy
Conversion Congress and Exposition (ECCE), 2017 and the IEEE Applied ferent types of power quality disturbances, the unbalanced
Power Electronics Conference and Exposition (APEC) 2018, sponsored by voltage has the most frequent occurrence in many distribu-
power electronics society. tion networks [9, 10]. Some of the main issues affecting
H. Wang, P. Davari, H. Wang and F. Blaabjerg are with the Department
of Energy Technology, Aalborg University, 9220 Aalborg, Denmark (e- the voltage unbalance in a distribution network are [11]: 1)
mail:[email protected], [email protected], [email protected] and [email protected]). unequal distribution of single-phase load on three-phase power
D. Kumar is with Development Center, Danfoss Drives A/S, Denmark (e- system; 2) asymmetrical feeders and transformer winding
mail: [email protected]).
F. Zare is with The University of Queensland, Australia (email: impedances, and 3) asymmetrical power generation of grid
[email protected]). connected single-phase distributed generations, such as roof-

0885-8993 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
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Transactions on Power Electronics

top solar inverters. In fact, considering the above-mentioned in this paper, and the quantitative reliability performance are
factors, maintaining an exact voltage balance at the Point of investigated comprehensively from the following aspects: 1)
Common Coupling (PCC) is essentially unmanageable [12]. lifetime benchmarking between the DC-link LC filter and the
Therefore, unbalanced voltage conditions may persist as a slim capacitor in ASDs under scalable loading conditions; 2)
steady-state condition. Standard regulations for US (ANSI lifetime estimation for DC-link capacitors under grid voltage
C84. 1 [13]) and European distribution networks (IEC 60038 balanced and unbalanced conditions; 3) the real mission profile
[14]) recommend limits for the maximum voltage unbalance based long-term lifetime estimation; 4) impact of the capacitor
of 3 % and 2 % respectively. However, some power electronic sizing on the lifetime of DC-link filters. It serves as a guideline
systems such as ASDs are very sensitive to voltage unbalance for proper selection of DC-link configurations and parameters
and even 2-3 % voltage unbalance may cause significant to fulfill a certain lifetime requirement. It is worth mention-
unbalanced currents, which can have undesirable consequences ing that voltage sag is also a relevant reliability issue for
on electronic components lifetime span. Currently, most ASD capacitors, which may increase its electro-thermal stresses and
systems are equipped with three-phase diode rectifiers as therefore the wear out. Moreover, it might induce single-event
front-end AC-DC conversion stage. During voltage unbalance failure due to overstress under voltage sag (e.g., over-voltage,
events, three-phase diode rectifiers may enter into single-phase over-temperature). The studied lifetime estimation method can
operation mode (depending on the load level and unbalance also be applied to voltage sag condition.
level), which can generate low-order harmonic components The rest of this paper is organized as follows. In section
(100 Hz, 200 Hz at 50 Hz mains) in the DC-link voltage. These II, the harmonic emission of different DC-link filter configu-
low-order voltage harmonics result in undesirable impact on rations are described. In section III, the mission profile based
electro-thermal stresses, and therefore, the reliability of the lifetime estimation procedure is presented considering the
DC-link capacitors. The DC-link capacitor stresses under one nonlinear accumulated damage model during the evaluation
specific steady-state operating condition are studied in [15], process. Experimental case studies and scalability analysis are
where the current and voltage stresses in ASD system can be presented in section IV, then followed by the conclusions.
obtained mathematically. But the existing lifetime estimation
of capacitor is based on a simple empirical equation and
II. H ARMONIC E MISSION OF G RID - CONNECTED D RIVES
the long-term mission profile is not considered. [16] and
[17] studied the mission profile based reliability assessment Fig. 1 shows the block diagram of the three-phase grid-
procedure for the DC-link capacitors in Photovoltaics (PV) connected adjustable speed drives with the specification in
systems. The damage is accumulated linearly for long time and Table I investigated in this paper. Fig. 1 (a) shows the
then the lifetime of the capacitor can be estimated. However, conventional drive, which is implemented with a DC-link
there are still limitations in prior studies: LC filter. Large size DC inductor Ldc−cnv is used to reduce
1) The existing mission profile based lifetime estimation the line current harmonics as well as a large DC capacitor
is lack of Physics-of-Failure (PoF) understanding [18]. For Cdc−cnv to limit the DC-link voltage fluctuation. Cdc−cnv
example, the accumulated damage model in existing lifetime is implemented with two electrolytic capacitors connected in
estimation is a linear model [16]. However, from capacitor series for higher voltage rating and then two in parallel for
lifetime testing results [18], it can be seen the damage of large capacitance. Fig. 1 (b) presents the second case, where
capacitor represented by the ESR raise in the life cycle follows the ASD utilizes a small DC-link capacitor Cslim . One of the
an exponent expression. main problems is the resonant frequency generated by the DC-
2) The grid unbalance alters the electro-thermal stresses of link capacitor and the line inductance Lg . The line inductance
the key components in a motor drive [19–21]. In ASD system, of a low-voltage distribution network is mainly defined by
no quantitative lifetime comparison between the LC and the size and the type of the step-down transformer. Ripple
silm capacitor filter types is available under grid unbalance. current stress is an important stressor that affects the DC-
The impact of the grid voltage amplitude and phase angle link capacitor lifetime. According to the circuit analysis, the
unbalance on the lifetime of the two cases is not studied. capacitor current spectrum can be divided into two frequency
3) Mission profile based estimated lifetime has not been ranges: 0-2 kHz (i.e., Low-frequency harmonics introduced
taken into account to size the capacitor. by unbalanced input and output power) and above 2 kHz (i.e.,
In order to evaluate and optimize the reliability perfor- high-frequency harmonics introduced by the power electronic
mance of the DC-link filter in ASD systems, a novel mission switching). The Root Mean Square (RMS) value of the current
profile based lifetime estimation procedure for capacitors in the whole frequency range contributes to the thermal
is studied in this paper. The nonlinear damage model for loading of the capacitor, which greatly impacts the reliability
long-term estimation is considered, which is used to obtain of the capacitor. It mainly depends on two factors: resonant
the process of nonlinear damage accumulation, ESR raise frequency of the DC-link filter and the operating status of the
ratio and capacitance reduction ratio in the life cycle. The ASDs with different grid conditions:
procedure has been published in a conference paper in [22], 1) Resonant frequency of the DC-link filter. The schematic
while the derivation of the nonlinear model, scalable case diagram in Fig. 2 shows the relationship between the resonant
study and comparison analysis are not investigated. Extending frequency and the power loss of the DC-link capacitor. At a
the research in [22], the lifetime estimation procedure with specific frequency, power loss of the capacitor is a function of
nonlinear accumulated damage model is discussed step by step ripple current and ESR, while the total power loss is the sum

0885-8993 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
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Transactions on Power Electronics

Diode Diode
Rectifier Ldc-cnv Rectifier Inverter
Lg a ia Inverter Lg a ia
u u

~ b
c
vr Cdc-cnv
+
_ vdc
v
w
M
~ ~ b
c
vr
Cslim
+
_ vdc
v
w
M
~
Grid Grid
Front-end Ldc-cnv Rear-end Front-end Rear-end

THDia ≈ 42 % THDia ≈ 35 %
Po = 100 % PF ≈ 0.92 PF ≈ 0.94
Po = 100 %
THDia ≈ 64 % THDia ≈ 59 %
ia ia
Po = 50 % PF ≈ 0.83 PF ≈ 0.86
Po = 50 %
THDia ≈ 110 % THDia ≈ 126 %
PF ≈ 0.66 PF ≈ 0.6
Po = 10 %
Po = 10 %
5 A/div, 2 ms/div 5 A/div, 2 ms/div
(a) Standard drive. (b) Slim drive.

Fig. 1. A block diagram of a 7.5 kW ASD systems with two kinds of DC-link configurations and their input waveforms at different loads. The parameters
of the ASD systems are based on the specification in Table I.

TABLE I
S PECIFICATION OF THE MOTOR DRIVE AND THE DC- LINK CONFIGURATIONS .

Motor drive specifications Standard LC filter (Cdc-cnv) Slim capacitor filter (Cslim)
Rated power (kW) 7.5 Physical configurations Four 450V/680uF electrolytic capacitors 1000 V/ 30 uF Film capacitor
Grid phase RMS voltage (V) 230 ESR of single capacitor 150 mΩ @100 Hz 15 mΩ @100 Hz
Grid frequency (Hz) 50 Thermal resistance 6 ℃/W 13 ℃/W
5000 hours @105℃ and rated ripple 100000 hours @70℃ and rated
Switching frequency (kHz) 5 Rated load lifetime
current ripple current
DC-link voltage (V) @ 7.5 kW
535 LDC-cnv 1.25 mH
balanced grid voltage
Ambient temperature (℃) 45

f1 Hz f2 Hz below
n
X
2
Ploss = [ESR(fi ) × Irms (fi )] (1)
i=1
Power loss Total power loss
contributed by f1 Hz contributed by the where ESR(fi ) is the equivalent series resistance at frequency
Power loss (W)

capacitor current two kinds fi , Irms (fi ) is the RMS value of the ripple current at frequency
fi . Assuming f1 Hz and f2 Hz harmonics are the two main
components in the capacitor current, the power loss contribut-
Power loss
contributed by f2 Hz
ed by f1 Hz current reaches the peak when the resonant
capacitor current frequency is f1 Hz. With a higher resonant frequency, the gain
at f1 Hz decreases, so that the power loss decreases. Similar
phenomenon can be obtained from the power loss contributed
by f2 Hz capacitor current. The power loss reaches the peak
Resonant Frequency (Hz) value when the resonant frequency is f2 Hz. The amplification
for the current harmonics at a specific frequency is determined
Fig. 2. Relationship between resonant frequency and the power loss of by the LC filter in terms of resonant frequency and damping
capacitor in a drive system. Assume f1 Hz and f2 Hz harmonics are the two
main components in the capacitor current. factor. It impacts the power loss distribution in the frequency
range and therefore changes the lifetime of the capacitor.
2) The operating status of the ASDs, and the grid conditions:
such as during voltage unbalanced events, three-phase diode
rectifier may enter in single-phase operation mode, which
of the power loss at a whole frequency range, which is shown generates low-order harmonic components in DC-link voltage.

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Transactions on Power Electronics

TABLE II
VOLTAGE UNBALANCE CASES USED FOR DRIVE ANALYSIS . the DC-link capacitor. Notably, taking the effect of the output
power level in addition to the unbalanced situation could sig-
Balanced nificantly reduce the performance of the capacitor reliability.
UA =2300O The reliability analysis for the capacitors under these operating
Amplitude unbalanced (phase a) conditions are presented in the following section.
3% 5% 10%
Ua 209.70o 196.70o 165.50o III. R ELIABILITY A NALYSIS OF C APACITORS WITH
Ub 230-120o 230-120o 230-120o N ONLINEAR ACCUMULATED DAMAGE M ODEL
Uc 230120o 230120o 230120o
The proposed mission profile based reliability evaluation
Phase angle unbalance (phase c)
procedure for capacitors is shown in Fig. 4. The procedure
3% 5% 10%
includes three major steps: electro-thermal loading analysis,
Ua 2300o 2300o 2300o
nonlinear damage accumulation, and Monte-Carlo simulation
Ub 230-120 o 230-120 o 230-120o based variation analysis. A mission profile (i.e., ambient tem-
o
Uc 230125.2 230128.6 o
230102.9o perature, loading condition) is applied as the input. The output
is the lifetime of the capacitor with a certain confidence level
(e.g., 90 %). The feedback loop from the accumulated damage
These low-frequency harmonics alternate the electro-thermal to the electrical model of the capacitor shows the accelerated
loadings of the DC-link capacitors. Therefore, the reliability degradation effect, corresponding to the capacitance reduction
estimation under grid voltage-balanced operation conditions is and the ESR raise. The purpose of the method is to provide
no longer valid. In this paper, the different power rating levels a systematic lifetime estimation procedure to evaluate the
and grid-unbalanced levels are taken into account to investigate capacitor reliability based on a specified mission profile.
their impact on the lifetime, since they are the two main
impact factors in practical applications which have significant
impact on the electrical stress of the DC-link capacitor. Detail A. Electro-thermal Loading Analysis
discussion regarding to the two factors are shown below: Thermal stress is a critical stressor to capacitor wear out
a. Power rating. For the same filtering configuration and [3]. The ripple current and ambient temperature are the
parameters, the higher power level increases the DC-link ripple contributors to the capacitor hot-spot temperature. For elec-
voltage and also introduces more deteriorate effect on the trolytic capacitors, the dominant degradation mechanisms are
reliability of capacitor, since it increases the thermal loading of electro-chemical reaction in the oxide layer and the electrolyte
the DC-link capacitor. The dominant major harmonics of this vaporization. Both factors lead to an increase of ESR over
ripple current under balanced condition is six times of the grid time. Especially, the increase of capacitor power loss causes a
frequency (6fg ). Moreover, the output power not only affects higher operating temperature inside the capacitor. The hot-spot
the voltage ripple across the capacitor, but also affects the grid- temperature of the capacitor, which is affected by the current
side current quality as well. As most motor drive applications stress and ambient temperature, is presented by
operate under partial loading condition, a scalable power level
n
is more realistic and applicable for reliability analysis. X
2
Th = Ta + Rha × [ESR(fi ) × Irms (fi )] (3)
b. Grid voltage-unbalanced levels.
i=1
Grid voltage-unbalanced conditions may result in a single-
phase operation of the front-end rectifier system and conse- where Th is the hot-spot temperature and Ta is the ambient
quently could severely affect the DC-link capacitor lifetime. temperature. Rha is the equivalent thermal resistance from
The amount of voltage unbalance is calculated based on hot-spot to ambient which contains two parts, from hot-spot
IEC61000-2-2 for three-phase systems expressed as: to case depending on the solid material and from case to
s ambient depending on the heat spread through the nature air.
6(Uab2 + U2 + U2 )
bc ca In this case study, the thermal resistance is obtained from
Uunbalanced (%) = −2 (2)
Uab + Ubc + Uca datasheet directly which is shown in Table I. The capacitor
spacing is larger than 10 mm, so that the thermal coupling
where Uab , Ubc , and Uca are line-line RMS voltages in
between capacitors is very small. ESR(fi ) is the equivalent
a three-phase system. The applied grid conditions in the
series resistance at frequency fi , Irms (fi ) is the RMS value of
following case study are summarized in Table II. Comparing
the ripple current at frequency fi .
with the balanced condition, it is clear that, regardless of
the output power level, the output voltage ripple increases
significantly under unbalanced condition as shown in Fig. B. Nonlinear Damage Accumulation
3 with 5 % voltage amplitude unbalance. It is because the
front-end rectifier is forced to operate in single-phase mode 1) Nonlinear Accumulated Damage Model: For electrolytic
(i.e., due to partial or non-conducting of the rectifier phase capacitors and film capacitors, a widely used lifetime model
leg) during grid voltage-unbalanced conditions. The single- is as given in [23] and [3]:
phase operation introduces low-frequency harmonics in the V −p1 T0 −Th

DC link, therefore, it contributes more thermal loading on L = L0 × ( ) × 2 p2 (4)


V0

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Transactions on Power Electronics

Grid phase voltage Grid phase voltage

Voltage (V)

Voltage (V)
5% unbalanced

Grid phase current Grid phase current


Current (A)

Current (A)
DC-link voltage DC-link voltage
Voltage (V)

Voltage (V)
Time (s) Time (s)
(a) Standard drive with DC-link LC filter under gird voltage (b) Standard drive with DC-link LC filter under 5 % gird
balanced condition. voltage amplitude unbalanced condition.
Grid phase voltage Grid phase voltage
Voltage (V)

Voltage (V)
5% unbalanced

Grid phase current Grid phase current


Current (A)

Current (A)

DC-link voltage DC-link voltage


Voltage (V)

Voltage (V)

Time (s) Time (s)


(c) Standard drive with DC-link silm capacitor under gird (d) Standard drive with DC-link slim capacitor under 5 %
voltage balanced condition. gird voltage amplitude unbalanced condition.

Fig. 3. Simulation waveforms of the standard drive with DC-link LC filter and slim capacitor filter under grid voltage balance and amplitude unbalanced
conditions.

where L0 , V0 , V , T0 and Th are the rated lifetime, rated lifetime and different stresses, which represents the degrada-
voltage, real voltage, ambient temperature and hot-spot tem- tion speed of the capacitor under operating condition. It is
perature of the capacitor. For film capacitors, the exponent p1 determined by the capacitor material, technology and different
is from around 7 to 9.4, which is used by leading capacitor operating stresses. r is the ratio li /Li , where li and Li are
manufacturers. For electrolytic capacitors, the value of p1 the instantaneous equivalent operating time and total lifetime
typically varies from 3 to 5. In this paper, p1 = 9 for under the same loading condition, respectively. The damage
film capacitor and p1 = 4 for electrolytic capacitor. p2 is under a specified stress is then defined as the ratio of the
a coefficient around 10. From the above equation, it can be instantaneous to the final ESR raise. In most cases, a0 = 0,
seen that the lifetime is a function of Th which is the hot-spot and the damage function becomes
temperature of the capacitor.
The nonlinear accumulated damage model is developed to D = rq (6)
describe the real damage progress through a reliable physical
basic. It is recognized that the major manifestation of damage The comparisons between the linear damage model and non-
is the ESR growth which involves many complicated process- linear damage model are shown in Fig. 5. The orange curve is
es. Based on the phenomenological recognition, one of the the linear model and green curves F1 and F2 are the nonlinear
formulated models that accounts for the effects of growth [24], models for different loading conditions. Assume three stages
but without a specific identification is represented by in the damage accumulation in Fig. 5: Stage 1 is under the first
loading condition and the operating time is l1 . It can be seen
a = a0 + (af − a0 )rq (5) that the damage with linear accumulated model is much higher
than that with the nonlinear model. This significant difference
where a0 , a, and af are normalized ESR growth at initial, can not be ignored. Stage 2 is under the second loading
instantaneous, and final state, respectively; q is a function of condition and the operating time is l2 . For the linear model

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Transactions on Power Electronics

Ta

Current (A)
Mission Profile Power Loss
Thermal Model Th
Model
A. Electro-thermal loading
n
analysis Frequency (Hz)
Ploss ESR( fi )I2rms ( fi ) Th Ta Ploss Rha
i 1
FFT analysis of capacitor current

B. Nonlinear damage
accumulation Th Teq _ h
Lifetime Damage Temperature
Voltage stress estimation accumulation Derivation

Voltage (V)
qi
qi 1
T0 Th p1
V li 1
qi li 1 V
C. Monte-Carlo Simulation L L0 ( ) p1
2 p2 Dn Th ,eq p2 ln Dtot T0
V0 Li 1 Li L0 V0
and Lifetime Prediction Time (s)

Variation analysis Lifetime estimation


Probability distribution function
10 % 5% 3%

Cumulative distribution
Teq _ h
pdf

Density (%)
Lifetime
L0 estimation
pdf

B1
T0 Th
V p1 p2
n1 L L0 ( ) 2 Number of hours to failure Numbe r of hours to failure
V0

Fig. 4. Lifetime estimation procedure of DC-link capacitor.

Damage based on r3 = l3 / L3
based case, the damage will continue accumulated linearly. For linear accumulated model
the nonlinear model based case, the damage will accumulate D3 r2 = l2 / L2
following the damage curve of the second loading condition.
D2
Stage 3 is under the first loading condition and the operating r1 = l1 / L1
time is l3 . It can be seen that the linear model will introduce
Damage (%)

error in the damage estimation. The mathematical model of D1 F2 F1


Damage based on
the nonlinear accumulated damage model is discussed below. nonlinear accumulated
Under the first stress, the damage of the capacitor is model r3 = l3 / L3
   q1 D3
l1 l1
D1 = F1 = (7) r2 = l2 / L2
L1 L1 D2
where F1 is the nonlinear accumulated model. Under the D1
second stress, the damage of the component is
 −1  "  qq1 #q2 r1 = l1 / L1
F2 (D1 )L2 + l2 l1 2 l2
D2 = F2 = + (8) Damage ratio (%)
L2 L1 L2
where F2−1 is the inverse function of F2 which is the nonlinear Fig. 5. Comparison of linear and nonlinear accumulated damage model.
model of the second loading condition. The extended nonlinear
accumulated damage model is
"  qi−1 #qi C. Monte-Carlo Analysis and Lifetime Prediction
li−1 qi
li
Dtot = + (9) The application of the lifetime model results in a fixed
Li−1 Li
accumulated damage. It is far from reality since the capac-
where qi−1 and qi are the coefficient of the nonlinear model itor parameter variations and the statistical properties of the
for loading condition i − 1 and i. Dtot is the damage of the lifetime model are not considered. In field operations, the time
long-term accumulation. to the end-of-life for the capacitor could vary within a range
2) Equivalent Hot-spot Temperature Derivation: By accu- due to the tolerance in physical parameters and the difference
mulating the damage, the dynamical stresses are converted into in the experienced stresses. Therefore, a statistical approach
static values for each type of temperature stress. Taking the based on Monte-Carlo simulations is applied. Especially, the
accumulated damage to the lifetime model, the equivalent hot- distributions of the temperature-related lifetime constants L0 ,
spot temperature can be derived inversely. p2 and the temperature tolerance-related parameter Th are
plotted. Different values of constants result into different
"  −p1 #
1 V
Th,eq = −p2 ln Dtot × × + T0 (10) lifetimes. Then, the sensitivity of the lifetime to L0 , p2 and
L0 V0
Th can be evaluated individually or collectively. Finally, the

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Transactions on Power Electronics

A. Lifetime Prediction of DC-link Filters

1) Electro-thermal Stress Analysis: The DC-link capacitor


ripple current and voltage have been extensively measured
under grid voltage-balanced, voltage amplitude-unbalanced
and phase-unbalanced conditions. For the DC-link LC filtering
configuration, the measured capacitor current spectrums under
DC-link these operating conditions are shown in Fig. 7 (a), Fig. 7
capacitors (b), and Fig. 7 (c), respectively. It can be seen that: a) the
harmonic component under grid voltage-balanced condition is
mainly 300 Hz current. With higher power rating, the ripple
DC-link
Inductor
component will increase. Notably, there are other harmonics
existing in the spectrum, which is due to that low percentage
voltage unbalance always exists during the normal operation;
b) for grid voltage amplitude and phase unbalanced conditions,
Fig. 6. Experimental prototype of the motor drive with DC-link LC filter.
due to loss of symmetry in the three-phase system, 100 Hz
related ripple current components become significant, which
distribution of the end-of-life of the capacitors can be obtained, highly increases the electrical stress of the capacitor. These
allowing a lifetime analysis with a specified confidence level low-frequency harmonics will greatly alternate the electrical
[25]. loadings of the DC-link capacitors. For the slim capacitor fil-
tering configuration, the same trend as the DC-link LC filtering
D. Feedback for Electrical Analysis Due to Capacitance Re- configuration can be found, while the capacitor current value
duction at the frequency range 0-2 kHz are smaller. Even though the
Along with the damage accumulation, the capacitance will low frequency current harmonics under unbalanced condition
reduce continually and the ESR will increase corresponding increase more than 2 times, it is still much smaller than the
to the damage ratio. In the same application, the parameters capacitor current in the LC filtering configuration. Based on
change of the capacitor lead to an increase on the electrical the above discussions, the reliability estimation under balanced
loading (e.g., DC-link voltage ripple and capacitor current grid operation conditions are no longer valid, which should
ripple) and thermal loading (e.g., hot-spot temperature). It be carefully considered in the design phase of the motor drive
determines that the actual degradation of the capacitor with with scalable operating conditions.
variable loading condition is faster than the capacitor under Thermal stresses are introduced by both ambient tempera-
constant loading conditions. A feedback loop is considered in ture and internal temperature rise due to ripple current stresses.
the lifetime estimation procedure as shown in Fig. 4 to rep- Fig. 8 shows the frequency-dependent ESR of the applied
resent the accelerated degradation. Therefore, the capacitance, capacitors in the DC-link LC filtering configuration for thermal
electrical stresses and the hot-spot temperature are changing loading analysis. The ESR of the electrolytic capacitor is
sequentially during the lifetime estimation, which matches frequency and temperature (which is ignored in the analysis)
well with the real conditions. dependent. The larger ESR at low frequency range indicates
that low frequency harmonics will contribute more to the
IV. L IFETIME A NALYSIS OF THE DC- LINK F ILTERS IN A N total power loss and thermal loading. The thermal loading
ASD S YSTEM of the capacitor under different loading conditions are shown
An ASD system with two different DC-link configura- in Fig. 9. Under voltage-balanced operating conditions, the
tions are considered for reliability analysis. The experimental temperature variations are lower than 10 o C. Notably, as the
prototype is shown in Fig. 6, and the specification of the output power level increases the thermal stresses increase as
experimental setup is shown in Table I. Even though the power well. Under amplitude and phase angle unbalanced conditions
rating of the system is 7.5 kW, however in many application from 3 % to 10 % unbalance levels, the thermal stresses
drives operate at partial load conditions, therefore in this increase severely. Especially under 5 % and 10 % voltage
study we have consider three different power level: 1kW, 3kW amplitude unbalanced conditions and 10 % voltage phase
and 5kW. The lifetime estimation for LC filter in ASD is unbalanced condition, the temperature variation is higher than
firstly studied in terms of power rating, voltage amplitude, 20 o C. The experimental results are shown in Fig. 10, where
and voltage phase angle unbalanced conditions, while the slim the motor drive is tested at 5 kW under balanced, 3 %
capacitor in ASD is studied with the same conditions for amplitude unbalanced and 3 % phase unbalanced conditions.
doing a comparison. Based on the proposed capacitor lifetime The capacitors in the testing setup do not have temperature
estimation procedure, the measured mission profile is taken sensors inside, therefore the case temperature is measured
into account, offering a more realistic interpretation of the for comparison. For the estimated and experimental results,
long-term loading and lifetime evaluation. In the end of this the temperature difference between the estimated hot-spot
section, the relationship between lifetime and capacitance in temperature and the measured case temperature is around 3
an LC filter is investigated, which can be a guideline for sizing degrees and the trend is the same, which is shown in Fig. 11.
the capacitor. Compared with the LC filtering configuration, the hot-spot

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8 2
1 kW Balanced 1.8 1 kW Balanced
7
3 kW Balanced 1.6 3 kW Balanced
6
5 kW Balanced 1.4 5 kW Balanced

Current (A)
Current (A)
5 1.2
4 1
3 0.8
0.6
2
0.4
1 0.2
0 0

200
100

300
400
500
600
700
800
900
0

1000
1100
1200
1300
1400
1500
1600
1700
1800
1900
2000
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
1300
1400
1500
1600
1700
1800
1900
2000
Frequency (Hz) Frequency (Hz)
(a) DC-link capacitor current spectrum under balanced grid (d) Slim capacitor current spectrum under balanced
conditions with different output power levels. grid conditions with different output power levels.
20 2
3 % Amplitude unbalanced 3% Amplitude unbalanced
18 1.8
5 % Amplitude unbalanced 5 % Amplitude unbalanced
16 10 % Amplitude unbalanced 1.6
10 % Amplitude unbalanced
14 1.4

Current (A)
Current (A)

12 1.2
10 1
8 0.8
6 0.6
4 0.4
2 0.2
0 0
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
1300
1400
1500
1600
1700
1800
1900
2000

1000
1100
1200
1300
1400
1500
1600
1700
1800
1900
2000
0
100
200
300
400
500
600
700
800
900
Frequency (Hz) Frequency (Hz)
(b) DC-link capacitor current at 5 kW under different level of grid (e) Slim capacitor current at 5 kW under different
voltage amplitude unbalanced. level of grid votage amplitude unbalanced.
18 2
3 % Phase unbalanced 3 % Phase unbalanced
16 1.8
5 % Phase unbalanced 5 % Phase unbalanced
14 10 % Phase unbalanced 1.6
10 % Phase unbalanced
1.4
Current (A)
Current (A)

12
1.2
10
1
8
0.8
6 0.6
4 0.4
2 0.2
0 0
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
1300
1400
1500
1600
1700
1800
1900
2000
100
200
300
400
500
600
700
800
900
0

1000
1100
1200
1300
1400
1500
1600
1700
1800
1900
2000

Frequency (Hz) Frequency (Hz)


(c) DC-link capacitor current at 5 kW under different level (f) Slim capacitor current at 5 kW under different
of grid voltage phase unbalanced. level of grid voltage phase unbalanced.

Fig. 7. Measured DC-link capacitor current spectrums under different balanced and unbalanced grid voltages.

temperature variation of the capacitor in slim capacitor filtering fraction is summed up to obtain the accumulated damage. Fig.
configuration is much smaller. There are two reasons for this 12 shows the accumulated damage model obtained from the
effect: the capacitor current in the slim capacitor is smaller lifetime testing results shown in [18] by curve fitting. It can
than in the LC filter as shown in Fig. 7, and the ESR of the be seen that ESR which is the indicator of the capacitor wear
film capacitor is much smaller than the electrolytic capacitor, out is according to the exponent way, due to the material
especially in the low frequency range. aging. At the beginning, the ESR is the initial value, which
2) Nonlinear Damage Accumulation: The degradation ef- indicate the damage as 0. When the ESR is two times of
fect leads to capacitance reduction, so that the electrical the initial value, the capacitor assumes damage. After this
stresses of the DC-link capacitor are not constant. Assuming time, the ESR growth rate will significantly increase. Damage
the damage is accumulated every l (l = 100 in following case ratio is defined as the ratio of measurement period and the
study) hours, the whole life cycle can be divided into fractions total lifetime. Therefore, the nonlinear accumulated damage
to update the realtime capacitance and ESR. Each consumption model is a function of damage ratio, which can be obtained

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Transactions on Power Electronics

Temperature raise Temperature raise Temperature raise


Temperature raise
= 8 degree = 15 degree 18 –degree
==45.7 28 = 17.7 degree

(a) Drive is tested at 5 kW under (b) Drive is tested at 5 kW under 3 % grid (c) Drive is tested at 5 kW under 3 % grid voltage
balanced condition. voltage amplitude unbalanced condition. phase unbalanced condition.

Fig. 10. Experimental results of capacitor temperature in LC filtering configuration with 5 kW loading condition.

2 5 kW
Datasheet ( 20 °C ) 40
10 %

Internal temperature raise (℃)


Datasheet ( 40 °C ) 35
1.5 Datasheet ( 60 °C ) 30
5 %10 %
ESRratio ( %)

Datasheet (105 °C )
25
1 3% 5%
20
5 3%
15 3
0.5 1 kW kW
10
kW
5
0 2 3 4 0
10 10 10 Amplitude Phase
Balance
Frequency (Hz) unbalance unbalance
(a) Relationship between frequency and ESR ratio for 100 Hz of (a) Internal temperature raise of electrolytic capacitor in
the electrolytic capacitor with different operating temperatures. LC filter configuration.
25 5 kW
2.8 10 %
3 5 3%5%
Internal temperature raise (℃)

20 1
kW kW 3 % 5 %10 %
2.6 kW
ESR (mΩ )

15

2.4
10

5 2.2

0 2 3 4 5 2
10 10 10 10 Balance Amplitude Phase
Frequency (Hz) unbalance unbalance
(b) Relationship between frequency and ESR of a film capacitor. (b) Internal temperature raise of film capacitor in
slim capacitor filter configuration.
Fig. 8. Frequency-dependent equivalent series resistance (ESR) of the
electrolytic capacitor B43630 from EPCOS and film capacitors B32776 from Fig. 9. Internal temperature raise of the capacitors under different loading
EPCOS. condition.

by curve fitting. Meanwhile, the capacitance is also a function relevant parameter variations. Two types of uncertainties are
of the damage ratio. At the beginning, the damage ratio is considered: a) parameter uncertainties in the applied lifetime
0, and the capacitance is the initial value. Increasing with model; b) parameter uncertainties due to manufacturing pro-
the damage ratio, the capacitance will reduce simultaneously. cess variations among capacitors with the same product part
The relationship between the capacitance reduction and the number. Regarding the first type of uncertainty, each lifetime
damage ratio is shown in Fig. 13, which is used for updating model has its limitations due to the specific test conditions,
the capacitance with different degradation ratios. Therefore, component technologies, and failure mechanism considered.
the accelerated degradation of the capacitor can be considered Therefore, the uncertainty of fitting coefficients corresponds
in the lifetime estimation procedure. to the thermal stress p2 is taken into account. Regarding the
3) Monte-Carlo Based Analysis: This section investigates second type of uncertainty, the end-of-life of a large population
the reliability of DC-link capacitors by taking into account the of capacitors with the same specification and same product

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10

-3
x 10
4 2 0.4

pdf
pdf

pdf
2 1 0.2

0 0 0
4600 4800 5000 5200 5400 9.5 10 10.5 48 50 52 54
L0 p2 Th
20 20 20

Density (%)
Density (%)

Density (%)
10 10 10

0 0 0
1.8 2 2.2 5 2.4 1 2 3 4 5 1 2 3 4 5
Number of hours to failure x 10 x 10 Number of hours to failure x 10
Number of hours to failure

Fig. 14. Probability density functions of the parameters under analysis and lifetime probability distribution function.

20 1
Damage
18 0.8 Damage line
Temperature raise (degree)

16

Damage
0.6
14
0.4
12 y 0.9752x 2.5
10 0.2
8 0
6 0 0.2 0.4 0.6 0.8 1
4
Damage ratio (%)
2
Fig. 12. Nonlinear accumulated damage model of capacitor.
0
Balance 3 % amplitude 3 % phase
1
Normalized capacitance

unbalance unbalance
Estimated hot-spot Experimentally measured
temperature case temperature 0.95

0.9 y 0.1595x 2 0.00039x 1


Fig. 11. Comparison between experimental and estimated capacitor temper-
ature in LC filtering configuration with 5 kW loading condition. Normalized capacitance
0.85
Normalized capacitance line

0 0.2 0.4 0.6 0.8 1


part number varies in field operations due to variances in the Damage ratio (%)
manufacturing process. The variances in L0 and Th are taken
into account in this analysis, since it has a direct effect on Fig. 13. The relationship between the capacitance reduction and
damage ratio.
the capacitor lifetime. All the parameters in the analysis are
modeled by means of normal probability distribution functions
as shown in Fig. 14. p2 , L0 and Th are assumed to have a 5
% variation, respectively, with a 90 % confidence level.
Following the lifetime estimation procedure, the lifetime by the unbalance condition are increasing with the unbalance
of the capacitors in the LC filter are shown in Fig. 15. level and further amplified by the resonant oscillation, where
The study does not consider the varying loading conditions the resonant frequency of the LC filter is around 120 Hz.
and grid conditions. Moreover, the lifetime prediction of For the slim capacitor, under amplitude unbalance condition,
film capacitors in the slim drive solution is limited to the the lifetime do not decrease with the increasing unbalance
electro-thermal stresses only, while humidity aspect failure level. The high frequency harmonics around the resonant
mechanisms are not considered for this comparative study. frequency play a critical role compared with the low frequency
Under the grid voltage-balanced condition, the lifetime of the harmonics. But because of low ESR at whole frequency range,
two cases decrease with the increasing output power of the it has insignificant impact on the power loss, thermal loading
system. Compared with the conventional LC filter, the slim and reliability. This study does not intend to be conclusive to a
capacitor has longer lifetime under balanced condition. With field application, since the focus of Fig. 15 is to investigate the
the increase of the grid voltage-unbalanced level, the reliability impact of loading levels and unbalance levels on the lifetime of
behavior will change accordingly. For the LC filter, the lifetime the DC-link capacitors. Nevertheless, Fig. 15 reveals that the
might be significantly shortened, such as the scenarios of 5 % grid voltage unbalances have obvious impact on the capacitor
and 10 % amplitude unbalance, and 10 % phase unbalance. reliability, which should be taken into account in the design
The reason is that the low frequency harmonics introduced phase of the motor drives.

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5 kW3 kW1 kW >20 yrs area >20 yrs area 5 kW 3 kW 1 kW


0.05 0.05

Cumulative distribution function


Cumulative distribution function
0.04 0.04

0.03 0.03

0.02 0.02
12 yrs 14 yrs 23 yrs 24 yrs
B1 B1
0.01 0.01
13 yrs

0 0
0 0.5 1 1.5 2 2.5 3 3.5 0 0.5 1 1.5 2 2.5 3 3.5
Number of hours to failure x 105 Number of hours to failure x 105

(a) Balance condition for LC filter. (d) Balance condition for slim capacitor.

10 % 5 % 3% >20 yrs area >20 yrs area 10 % 3% 5 %


0.05 0.05
Cumulative distribution function

Cumulative distribution function


0.04 0.04

0.03 0.03

0.02 0.02
4 yrs 4 yrs 10 yrs
B1 B1 22 yrs 23 yrs
0.01 0.01

0 0
0 0.5 1 1.5 2 2.5 3 3.5 0 0.5 1 1.5 2 2.5 3 3.5
Number of hours to failure x 105 Number of hours to failure x 105
(b) Amplitude unbalance for LC filter (5 kW). (e) Amplitude unbalance for slim capacitor (5 kW).

10 % 5 %3 % >20 yrs area >20 yrs area 10 % 5 % 3%


0.05 0.05
Cumulative distribution function
Cumulative distribution function

0.04 0.04

0.03 0.03

0.02 0.02
B1 2 yrs 10 yrs 22 yrs
B1
0.01 0.01

0 0
0 0.5 1 1.5 2 2.5 3 3.5 0 0.5 1 1.5 2 2.5 3 3.5
Number of hours to failure x 105 Number of hours to failure x 105
(c) Phase unbalance for LC filter (5 kW). (f) Phase unbalance for slim capacitor (5 kW).

Fig. 15. Lifetime estimation results of the ASD system with two different DC-link configurations. The results do not consider the varying loading conditions
and grid conditions. Moreover, the lifetime prediction of film capacitors in the slim drive solution is limited to the electro-thermal stresses only, while humidity
aspect failure mechanisms are not considered for this comparative study. The lifetime in the proposed method are the B1 lifetime, which means that 1 % of
the sample fails when the capacitors reach its lifetime.

B. Mission Profile Based Lifetime Estimation of Capacitor in reaches 0.4 %, and the maximum value reaches 3 %.
LC Filter According to the proposed lifetime estimation procedure,
In order to evaluate the lifetime of the capacitors under real the mission profile need to be translated to thermal loading
operating conditions, a mission profile, which is a representa- at the beginning. Based on the electrical stress in a range of
tion of the operating condition of the system, is needed. In the the voltage unbalanced levels extracted from simulation, the
case of the ASD application, the voltage amplitude unbalanced thermal loading under certain mission profiles can be obtained
level is considered as mission profile, since the capacitors’ as shown in Fig. 16 (b). The hot-spot temperature in the
lifetime are strongly dependent on the grid conditions. Fig. 16 mission profile per day varies from 7 o C to 12 o C. If ignore
(a) shows a one-day mission profile case from China [26]. The the grid voltage-unbalanced mission profile, the temperature
unbalanced level varies in a range, where the minimum value variation under balanced condition is 2 o C. Based on the

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>20 yrs area


Voltage unbalanced level (%) 3.5 0.05

Cumulative distribution function


3
2.5 0.04

2
0.03
1.5
1 0.02
0.5
B1 13 yrs 14 yrs
0 0.01
1 3 5 7 9 11 13 15 17 19 21 23
Time (hours) 0
(a) Voltage unbalance mission profile. 0 0.5 1 1.5 2 2.5 3 3.5
5
Number of hours to failure x 10
Internal temperature raise (Degree)

14
12
Fig. 17. Lifetime comparison of a 5 kW ASD under grid voltage balanced
10 condition (black curve) and grid voltage unbalanced mission profile (red
dashed curve).
8
6
350
4
2 300

Resonant frequency (Hz)


0 150 µF, fresonant= 258 Hz
1 3 5 7 9 11 13 15 17 19 21 23 250
Time (hours)
(b) Thermal loading per day under the mission profile. 200 350 µF, fresonant= 165 Hz
0.0008
150
0.0007 680 µF, fresonant= 121 Hz
Damage ratio (%)

0.0006
100
0.0005
0.0004 50
100 500 900
0.0003
Capacitance (µF)
0.0002
0.0001 Fig. 18. Relationship between capacitance and resonant frequency of the
DC-link LC filter using the parameters in Table I.
0
1 3 5 7 9 11 13 15 17 19 21 23
Time (hours)
(c) Damage ratio per hour under the mission profile per day.
not consider reliability into the sizing procedure. This section
studies the lifetime variation due to different capacitance. The
Fig. 16. Mission profile and damage ratio of capacitor per day.
range of capacitance results in different DC-link capacitor
current spectrum, which will further change the lifetime of the
estimated thermal loading and the nonlinear accumulated DC-link capacitor. If the inductance is constant, the resonant
damage model discussed in above section, the damage for frequency of the LC filter is changed with the capacitance. For
one day can be accumulated, which is shown in Fig. 16 (c). a case study, the motor drive with the same series components
Because of the data availability, the mission profile per day shown in Table I and range of capacitance is investigated. The
shown in Fig. 16 (a) is extended to the whole year to estimate relationship between capacitance and the resonant frequency
the B1 lifetime. Fig. 17 shows the lifetime estimation results is shown in Fig. 18. In the conventional LC filter sizing
with the voltage unbalanced mission profile. The B1 lifetime procedure, the resonant frequency of the LC filter is always
of the mission profile based estimation is one year shorter than designed below 300 Hz to filter the six times fundamental
that the lifetime with the grid voltage balanced condition. It ripple component. From the resonant frequency perspective,
indicates the mission profile introduces a significant difference larger capacitance values move the resonant frequency away
in the lifetime and can not be ignored during the lifetime from 300 Hz, which will reduce the gain for the 300 Hz ripple
estimation procedure when doing design. and it has the potential to reduce the thermal loading.
The lifetime estimation procedure proposed in this paper is
applied. The current spectrum with different capacitance can
C. Capacitor Sizing Considering Reliability Performance be obtained through a mathematical model, circuit simulation
The conventional LC filter sizing criteria provide a capac- or experimental measurement. The data incorporated in the
itance range based on the stability analysis, while it does following analysis are based on simulation in Matlab R2014a.

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60 60
350 µF, fresonant= 165 Hz
Internal temperature raise (℃)

Internal temperature raise (℃)


650 µF, fresonant= 124 Hz
680 µF, fresonant= 121 Hz
40
40

150 µF,
fresonant= 258 Hz

20 20

0 100
0 100 500 900
500 900
Capacitance (µF)
Capacitance (µF)

Fig. 21. Estimated Th of the capacitor with different capacitance under 10


Fig. 19. Estimated internal temperature raise of the capacitor with different
% phase angle unbalanced condition.
capacitance under balanced condition.
4
x 10
4 x 10
12 12

10 10

B1 lifetime (hours)
B1 lifetime (hours)

10 years
8 8 150 µF,
fresonant= 258 Hz
6 6
650 µF, fresonant= 124 Hz
680 µF, fresonant= 121 Hz
4 4

2 2 350 µF,
fresonant= 165 Hz
0 0
100 500 900 100 500 900
Capacitance (µF)
Capacitance (µF)

Fig. 20. Estimated lifetimes of DC-link capacitor with different capacitances


Fig. 22. Estimated lifetimes of the DC-link capacitor with different
under balanced grid voltages.
capacitances under 10 % phase angle unbalance condition.

The estimated hot-spot temperature can be seen in Fig. 19 and only depends on the gain of the harmonics, but it is also
shows that with larger capacitance, the hot-spot temperature is related to the nonlinear current distribution. Fig. 22 shows
reduced due to a) smaller gain for the 300 Hz ripple current, the estimated lifetime of the DC-link capacitors with range of
and b) larger value capacitor has smaller ESR. The estimated capacitance. With larger capacitance, the resonant frequency
lifetime can be seen in Fig. 20. The lifetime will increase will move to lower frequency range and get closer to the
with the capacitance, which follows the opposite trend to the harmonic frequency. When the resonant frequency is around
temperature. If it is assumed that 10 years is the design target the harmonic frequency, the shortest lifetime can be found
under balanced conditions, the capacitance should be sized where the capacitance is 350 µF . With further larger capaci-
larger than 300 µF from the reliability point of view. tance value, the resonant frequency becomes even smaller and
consequently reduces the gain at the harmonic frequency as
From Fig. 15, it can be seen that the lifetime of the
well as the thermal loading of the DC-link capacitor. Based on
DC-link capacitor under unbalanced conditions has different
the above estimated lifetime, it can be seen that the capacitance
performance compared with balanced condition, and the worst
should be selected larger than 350 µF in order to reach the
case in this study is in 5 kW drive under 10 % phase angle
lifetime target for both balanced and unbalanced conditions.
unbalance condition. Therefore, the case study corresponding
to the impact of the capacitance is based on the worst case.
Following the same evaluation procedure with the balanced V. C ONCLUSIONS
condition, the hot-spot temperature of the capacitors under This paper investigates the reliability of the DC-link capac-
10 % phase angle unbalanced condition can be estimated, itors in grid-connected adjustable speed drives. A capacitor
which can be seen in Fig. 21. The relationship between lifetime estimation procedure considering the nonlinear accu-
capacitance and estimated hot-spot temperature is not linear mulated damage model for long-term and variable loading
as the case study with balanced condition in Fig. 19. It not conditions is proposed. Based on the proposed estimation

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Transactions on Power Electronics

14

method, the lifetime of the DC-link capacitor in a LC filter [15] K. Lee, T. M. Jahns, G. Venkataramanan, and W. E. Berkopec,
and a comparable slim capacitor DC-link filter under grid “Dc-bus electrolytic capacitor stress in adjustable-speed drives
voltage balanced and unbalanced conditions are investigated. under input voltage unbalance and sag conditions,” IEEE Trans.
Ind. Appl., vol. 43, no. 2, pp. 495–504, Mar. 2007.
It quantifies that significant impact of power rating and grid [16] Y. Yang, K. Ma, H. Wang, and F. Blaabjerg, “Instantaneous ther-
conditions, which should be considered in the concept phase mal modeling of the dc-link capacitor in photovoltaic systems,”
and design phase of a motor drive development. Based on the in Proc. IEEE APEC, Mar. 2015, pp. 2733–2739.
case study with the presented specification, it can be concluded [17] ——, “Mission profile translation to capacitor stresses in grid-
that: connected photovoltaic systems,” in Proc. IEEE ECCE, Sep.
2014, pp. 5479–5486.
1) The lifetime of the LC filter DC-link configuration [18] D. Zhou, H. Wang, and F. Blaabjerg, “Mission profile based
is lower than half of the slim capacitor, especially under system-level reliability analysis of dc/dc converters for a backup
amplitude and phase unbalance conditions; power application,” IEEE Trans. on Power Electron., pp. 1–1,
2) In normal operation, the existing grid voltage-unbalanced 2017.
[19] D. Kumar, P. Davari, F. Zare, and F. Blaabjerg, “Analysis of
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0885-8993 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2018.2863701, IEEE
Transactions on Power Electronics

15

Pooya Davari (S’11-M’13) received the B.Sc. and Firuz Zare (S’98-M’01-SM’06) received his PhD
M.Sc. degrees in electronic engineering from the in Power Electronics from Queensland University
University of Mazandaran, Babolsar, Iran, in 2004 of Technology in Australia in 2002. He has spent
and 2008, respectively, and the Ph.D. degree in several years in industry as a team leader working on
power electronics from Queensland University of power electronics and power quality projects. Prof.
Technology (QUT), Brisbane, Australia, in 2013. Zare has received several awards such as an Aus-
From 2005 to 2010, he was involved in several tralian Future Fellowship, Symposium Fellowship by
electronics and power electronics projects as a De- the Australian Academy of Technological Science,
velopment Engineer. From 2010 to 2014, he investi- early career academic excellence research award
gated and developed high-power high-voltage pow- and John Madsen Medal from Engineers Australia.
er electronic systems for multidisciplinary projects, He has published over 220 journal and conference
such as ultrasound application, exhaust gas emission reduction, and tissue- papers and technical reports in the area of Power Electronics. He is an
materials sterilization. From 2013 to 2014, he was a Lecturer with QUT. He academic staff at the University of Queensland in Australia and a Task Force
joined, as a Postdoctoral Researcher, the Department of Energy Technology, Leader of Active Infeed Converters within Working Group one at the IEC
Aalborg University, Aalborg, Denmark, in 2014, where he is currently an standardization TC77A. Prof Zare is a senior member of IEEE, the Editor in
Associate Professor. His current research interests include EMI/EMC in Chief of International Journal of Power Electronics and the associate editor
power electronics, WBG-based power converters, active front-end rectifiers, of IEEE Access journal. His main research areas are a) Power Electronics
harmonic mitigation in adjustable-speed drives, and pulsed power applications. Topology, Control and Applications, b) Power Quality and Regulations and
Dr. Davari received a research grant from the Danish Council of Independent c) Pulsed Power Applications.
Research (DFF-FTP) in 2016.

Huai Wang (M’12-SM’17) received the B.E. degree


in electrical engineering, from Huazhong University
of Science and Technology, Wuhan, China, in 2007
and the Ph.D. degree in power electronics, from
the City University of Hong Kong, Hong Kong,
in 2012. He is currently an Associate Professor at
the Center of Reliable Power Electronics (CORPE),
Aalborg University, Aalborg, Denmark. He was a
Visiting Scientist with the ETH Zurich, Switzerland,
from Aug. to Sep. 2014, and with the Massachusetts
Institute of Technology (MIT), USA, from Sep. to
Nov. 2013. He was with the ABB Corporate Research Center, Switzerland, Frede Blaabjerg (S’86-M’88-SM’97-F’03) was
in 2009. His research addresses the fundamental challenges in modelling and with ABB-Scandia, Randers, Denmark, from 1987
validation of power electronic component failure mechanisms, and application to 1988. From 1988 to 1992, he got the PhD degree
issues in system-level predictability, condition monitoring, circuit architecture, in Electrical Engineering at Aalborg University in
and robustness design. Dr. Wang received the Richard M. Bass Outstanding 1995. He became an Assistant Professor in 1992,
Young Power Electronics Engineer Award from the IEEE Power Electronics an Associate Professor in 1996, and a Full Profes-
Society in 2016, and the Green Talents Award from the German Federal sor of power electronics and drives in 1998. From
Ministry of Education and Research in 2014. He is currently the Award 2017 he became a Villum Investigator. His current
Chair of the Technical Committee of the High Performance and Emerging research interests include power electronics and its
Technologies, IEEE Power Electronics Society, and the Chair of IEEE applications such as in wind turbines, PV systems,
PELS/IAS/IE Chapter in Denmark. He serves as an Associate Editor of IET reliability, harmonics and adjustable speed drives.
POWER ELECTRONICS, IEEE JOURNAL OF EMERGING AND SELECT- He has published more than 500 journal papers in the fields of power
ED TOPICS IN POWER ELECTRONICS, and IEEE TRANSACTIONS ON electronics and its applications. He is the co-author of two monographs and
POWER ELECTRONICS. editor of 7 books in power electronics and its applications. He has received
24 IEEE Prize Paper Awards, the IEEE PELS Distinguished Service Award in
2009, the EPE-PEMC Council Award in 2010, the IEEE William E. Newell
Power Electronics Award 2014 and the Villum Kann Rasmussen Research
Award 2014. He was the Editor-in-Chief of the IEEE TRANSACTIONS ON
POWER ELECTRONICS from 2006 to 2012. He has been Distinguished
Lecturer for the IEEE Power Electronics Society from 2005 to 2007 and for
Dinesh Kumar (S’08-M’12) received Master of the IEEE Industry Applications Society from 2010 to 2011 as well as 2017 to
Technology (M. Tech) in power system engineering 2018. In 2018 he is President Elect of IEEE Power Electronics Society. He is
from Indian Institute of Technology (IIT), Roorkee, nominated in 2014, 2015, 2016 and 2017 by Thomson Reuters to be between
India, in 2004, and Ph.D. degree in power electronics the most 250 cited researchers in Engineering in the world. In 2017 he became
from the University of Nottingham, U.K., in 2010. Honoris Causa at University Politehnica Timisoara (UPT), Romania.
From 2004-2005, he served as a Lecturer in Electri-
cal Engineering Department at National Institute of
Technology, Kurukshetra, India. In 2006, he joined
Technical University Chemnitz, Germany as a Re-
search Fellow. From 2006 to 2010, he investigated
and developed matrix converter based multidrive
system for aerospace applications. Since 2011, he has been with the Danfoss
Drives A/S, Denmark, where he is involved in many research and industrial
projects. His current research interests include motor drive, harmonic analysis
and mitigation techniques, power quality and electromagnetic interference in
power electronics. He is the Editor of International Journal of Power Electron-
ics and the Associate Editor of IEEE Transaction on Industry Applications.

0885-8993 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

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