7/8/2020 HPC - Unit Test-I ( 9 July 2020)

HPC - Unit Test-I ( 9 July 2020)

1. The _________________ plays very important role in superscalar processors * 2 points

Mark only one oval.

Memory

Peripherals

Motherboard

Compilers

2. Which of the following is true about parallel computing performance? * 2 points

Mark only one oval.

Computations use multiple processors

There is an increase in speed.

Increase in speed is loosely tied to the number of processor or computers used.

All of the above

3. In superscalar processors, _____________ mode of execution is used * 2 points

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In order

Post order

Out of order

None of the above

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7/8/2020 HPC - Unit Test-I ( 9 July 2020)

4. Type of HPC applications is_ * 2 points

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A. Management

B. Media mass

C. Business

D. Science

5. VLIW performance is highly dependent on the _____ * 2 points

Mark only one oval.

Branch prediction

Compiler

loop unrolling

speculative execution

Q6 to Q10

6. FLOPS stands __ * 2 points

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Flip Flop

Floating point operating system per second

Floating point operation per second

Floating point second

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7/8/2020 HPC - Unit Test-I ( 9 July 2020)

7. If increasing in the memory block size then it affects latency * 2 points

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Latency becomes zero

Latency becomes less

Latency becomes more

Does not affect

8. which pages we are going to browse ahead of time and issue requests for 2 points
them in advance...this approach know as__________ *

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multithreading

spatial locality

prefetching

none of the above

9. Following is the drawback of SIMD architectures * 2 points

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High Bandwidth

Hardware Cost

Single Control Unit

Resource utilization

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7/8/2020 HPC - Unit Test-I ( 9 July 2020)

10. UMA & NUMA consider the following factor to access any memory word * 2 points

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time

speed

cost

delay

Q11 to Q15

11. "Degree" of the switch referred to as * 2 points

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Only input ports

Only output ports

total number of ports

none of the above

12. What is the role of an interconnection network? * 2 points

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To transport data and messages between static and dynamic networks

To transport data and messages between the processing unit and memory modules

To transport memory modules through switches

To transport memory and processing units via switches

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7/8/2020 HPC - Unit Test-I ( 9 July 2020)

13. Following is the limitation of the snoopy protocol * 2 points

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Each coherence operation is sent to all processors

each coherence operation is sent to limited processors

each coherence operation is sent to selected processors

each coherence operation is sent to only those processors that need to be notified

14. In Packet Routing, each packet must carry * 2 points

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error checking information

sequencing information

header information

all of the above

15. 4*4 mesh can be mapped into the following hypercube * 2 points

Mark only one oval.

1-D Hybercube

2-D Hybercube

3-D Hybercube

4-D Hybercube

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