MECHATRONICS LAB

ME 140L

DAC: DIGITAL-TO-ANALOG CONVERSION

ADC: ANALOG-TO-DIGITAL CONVERSION

Excellent websites:
http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/adc.html
http://en.wikipedia.org/wiki/Digital-to-analog_converter
http://www.analog.com/en/cat/0,2878,760,00.html
http://www.irctt.com/pdf_files/LADDERNETWORKS.pdf
http://www.allaboutcircuits.com/vol_4/chpt_13/8.html

I. INTRODUCTION: INTERFACING WITH PC

• Computers are inherently digital—some sensors (switches, encoders,
relays) are digital so interfacing with the PC is easy through the digital
I/O.
• Most sensor readings are analog signals (mV, mA) and most actuators
require analog voltages or currents (24V, 3A)—need signal conditioning
Need to translate :
1) analog sensor signals into digital (binary) quantities—analog-to-
digital converter (ADC) and
2) digital signals into analog actuator quantities—digital-to-analog
converter (DAC)
A. DAQ (data acquisiton card/system)

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B. Sample and Hold
• Take analog signal and digitize (make into a series amplitude
modulated pulses). Use sample and hold: switch and capacitor

Analog signal showing sample times Digitized signal

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C. Quantization
n-bit binary string defines 2n distinct states.
Resolution of one part in 2n.
Example: Signal varies from 0 to 1V—to be represented by 3 bits.
23=8 distinct states with resolution 0.125=1/8

States Voltage
000 0.000
001 0.125
010 0.250
011 0.375
100 0.500
101 0.625
110 0.750
111 0.875

Notice if your input analog signal S is 0.875<S<1, the digital output

representation is still 111—error due to quantization.

To reduce error: use more bits—example for 8 bit representation

Resolution =1V/28= 1/256=0.00391volt

0000 0000 (0) represents 0.0000V

0000 0001 (1) represents 0. 00391V
0000 0010 (2) represents 0. 00782V
…………
…………
…………
1111 1111 (255) represents 0.9961V

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A. The Weighted Resistance DAC
Binary-weighted-input DAC—Consider three binary inputs—input resistors
on a summing amplifier are multiple powers of two: R, 2R, and 4R
(therefore binary-weighted inputs)

⎛V V V ⎞
From op - amps : Vout = (I1 + I 2 + I 3 )R f = -⎜ 1 + 2 + 3 ⎟R f
⎜ R 2R 4R ⎟
⎝ ⎠
⎛V V V ⎞
and with R f = R Vout = -⎜ 1 + 2 + 3 ⎟
⎜ 1 2 4 ⎟⎠
⎝

• Now letting all input voltages being Vref (corresponding to 1) or

ground (corresponding to 0), we get a binary representation as input
and analog signal as output.

⎛a a a ⎞
Vout = -⎜ 1 + 2 + 3 ⎟ Vref where a i = 0 or 1, a1 = most significant bit
⎜1 2 4 ⎟⎠
⎝

How do we increase resolution of DAC?????? Add more bits to the

inputs.

⎛a a a a a a a a ⎞R
Vout = -⎜ 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8 ⎟ f Vref ← 8 − bit DAC
⎜1 2 4 8 16 32 64 128 ⎟⎠ R
⎝

Resolution =10V/28= 10/256=0.0391volt

Disadvantage of weighted resistance DAC: every resistor is different

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Example: 4-bit Weighted Resistance DAC

1000
R
Rf
V ⎡V ⎤
i = out = − ⎢ in ⎥
Vin 2R R
f ⎢⎣ R ⎥⎦
4R Vout R
→ Vout = −V f
8R
in R

1010
R
Rf
Vout ⎡V V ⎤
i= =− ⎢ in + in ⎥
Vin 2R R
f ⎢⎣ R 4R ⎥⎦
5 Rf
4R Vout

→ Vout = −V
8R in 4 R
Vin1

0111
R
Rf
V ⎡V V V ⎤
i = out = − ⎢ in + in + in ⎥
2R R
f ⎢⎣ 2R 4R 8R ⎥⎦
4R Vout
7 Rf
→ Vout = −V
8R
in 8 R
Vin

1111
R
Rf
V ⎡V V V V ⎤
i = out = − ⎢ in + in + in + in ⎥
2R R
f ⎢⎣ R 2R 4R 8R ⎥⎦
Vout
4R
15 R f
→ Vout = −V
8R in 8 R
Vin

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B. R-2R LADDER DAC
• Uses only two kinds of resistor values and with only a modest
increase in resistor count.

4-bit "ladder" networks look like:

Including an op-amp, looks like:

For a 4-bit DAC Converter

⎡D D D D ⎤R
Vout = ⎢ 3 + 2 + 1 + 0 ⎥ f Vref
⎣ 2 4 8 16 ⎦ R

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III. ADC: ANALOG-TO-DIGITAL CONVERSION
Most ADCs contain DACs to do conversion

A. Successive Approximation ADC

If you were asked to guess a number between 0 and 10 and if wrong I would
tell you which direction to go, what would your first guess be?
• Counts by trying all values of bits starting with the most-significant
bit and stepping through to finish at the least-significant bit.
• At each step, the register monitors the comparator's output to see if the
binary count is less than or greater than the analog signal input,
adjusting the bit values accordingly.
• Uses a successive approximation register (SAR), comparator and
DAC

Schematically with time: updates occur at regular intervals

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Example:

Consider: Vref=1V, 4-bit ADC—resolution is 1/24= 0.0625V

Let Vin=0.630V—you are asked to find the 4-bit equivalent--ADC

Successive Approximation Algorithm:

Step 1: Reset all bits to 0

Step 2: Set most significant bit to 1: 1000=8*0.0625=0.5V

Vin>0.5V, therefore set MSB to 1

Step 3: Keeping MSB=1, set next significant bit

1100=12*0.0625=0.75V Vin<0.75V therefore reset bit to 0

Step 4: MSB=1, next bit =0, set next bit to 1

1010=10*0.0625V=0.625V Vin>0.625V therefore keep bit set to 1

Step 5: MSB=1, next bit=0, next bit=1, set LSB=1

1011=11*0.0625V=0.6875V Vin<0.6875V therefore reset LSB to 0

Finally: Binary number is 1010 with an error of 0.005V.

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B. Tracking ADC

• Counter starts counting upward. When the DAC output exceeds the
analog input, the counter switches into the "count down" mode.

• Then the DAC output always counts in the proper direction to track
the input signal. The binary output is updated with every clock pulse.

Disadvantage: the binary output is never stable: it always switches between

counts with every clock pulse, even with a perfectly stable analog input
signal. This phenomenon is informally known as bit bobble, and it can be
problematic in some digital systems.

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III. PRACTICAL CONSIDERATIONS FOR ADC

A. Resolution
Most important consideration.
Resolution is the number of binary bits output by the converter.
10-bit ADC can represent up to 1024 =210 unique states. Over the range of
measurement from 0% to 100%, there will be exactly 1024 unique binary
numbers output by the converter (from 0000000000 to 1111111111, or in
decimal from 0 to 1023).

A 16-bit ADC will have 65536, or 216 states.

B. Sampling Frequency (conversion rate)

The speed at which the converter outputs a new binary number.

If the sample period is too long (too slow), substantial details of the analog
signal will be missed. ADC sample time must be sufficiently fast to capture
details of the signal.
The highest-frequency waveform that an ADC can theoretically capture is
called the Nyquist frequency, equal to one-half of the ADC's sample
frequency.

That is, you must sample at least twice the frequency of the highest
frequency in the signal. If you wish to reproduce a signal with 2500 Hz, the
ADC circuit must sample at a frequency of 5000 Hz.

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 Aliasing

If the analog input signal has frequency that exceeds the Nyquist
frequency for that ADC, the converter will output a digitized signal of
falsely low frequency—called aliasing.

Note: the period of the output waveform is much longer (slower) than that of
the input waveform. Also waveform shapes are very different.

The Nyquist frequency is the maximum theoretical frequency limit for an

ADC, and may not represent the highest practical frequency measurable. To
be safe, assume that the ADC will successfully resolve frequencies about
one-fifth to one-tenth of its sample frequency.

Moreover, the frequency content of the signal is not usually known apriori.
If so, determine what the maximum frequency you are interested in, and
place a low-pass filter before the input of the ADC, to filter any signal
frequencies greater than the your desired maximum frequency.

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