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Full Adder Circuit Design in Tinkercad

This document describes the design and verification of a full-adder circuit using Tinkercad. The objective was to design a full-adder circuit using basic logic gates and verify its truth table. The procedure involved writing the truth table, solving it using a K-map, and designing the circuit with two XOR gates, two AND gates, and one OR gate. Results showed that the logic gate diagram was constructed correctly and the truth table was verified based on the LED outputs representing high and low logic levels. The conclusion was that the full-adder circuit implementation was more complex than previous circuits but provided good insight into using multiple logic gates and ICs.
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0% found this document useful (0 votes)
2K views6 pages

Full Adder Circuit Design in Tinkercad

This document describes the design and verification of a full-adder circuit using Tinkercad. The objective was to design a full-adder circuit using basic logic gates and verify its truth table. The procedure involved writing the truth table, solving it using a K-map, and designing the circuit with two XOR gates, two AND gates, and one OR gate. Results showed that the logic gate diagram was constructed correctly and the truth table was verified based on the LED outputs representing high and low logic levels. The conclusion was that the full-adder circuit implementation was more complex than previous circuits but provided good insight into using multiple logic gates and ICs.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
  • Objective
  • Procedure
  • Results and Interpretation
  • References
  • Conclusion

GROUP NO.

7
BELLECA, JANPHERSON C.
DELOS SANTOS, JULIANA MAE M.

A FULL-ADDER CIRCUIT DESIGN USING TINKERCAD


OBJECTIVE
• To design, construct and verify the working of Full-Adder Circuit using basic gates.
• To study about full adder and verify its truth table.

PROCEDURE
1. Write the truth table for variables A, B and Ci.

A B Cin S Cout

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

2. Truth table was solved with the help of K-map.


3. Design and build a Full-Adder using two XOR gates, two AND gates and one OR gate.

4. Circuit was connected and the outputs of sum and carry was got separately.
5. Connect the pin no.14 to 5v supply of all IC‟s used in circuit.
6. Pin no. 7 will be grounded of all IC‟s

RESULTS, FIGURES AND INTERPRETION

Full Adder Logic Gate Diagram


Two input XOR gate, two input AND gate, two input OR gate forms the full adder logic
circuit, Input & Output of this logic diagram can be derived by the following truth table.
When both inputs are low then sum and carry out will be logic low (0), if any one input is
high then sum will be logic high (1) and carry out will be logic low (0), when two inputs are high
then sum becomes logic low (0) and carry out becomes logic high (1) when all inputs are high (1)
the output sum and carry out will be logic high (1). With this, we can say that the figures above
shows that the truth table of full adder is verified.

XOR gate IC 7486 and Logic AND gate IC 7408 and OR gate IC 7432 are used to construct
the full adder circuit, both are quad 2 input logic gate IC. First connect Vcc +5V and GND supply
to logic IC, Input A, B is connected to the XOR gate input then AND gate input, output of first
XOR gate (Pin 3) is connected to the next XOR gate input pin 4 and Cin connected to XOR gate
input pin 5. Second AND gate takes A⊕B, Cin as inputs. XOR gate pin 6 taken as Sum Result
and connected to LED1 through R1. Two AND gate outputs are added by OR gate then OR gate
pin 3 taken as Carry out output and connected to LED2 through R2 resistor. After making the
connection verify the full adder truth table. When LED glows it represents logic High (1), during
OFF condition LED represents logic Low (0).
CONCLUSION
The implementation of the full adder circuit is more complex than the other circuits which
have been looked at so far. Full adder is used for a somewhat higher degree of addition operations.
This circuit required some degree of carefulness to implement and debug it. Other than that, all
results were as expected, and we ready to learn more about using logic, especially with multiple
AND/OR/XOR gates and IC’s. We see a lab like this necessary to appreciate how little messy
work we have to do today, as it provides very good insight.

REFERENCES
Petzold, Charles. Code: The Hidden Language of
Computer Hardware and Software.
Redmond, WA: Microsoft Press, 2000. Print.
Malvino, Albert Paul, and Donald P. Leach. Digital
Principles and Applications. 2nd ed.
New York: McGraw-Hill, 1975. Print
De Morgan’s Theorems
Half Adder and Full Adder Circuits
NAND Logic

Common questions

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A full adder circuit is deemed more complex compared to other circuits because it involves multiple logic gates and their careful interconnection to correctly produce the sum and carry output for binary addition. This complexity arises from the necessity to incorporate not just XOR gates, but also AND and OR gates, all of which need to be precisely connected respecting logic levels and flow of the operation. The document highlights the meticulous nature required to implement and troubleshoot the full adder circuit successfully, underscoring a higher level of intricacy relative to simpler circuits .

The carry input (Cin) in a full adder circuit is handled by being fed into the XOR gate alongside the output of the XOR combination of the primary inputs A and B. This arrangement allows the carry input to influence the calculation of the final sum by factoring into whether an additional one is added to the binary sum operation. Further, the carry input is part of the logical operations for the AND gates, which determine whether the final carry out is triggered in tandem with combinations of A and B. The inclusion of Cin makes the full adder capable of chaining with other full adders for multi-bit arithmetic operations .

The use of specific ICs like XOR gate IC 7486, AND gate IC 7408, and OR gate IC 7432 in a full adder circuit is significant as they provide the standardized components necessary for executing binary logical operations at an integrated circuit level. These ICs are quad 2-input logic gates, ensuring efficient and repeatable setup for educational and practical circuitry projects. By utilizing ICs, the construct of a full adder becomes modular and easier to assemble, troubleshoot, and modify in learning settings or prototypical implementations within digital systems .

A full adder circuit is constructed using two XOR gates, two AND gates, and one OR gate. The XOR gate IC (IC 7486) and the Logic AND gate IC (IC 7408) along with the OR gate IC (IC 7432) are used, all of which are quad 2-input logic gate ICs. Connections are made such that the inputs A and B are connected first to the XOR gate inputs, then to the AND gate. The output from the first XOR gate (Pin 3) is connected to the next XOR gate input (Pin 4), with Cin connected to the XOR gate input (Pin 5). The second AND gate takes the A⊕B, Cin as inputs. XOR gate pin 6 is taken as the Sum result and connected to an LED. The two AND gate outputs are combined using the OR gate, and the OR gate's output pin (Pin 3) is taken as the Carry out and connected to a separate LED .

Practical laboratory exercises enhance understanding of digital logic design's complexities by providing direct experience with circuit behaviors and problem-solving in real-time environments. They transition abstract theoretical concepts into tangible experiences, allowing learners to engage with actual implementation dynamics, such as the intricacies of logic gate interactions, voltage level effects, and component interoperability. Labs simplify learning by offering hands-on challenges, prompting critical thinking, and solidifying understanding through practice rather than purely theoretical study .

Constructing a full-adder using TinkerCAD involves several steps: first, writing the truth table for the inputs A, B, and Cin; using a Karnaugh map to solve and identify simplifications; designing the schematic involving two XOR, two AND, and one OR gate; then, physically connecting these components in the digital circuit simulator. The voltage supply pin (pin no. 14) must be connected to a 5V supply, and ground pins must be connected appropriately. The circuits for sum and carry outputs are tested separately, and LEDs are connected to observe the output as logic high (1) or low (0).

Learners attempting to master full adder circuit implementations gain critical insights into structured problem-solving, logic synthesis, and system debugging. They refine a practical understanding of how multiple gate types interact to perform binary arithmetic, deepening their appreciation of logical design principles. By working on real-world implementations, they experience the necessity of detailed planning and verification against truth tables, contributing to an appreciation for precision in digital design. Ultimately, the practice prepares them for more advanced circuits and fosters an adaptable mindset crucial for broader applications in electronics and computer engineering .

The combination of logical gates within a full adder circuit facilitates arithmetic operations by executing binary addition through a defined sequence of logical evaluations. XOR gates implement sum operations by toggling outputs when odd numbers of inputs are high, effectively handling basic addition. AND gates contribute to the detection of carry bits by identifying scenarios where additional value is to be transferred to the next bit, indicating overflow in binary addition. The OR gate synthesizes carry scenarios from the AND gates, ensuring an appropriate carry out is passed along in multi-bit arithmetic operations. This gate synergy enables scalability for larger binary computations .

The full adder verifies its truth table by producing corresponding sum and carry output states for each combination of inputs based on logic gate arrangements. When both inputs are low (0), both sum and carry out are logic low (0). If one input is high (1), the sum is high (1) and carry out is low (0). When two inputs are high, the sum becomes low (0) and carry out becomes high (1). For all inputs being high (1), both the sum and carry out yield high (1). These logic levels are indicated by LEDs where a glowing LED signifies logic High (1) and an off condition indicates logic Low (0).

Experimenting with circuits such as the full-adder is critical for grasping digital logic design because it enables hands-on learning of how logical components integrate to perform binary operations. It brings theoretical concepts to life, allowing learners to appreciate the complexity and practicality of implementing logic gates within circuits. The full adder circuit offers insight into designing and debugging intricate systems, allowing one to engage with higher-level logic employed in computational operations while reducing the abstraction from theoretical learning to practical knowledge application .

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