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Question Paper Code:: (10×2 20 Marks)

The document is a question paper for an examination in VLSI Design. It contains 15 multiple choice questions with 2 options each. The questions cover various topics related to VLSI design including simulated annealing, placement factors, partitioning heuristics, routing approaches, simulation techniques, scheduling algorithms and high level transformations. Students have to answer all questions in 3 hours for a maximum of 100 marks.

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355 views2 pages

Question Paper Code:: (10×2 20 Marks)

The document is a question paper for an examination in VLSI Design. It contains 15 multiple choice questions with 2 options each. The questions cover various topics related to VLSI design including simulated annealing, placement factors, partitioning heuristics, routing approaches, simulation techniques, scheduling algorithms and high level transformations. Students have to answer all questions in 3 hours for a maximum of 100 marks.

Uploaded by

Val Gin
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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*X96159*

Reg. No. :

Question Paper Code : X 96159

M.E. Degree Examinations, November/December 2020


Second Semester
VLSI Design
vl 9221/vl 921/102 44 vl 203 – cad for vlsi circuits
(Common to M.E. – Applied Electronics, M.E. – VLSI Design, M.E. Embedded
Systems and M.E. Digital Electronics and Communication Engineering)
(Regulations 2009/2010)

Time : Three Hours Maximum : 100 Marks

Answer all questions

Part – A (10×2=20 Marks)

1. What is simulated annealing ? What is its significance ?

2. There are three different types of problems faced at the level of Boolean gates.
Name them.

3. What are the factors which decide the quality of a placement ?

4. What are the most successful heuristics for partitioning problems ?

5. What is shape function ?

6. Distinguish between local and global routing.

7. State different levels of abstractions in simulation.

8. Compare compiler driven and event driven simulations.

9. What is resource constrained synthesis ?

10. Define high level transformation.

Part – B (5×16=80 Marks)

11. a) Consider the shortest path problem for directed graphs in which the length of a
path is the number of edges in the path. It can be solved by breadth-first search
method. What actions should be performed by the functions that “process” a
vertex and an edge in order to actually compute the shortest path from any
stact vertex Vs to all other vertices in the graph ?
(OR)
X 96159 *X96159*

b) Write the pseudo code of an algorithm for an exhaustive search by means of


back-tracking for the following travelling salesman problem, obtain the search
tree.

12. a) Write the pseudo code of kernighan-Lin partitioning algorithm and explain it
with a suitable example. (16)
(OR)

b) List out the factors to be considered for partitioning and explain how do simulated
annealing useful in placement problems. (16)

13. a) i) Describe the shape functions, floor plan sizing and optimization problems in
floor planning. (10)
ii) What is the goal of channel routing ? Describe the classical model. (6)
(OR)

b) What are the different approaches to solve global routing problem ? Write an
efficient algorithm to find a path between a pair of points in a rectangular
grid. (16)

14. a) i) What is the data structure used for event-driven simulation ? Explain. (6)
ii) Describe event-driven simulation with an example. (10)
(OR)

b) i) What are the methods used to model signals at switch level simulation ? (6)
ii) Describe switch level simulation with an example. (10)

15. a) i) Describe any two scheduling algorithms. (10)


ii) Discuss data flow graph in brief. (6)
(OR)

b) i) Explain a graph theoretic algorithm for solving assignment problems. (8)


ii) Describe the high level transformation. (8)

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