Lecture-2

JUMP, LOOP AND

CALL
INSTRUCTIONS
The 8051 Microcontroller and Embedded
Systems: Using Assembly and C
  Repeating a sequence of instructions
a certain number of times is called a
LOOP AND
JUMP
loop
INSTRUCTIONS  Loop action is performed by
DJNZ reg, Label
Looping  The register is decremented
 If it is not zero, it jumps to the target
address referred to by the label
A loop can be repeated a  Prior to the start of loop the register is
maximum of 255 times, if loaded with the counter for the number of
R2 is FFH repetitions
 Counter can be R0 – R7 or RAM location

;This program adds value 3 to the ACC ten times

MOV A,#0 ;A=0, clear ACC
MOV R2,#10 ;load counter R2=10
AGAIN: ADD A,#03 ;add 03 to ACC
DJNZ R2,AGAIN ;repeat until R2=0,10 times
MOV R5,A ;save A in R5
  If we want to repeat an action more
LOOP AND
JUMP times than 256, we use a loop inside
INSTRUCTIONS a loop, which is called nested loop
 We use multiple registers to hold the
Nested Loop count

Write a program to (a) load the accumulator with the value 55H, and
(b) complement the ACC 700 times
MOV A,#55H ;A=55H
MOV R3,#10 ;R3=10, outer loop count

NEXT: MOV R2,#70 ;R2=70, inner loop count

AGAIN: CPL A ;complement A register

DJNZ R2,AGAIN ;repeat it 70 times
DJNZ R3,NEXT
  Jump only if a certain condition is
met
LOOP AND JZ label ;jump if A=0
JUMP MOV A,R0 ;A=R0
INSTRUCTIONS JZ OVER ;jump if A = 0
MOV A,R1 ;A=R1
JZ OVER ;jump if A = 0
Conditional ...
Jumps OVER: Can be used only for register A,
not any other register

Determine if R5 contains the value 0. If so, put 55H in it.

MOV A,R5 ;copy R5 to A
JNZ NEXT ;jump if A is not zero
MOV R5,#55H
NEXT: ...
  (cont’)
JNC label ;jump if no carry, CY=0
LOOP AND  If CY = 0, the CPU starts to fetch and
JUMP execute instruction from the address of the
INSTRUCTIONS label
 If CY = 1, it will not jump but will execute the
Conditional next instruction below JNC
Jumps Find the sum of the values 79H, F5H, E2H. Put the sum in registers
R0 (low byte) and R5 (high byte).
(cont’) MOV R5,#0
MOV A,#0 ;A=0
MOV R5,A ;clear R5
ADD A,#79H ;A=0+79H=79H
; JNC N_1 ;if CY=0, add next number
; INC R5 ;if CY=1, increment R5
N_1: ADD A,#0F5H ;A=79+F5=6E and CY=1
JNC N_2 ;jump if CY=0
INC R5 ;if CY=1,increment R5 (R5=1)
N_2: ADD A,#0E2H ;A=6E+E2=50 and CY=1
JNC OVER ;jump if CY=0
INC R5 ;if CY=1, increment 5
OVER: MOV R0,A ;now R0=50H, and R5=02
 8051 conditional jump instructions
LOOP AND Instructions Actions
JUMP JZ Jump if A ＝ 0
INSTRUCTIONS JNZ Jump if A ≠ 0
DJNZ Decrement and Jump if A ≠ 0
Jump if A ≠ byte
Conditional CJNE A,byte
CJNE reg,#data Jump if byte ≠ #data
Jumps
JC Jump if CY ＝ 1
(cont’)
JNC Jump if CY ＝ 0
JB Jump if bit ＝ 1
JNB Jump if bit ＝ 0
JBC Jump if bit ＝ 1 and clear bit

 All conditional jumps are short

jumps
 The address of the target must within
-128 to +127 bytes of the contents of PC
  The unconditional jump is a jump
LOOP AND
in which control is transferred
JUMP
INSTRUCTIONS
unconditionally to the target
location
Unconditional LJMP (long jump)
Jumps  3-byte instruction
 First byte is the opcode
 Second and third bytes represent the 16-
bit target address
– Any memory location from 0000 to
FFFFH
SJMP (short jump)
 2-byte instruction
 First byte is the opcode
 Second byte is the relative target address
– 00 to FFH (forward +127 and backward
-128 bytes from the current PC)
  To calculate the target address of
LOOP AND
JUMP
a short jump (SJMP, JNC, JZ, DJNZ,
INSTRUCTIONS etc.)
 The second byte is added to the PC of the
Calculating instruction immediately below the jump
Short Jump  If the target address is more than -
Address
128 to +127 bytes from the address
below the short jump instruction
 The assembler will generate an error
stating the jump is out of range
 Line PC Opcode Mnemonic Operand
LOOP AND 01 0000 ORG 0000
02 0000 7800 MOV R0,#0
JUMP
03 0002 7455 MOV A,#55H
INSTRUCTIONS 04 0004 6003 JZ NEXT
05 0006 08 INC R0
06 0007 04 INC A
Calculating AGAIN:
07 0008 04 + INC A
Short Jump 08 0009 2477 NEXT: ADD A,#77H
Address 09 000B 5005 JNC OVER
(cont’) 10 000D E4 CLR A
11 000E F8 MOV R0,A
12 000F F9 + MOV R1,A
13 0010 FA MOV R2,A
14 0011 FB MOV R3,A
15 0012 2B OVER: ADD A,R3
16 0013 50F2 JNC AGAIN
17 0015 80FE + HERE: SJMP HERE
18 0017 END
  Call instruction is used to call subroutine
CALL
 Subroutines are often used to perform tasks
INSTRUCTIONS that need to be performed frequently
 This makes a program more structured in
addition to saving memory space
LCALL (long call)
 3-byte instruction
 First byte is the opcode
 Second and third bytes are used for address of
target subroutine
– Subroutine is located anywhere within 64K
byte address space
ACALL (absolute call)
 2-byte instruction
 11 bits are used for address within 2K-byte range
  When a subroutine is called, control
CALL
INSTRUCTIONS is transferred to that subroutine,
the processor
LCALL  Saves on the stack the the address of the
instruction immediately below the LCALL
 Begins to fetch instructions form the new
location
 After finishing execution of
the subroutine
 The instruction RET transfers control back
to the caller
 Every subroutine needs RET as the
last instruction
 ORG 0
BACK: MOV A,#55H ;load A with 55H
CALL MOV P1,A ;send 55H to port 1
LCALL DELAY ;time delay
INSTRUCTIONS MOV A,#0AAH ;load A with AA (in hex)
MOV P1,A ;send AAH to port 1
LCALL DELAY
LCALL SJMP BACK ;keep doing this indefinitely
(cont’) Upon executing “LCALL DELAY”,
the address of instruction below it,
The counter R5 is set to “MOV A,#0AAH” is pushed onto
FFH; so loop is repeated stack, and the 8051 starts to execute
255 times.
at 300H.
;---------- this is delay subroutine ------------
ORG 300H ;put DELAY at address 300H
DELAY: MOV R5,#0FFH ;R5=255 (FF in hex), counter
AGAIN: DJNZ R5,AGAIN ;stay here until R5 become 0
RET ;return to caller (when R5 =0)
END ;end of asm file
When R5 becomes 0, control falls to the
The amount of time delay depends RET which pops the address from the stack
on the frequency of the 8051 into the PC and resumes executing the
instructions after the CALL.
 001 0000 ORG 0
002 0000 7455 BACK: MOV A,#55H ;load A with 55H
CALL 003 0002 F590 MOV P1,A ;send 55H to p1
004 0004 120300 LCALL DELAY ;time delay
INSTRUCTIONS 005 0007 74AA MOV A,#0AAH ;load A with AAH
006 0009 F590 MOV P1,A ;send AAH to p1
CALL 007
008
000B
000E
120300
80F0
LCALL DELAY
SJMP BACK ;keep doing this
Instruction and 009 0010
Stack 010
011
0010
0300
;-------this is the delay subroutine------
ORG 300H
012 0300 DELAY:
013 0300 7DFF MOV R5,#0FFH ;R5=255
014 0302 DDFE AGAIN: DJNZ R5,AGAIN ;stay here
015 0304 22 RET ;return to caller
016 0305 END ;end of asm file

Stack frame after the first LCALL

0A
09 00 Low byte goes first
and high byte is last
08 07
SP = 09
 01 0000 ORG 0
02 0000 7455 BACK: MOV A,#55H ;load A with 55H
03 0002 F590 MOV P1,A ;send 55H to p1
CALL 04
05
0004
0006
7C99
7D67
MOV R4,#99H
MOV R5,#67H
INSTRUCTIONS 06 0008 120300 LCALL DELAY ;time delay
07 000B 74AA MOV A,#0AAH ;load A with AA
08 000D F590 MOV P1,A ;send AAH to p1
Use PUSH/POP 09 000F 120300 LCALL DELAY
10 0012 80EC SJMP BACK ;keeping doing
in Subroutine this
11 0014 ;-------this is the delay subroutine------
12 0300 ORG 300H
13 0300 C004 DELAY: PUSH 4 ;push R4
14 0302 C005 PUSH 5 ;push R5
Normally, the 15 0304 7CFF MOV R4,#0FFH;R4=FFH
number of PUSH 16 0306 7DFF NEXT: MOV R5,#0FFH;R5=FFH
and POP 17 0308 DDFE AGAIN: DJNZ R5,AGAIN
18 030A DCFA DJNZ R4,NEXT
instructions must 19 030C D005 POP 5 ;POP into R5
always match in any
20 030E D004 POP 4 ;POP into R4
called subroutine 21 0310 22 RET ;return to call er
22 03 11 END ;end of asm fil e

After first LCALL After PUSH 4 After PUSH 5

0B 0B 0B 67 R5
0A 0A 99 R4 0A 99 R4
09 00 PCH 09 00 PCH 09 00 PCH
08 0B PCL 08 0B PCL 08 0B PCL
 ;MAIN program calling subroutines
ORG 0
CALL MAIN: LCALL SUBR_1 It is common to have one
INSTRUCTIONS LCALL
LCALL
SUBR_2
SUBR_3
main program and many
subroutines that are called
from the main program
HERE: SJMP HERE
Calling ;-----------end of MAIN
Subroutines SUBR_1: ...
... This allows you to make
RET each subroutine into a
;-----------end of subroutine1 separate module
SUBR_2: ... -Each module can be
... tested separately and then
RET brought together with
;-----------end of subroutine2 main program
SUBR_3: ...
-In a large program, the
... module can be assigned to
RET different programmers
;-----------end of subroutine3
END ;end of the asm file
  The only difference between
CALL
ACALL
INSTRUCTIONS
and LCALL is
ACALL  The target address for LCALL can be
anywhere within the 64K byte address
 The target address of ACALL must be
within a 2K-byte range
 The use of ACALL instead of
LCALL can save a number of
bytes of program ROM space
 ORG 0
CALL BACK: MOV
MOV
A,#55H
P1,A
;load
;send
A with
55H to
55H
port 1
INSTRUCTIONS LCALL DELAY ;time delay
MOV A,#0AAH ;load A with AA (in hex)
MOV P1,A ;send AAH to port 1
ACALL LCALL DELAY
(cont’) SJMP BACK ;keep doing this indefinitely
...
END ;end of asm file

A rewritten program which is more efficiently

ORG 0
MOV A,#55H ;load A with 55H
BACK: MOV P1,A ;send 55H to port 1
ACALL DELAY ;time delay
CPL A ;complement reg A
SJMP BACK ;keep doing this indefinitely
...
END ;end of asm file
  CPU executing an instruction takes
TIME DELAY
FOR VARIOUS a certain number of clock cycles
8051 CHIPS  These are referred as to as machine cycles
 The length of machine cycle
depends on the frequency of the
crystal oscillator connected to 8051
 In original 8051, one machine
cycle lasts 12 oscillator periods
Find the period of the machine cycle for 11.0592 MHz crystal
frequency

Solution:
11.0592/12 = 921.6 kHz;
machine cycle is 1/921.6 kHz = 1.085μs
 For 8051 system of 11.0592 MHz, find how long it takes to execute
TIME DELAY each instruction.
(a) MOV R3,#55 (b) DEC R3 (c) DJNZ R2 target
FOR VARIOUS (d) LJMP (e) SJMP (f) NOP (g) MUL AB
8051 CHIPS
(cont’) Solution:
Machine cycles Time to execute
(a) 1 1x1.085μs ＝ 1.085μs
(b) 1 1x1.085μs ＝ 1.085μs
(c) 2 2x1.085μs ＝ 2.17μs
(d) 2 2x1.085μs ＝ 2.17μs
(e) 2 2x1.085μs ＝ 2.17μs
(f) 1 1x1.085μs ＝ 1.085μs
(g) 4 4x1.085μs ＝ 4.34μs
 Find the size of the delay in following program, if the crystal
TIME DELAY frequency is 11.0592MHz.
FOR VARIOUS
MOV A,#55H
8051 CHIPS AGAIN: MOV P1,A
ACALL DELAY
Delay CPL A
SJMP AGAIN
Calculation ;---time delay-------
A simple way to short jump
to itself in order to keep the
DELAY: MOV R3,#200 microcontroller busy
HERE: DJNZ R3,HERE HERE: SJMP HERE
RET We can use the following:
SJMP $
Solution:
Machine cycle
DELAY: MOV R3,#200 1
HERE: DJNZ R3,HERE 2
RET 2
Therefore, [(200x2)+1+2]x1.085μs ＝ 436.255μs.
 Find the size of the delay in following program, if the crystal
TIME DELAY frequency is 11.0592MHz.
FOR VARIOUS
Machine Cycle
8051 CHIPS
DELAY: MOV R3,#250 1
HERE: NOP 1
Increasing NOP 1
NOP 1
Delay Using
NOP 1
NOP DJNZ R3,HERE 2
RET 2

Solution:
The time delay inside HERE loop is
[250(1+1+1+1+2)]x1.085μs ＝ 1627.5μs.
Adding the two instructions outside loop we
have 1627.5μs + 3 x 1.085μs ＝ 1630.755μs
 Find the size of the delay in following program, if the crystal
TIME DELAY frequency is 11.0592MHz.
FOR VARIOUS Machine Cycle
8051 CHIPS DELAY: MOV R2,#200 1
Notice in nested loop,
AGAIN: MOV R3,#250 1
HERE: NOP 1 as in all other time
Large Delay NOP 1 delay loops, the time
Using Nested DJNZ R3,HERE 2 is approximate since
we have ignored the
Loop DJNZ R2,AGAIN 2
first and last
RET 2
instructions in the
Solution: subroutine.
For HERE loop, we have (4x250)x1.085μs＝1085μs.
For AGAIN loop repeats HERE loop 200 times, so
we have 200x1085μs＝217000μs. But “MOV
R3,#250” and “DJNZ R2,AGAIN” at the start and
end of the AGAIN loop add (3x200x1.805)=651μs.
As a result we have 217000+651=217651μs.
  Two factors can affect the accuracy
TIME DELAY of the delay
FOR VARIOUS
 Crystal frequency
8051 CHIPS  The duration of the clock period of the
machine cycle is a function of this crystal
Delay frequency
Calculation for  8051 design
Other 8051  The original machine cycle duration was set
at 12 clocks
 Advances in both IC technology and CPU
design in recent years have made the 1-
clock machine cycle a common feature
Clocks per machine cycle for various 8051 versions
Chip/Maker Clocks per Machine Cycle
AT89C51 Atmel 12
P89C54X2 Philips 6
DS5000 Dallas Semi 4

DS89C420/30/40/50 Dallas Semi 1

 I/O PORT
PROGRAMMING

The 8051 Microcontroller and Embedded

Systems: Using Assembly and C
 Provides
+5V supply
I/O voltage to
PROGRAMMING 8051 Pin Diagram the chip
P1.0 1 40 Vcc
A total of 32 P1.1 2 39 P0.0 (AD0)
pins are set P1.2 3 38 P0.1 (AD1)
P1.3 4 37 P0.2 (AD2)
aside for the P1 P1.4 5 36 P0.3 (AD3) P0
four ports P0, P1.5 6 35 P0.4 (AD4)
P1, P2, P3, P1.6 7
8051 34 P0.5 (AD5)
P1.7 8 33 P0.6 (AD6)
where each
port takes 8 (RXD)RSTP3.0
9 (8031) 32 P0.7 (AD7)
(TXD) P3.1 10 31 -EA/VPP
pins (-INT0) P3.2 11 (89420) 30 ALE/PROG
(-INT1) P3.3 12 29 -PSEN
P3 (T0) P3.4 13 28 P2.7 (A15)
(T1) P3.5 14 27 P2.6 (A14)
(-WR) P3.6 15 26 P2.5 (A13)
(-RD )P3.7 16 25 P2.4 (A12) P2
XTAL2 17 24 P2.3 (A11)
18 23 P2.2 (A10)
XTAL1
19 22 P2.1 (A9)
GND
20 21 P2.0 (A8)
Ground
  The four 8-bit I/O ports P0, P1, P2
I/O
PROGRAMMING and P3 each uses 8 pins
 All the ports upon RESET are
I/O Port Pins configured as input, ready to be
used as input ports
 When the first 0 is written to a port, it
becomes an output
P1.0
P1.1
1
2
3
39
38
P0.0(AD0)
P0.1(AD1)
 To reconfigure it as an input, a 1 must be
sent to the port
P1.2
P1.3 4 37 P0.2(AD2)
P1.4 5 36 P0.3(AD3)
P1.5 6 35 P0.4(AD4)
7 34 P0.5(AD5)
 To use any of these ports as an input port,
P1.6
P1.7 8 33 P0.6(AD6)
32 P0.7(AD7)
(RXD)P3.0 10 8051
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
11(8031)
12
28 P2.7(A15)
it must be programmed
13
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
WR)P3.6 16 25 P2.4(A12)
RD)P3.7 17 24 P2.3(A11)
23 P2.2(A10)
22 P2.1(A9)
21 P2.0(A8)
  It can be used for input or output, each
I/O pin must be connected externally to a
PROGRAMMING 10K ohm pull-up resistor
Port 0  This is due to the fact that P0 is an open
drain, unlike P1, P2, and P3
 Open drain is a term used for MOS chips in the
same way that open collector is used for TTL
chips
Vcc
39 P0.0(AD0) 10 K
38
37
P0.1(AD1)
P0.2(AD2) P0.X
36 P0.3(AD3) P0.0
35 P0.4(AD4)
34 P0.5(AD5) P0.1

Port 0
33
32
P0.6(AD6)
8051 P0.2
8051 P0.7(AD7)
P0.3
(8031) P0.4
P0.5
P0.6
P0.7
  In order to make port 0 an input, the
I/O
port must be programmed by writing
PROGRAMMING
1 to all the bits
Port 0 as Input Port 0 is configured first as an input port by writing 1s to it, and then
data is received from that port and sent to P1
MOV A,#0FFH ;A=FF hex
MOV P0,A ;make P0 an i/p port
;by writing it all 1s

39
38
P0.0(AD0) BACK: MOV A,P0 ;get data from P0
P0.1(AD1)
37
36
P0.2(AD2)
P0.3(AD3) MOV P1,A ;send it to port 1
35 P0.4(AD4)
34 P0.5(AD5)
P0.6(AD6)
SJMP BACK ;keep doing it
33
32 P0.7(AD7)
8051
(8031)
  To make port 1 an input port, it
I/O must be programmed as such by
PROGRAMMING writing 1 to all its bits
Port 1 is configured first as an input port by writing 1s to it, then data
Port 1 as Input is received from that port and saved in R7 and R5
MOV A,#0FFH ;A=FF hex
MOV P1,A ;make P1 an input port

;by writing it all 1s

MOV A,P1 ;get data from P1
P1.0
P1.1
1
2 MOV R7,A ;save it to in reg R7
P1.2 3
P1.3
P1.4
4
5
ACALL DELAY ;wait
P1.5
P1.6
6
7 MOV A,P1 ;another data from P1
P1.7 8
8051 MOV R5,A ;save it to in reg R5
(8031)
 Write a program for the DS89C420 to toggle all the bits of P0, P1,
and P2 every 1/4 of a second
I/O ORG 0
PROGRAMMING BACK: MOV A,#55H
MOV P0,A
MOV P1,A
Port 3 MOV P2,A
ACALL QSDELAY ;Quarter of a second
(cont’)
MOV A,#0AAH
MOV P0,A
MOV P1,A
MOV P2,A
ACALL QSDELAY
SJMP BACK
QSDELAY: Delay
MOV R5,#11 = 11  248  255  4 MC  90 ns
H3: MOV R4,#248 = 250,430 s
(RXD)P3.0 10 8051
H2: MOV R3,#255
(TXD)P3.1
(INT0)P3.2
11(8031)
12 H1: DJNZ R3,H1 ;4 MC for DS89C4x0
(INT1)P3.3 13
(T0)P3.4
(T1)P3.5
14
15
DJNZ R4,H2
WR)P3.6
RD)P3.7
16
17 DJNZ R5,H3
RET
END
 The entire 8 bits of Port 1 are accessed
BACK: MOV A,#55H
I/O MOV P1,A
ACALL DELAY
PROGRAMMING MOV A,#0AAH
MOV P1,A
Different ways ACALL DELAY
SJMP BACK
of Accessing
Entire 8 Bits Rewrite the code in a more efficient manner by accessing the port
directly without going through the accumulator
BACK: MOV P1,#55H
ACALL DELAY
MOV P1,#0AAH
ACALL DELAY
SJMP BACK
Another way of doing the same thing
MOV A,#55H
BACK: MOV P1,A
ACALL DELAY
CPL A
SJMP BACK
  Sometimes we need to access only
I/O BIT
MANIPULATION 1 or 2 bits of the port
BACK: CPL P1.2 ;complement P1.2
PROGRAMMING ACALL DELAY
SJMP BACK
I/O Ports
;another variation of the above program
and Bit AGAIN: SETB P1.2 ;set only P1.2
Addressability ACALL DELAY
CLR P1.2 ;clear only P1.2
ACALL DELAY

SJMP AGAIN P0 P1 P2 P3 Port Bit

P0.0 P1.0 P2.0 P3.0 D0

P0.1 P1.1 P2.1 P3.1 D1
P0.2 P1.2 P2.2 P3.2 D2
P0.3 P1.3 P2.3 P3.3 D3
P0.4 P1.4 P2.4 P3.4 D4
P0.5 P1.5 P2.5 P3.5 D5
P0.6 P1.6 P2.6 P3.6 D6
P0.7 P1.7 P2.7 P3.7 D7
 Example 4-2
Write the following programs.
I/O BIT Create a square wave of 50% duty cycle on bit 0 of port 1.
MANIPULATION Solution:
PROGRAMMING The 50% duty cycle means that the “on” and “off” state (or the high
and low portion of the pulse) have the same length. Therefore,
I/O Ports we toggle P1.0 with a time delay in between each state.
HERE: SETB P1.0 ;set to high bit 0 of port 1
and Bit LCALL DELAY ;call the delay subroutine
Addressability CLR P1.0 ;P1.0=0
LCALL DELAY
(cont’) SJMP HERE ;keep doing it
Another way to write the above program is:
HERE: CPL P1.0 ;set to high bit 0 of port 1
LCALL DELAY ;call the delay subroutine
SJMP HERE ;keep doing it
8051

P1.0
  Instructions that are used for single-
I/O BIT
MANIPULATION
bit operations are as following
PROGRAMMING Single-Bit Instructions
Instruction Function
I/O Ports SETB bit Set the bit (bit = 1)
and Bit CLR bit Clear the bit (bit = 0)
Addressability CPL bit Complement the bit (bit = NOT bit)
(cont’) JB bit, target Jump to target if bit = 1 (jump if bit)
JNB bit, target Jump to target if bit = 0 (jump if no bit)
JBC bit, target Jump to target if bit = 1, clear
bit (jump if bit, then clear)
  The JNB and JB instructions are
I/O BIT widely used single-bit operations
MANIPULATION
 They allow you to monitor a bit and make
PROGRAMMING a decision depending on whether it’s 0 or 1
 These two instructions can be used for any
Checking an bits of I/O ports 0, 1, 2, and 3
Input Bit  Port 3 is typically not used for any I/O,
either single-bit or byte-wise
Instructions for Reading an Input Port

Mnemonic Examples Description

MOV A,PX MOV A,P2 Bring into A the data at P2 pins

JNB PX.Y, .. JNB P2.1,TARGET Jump if pin P2.1 is low

JB PX.Y, .. JB P1.3,TARGET Jump if pin P1.3 is high
MOV C,PX.Y MOV C,P2.4 Copy status of pin P2.4 to CY
 Example 4-3
I/O BIT Write a program to perform the following:
MANIPULATION (a) Keep monitoring the P1.2 bit until it becomes high
PROGRAMMING (b) When P1.2 becomes high, write value 45H to port 0
(c) Send a high-to-low (H-to-L) pulse to P2.3
Solution:
Checking an SETB P1.2 ;make P1.2 an input
Input Bit MOV A,#45H ;A=45H
(cont’)
AGAIN: JNB P1.2,AGAIN ; get out when P1.2=1

MOV P0,A ;issue A to P0

SETB P2.3 ;make P2.3 high

CLR P2.3 ;make P2.3 low for H-to-L

 Example 4-4
I/O BIT
Assume that bit P2.3 is an input and represents the condition of an
MANIPULATION oven. If it goes high, it means that the oven is hot. Monitor the bit
PROGRAMMING continuously. Whenever it goes high, send a high-to-low pulse to port
P1.5 to turn on a buzzer.
Solution:
Checking an HERE: JNB P2.3,HERE ;keep monitoring for high
Input Bit SETB P1.5 ;set bit P1.5=1
(cont’) CLR P1.5 ;make high-to-low

SJMP HERE ;keep repeating

 Example 4-5
I/O BIT
A switch is connected to pin P1.7. Write a program to check the status
MANIPULATION of SW and perform the following:
(a) If SW=0, send letter „N‟ to P2
PROGRAMMING (b) If SW=1, send letter „Y‟ to P2

Checking an Solution:
SETB P1.7 ;make P1.7 an input
Input Bit AGAIN: JB P1.2,OVER ;jump if P1.7=1
(cont’) MOV P2,#‟N‟ ;SW=0, issue „N‟ to P2

SJMP AGAIN ;keep monitoring

OVER: MOV P2,#‟Y‟ ;SW=1, issue „Y‟ to P2

SJMP AGAIN ;keep monitoring

 Example 4-6
I/O BIT
A switch is connected to pin P1.7. Write a program to check the status
MANIPULATION of SW and perform the following:
(a) If SW=0, send letter „N‟ to P2
PROGRAMMING (b) If SW=1, send letter „Y‟ to P2
Use the carry flag to check the switch status.
Reading Single Solution:
Bit into Carry SETB P1.7 ;make P1.7 an input
Flag AGAIN: MOV C,P1.7 ;read SW status into CF
JC OVER ;jump if SW=1
MOV P2,#‟N‟ ;SW=0, issue „N‟ to P2

SJMP AGAIN ;keep monitoring

OVER: MOV P2,#‟Y‟ ;SW=1, issue „Y‟ to P2

SJMP AGAIN ;keep monitoring

 Example 4-7
I/O BIT
A switch is connected to pin P1.0 and an LED to pin P2.7. Write a
MANIPULATION program to get the status of the switch and send it to the LED
PROGRAMMING
Solution:
SETB P1.0 ;make P1.0 an input
Reading Single AGAIN: MOV C,P1.0 ;read SW status into CF
Bit into Carry MOV P2.7,C ;send SW status to LED
;keep repeating
Flag SJMP AGAIN
(cont’)
The instruction
„MOV
P2.7,P1.0‟ is
wrong , since such
However „MOV an instruction does
P2,P1‟ is a valid not exist
instruction
  In reading a port
I/O BIT
MANIPULATION  Some instructions read the status of port
PROGRAMMING pins
 Others read the status of an internal port
Reading Input latch
Pins vs. Port
Latch  Therefore, when reading ports there are
two possibilities:
 Read the status of the input pin
 Read the internal latch of the output port

 Confusion between them is a major

source of errors in 8051 programming
 Especially where external hardware is
concerned
 READING
 Some instructions read the contents of
INPUT PINS VS. an internal port latch instead of reading
PORT LATCH the status of an external pin
 For example, look at the ANL P1,A
Reading Latch
for Output Port instruction and the sequence of actions is
executed as follow
1. It reads the internal latch of the port and
brings that data into the CPU
2. This data is ANDed with the contents of
register A
3. The result is rewritten back to the port latch
4. The port pin data is changed and now has the
same value as port latch
  Read-Modify-Write
READING
 The instructions read the port latch
INPUT PINS VS.
normally read a value, perform an
PORT LATCH operation then rewrite it back to the port
latch
Reading Latch Instructions Reading a latch (Read-Modify-Write)
for Output Port Mnemonics Example
(cont‟) ANL PX ANL P1,A
ORL PX ORL P2,A
XRL PX XRL P0,A
JBC PX.Y,TARGET JBC P1.1,TARGET
CPL PX.Y CPL P1.2
INC PX INC P1
DEC PX DEC P2
DJNZ PX.Y,TARGET DJNZ P1,TARGET
MOV PX.Y,C MOV P1.2,C
CLR PX.Y CLR P2.3 Note: x is 0, 1, 2,
SETB PX.Y SETB P2.3 or 3 for P0 – P3
  The ports in 8051 can be accessed
I/O BIT
MANIPULATION by the Read-modify-write technique
PROGRAMMING  This feature saves many lines of code by
combining in a single instruction all three
Read-modify- actions
write Feature 1. Reading the port
2. Modifying it
3. Writing to the port
MOV P1,#55H ;P1=01010101
AGAIN: XRL P1,#0FFH ;EX-OR P1 with 1111 1111
ACALL DELAY
SJMP BACK
 ADDRESSING
MODES

The 8051 Microcontroller and Embedded

Systems: Using Assembly and C
  The CPU can access data in
ADDRESSING
MODES various ways, which are called
addressing modes
 Immediate
 Register
 Direct Accessing
memories
 Register indirect
 Indexed
  The source operand is a constant
IMMEDIATE  The immediate data must be preceded by
ADDRESSING the pound sign, “#”
MODE  Can load information into any registers,
including 16-bit DPTR register
 DPTR can also be accessed as two 8-bit
registers, the high byte DPH and low byte
DPL

MOV A,#25H ;load 25H into A

MOV R4,#62 ;load 62 into R4
MOV B,#40H ;load 40H into B
MOV DPTR,#4521H ;DPTR=4512H
MOV DPL,#21H ;This is the same

MOV DPH,#45H ;as above

;illegal!! Value > 65535 (FFFFH)

MOV DPTR,#68975
  We can use EQU directive to
IMMEDIATE
ADDRESSING access immediate data
Count EQU 30
MODE
(cont’) ... ...
MOV R4,#COUNT ;R4=1EH
MOV DPTR,#MYDATA ;DPTR=200H

ORG 200H
MYDATA: DB “America”

 We can also use immediate

addressing mode to send data to
8051 ports
MOV P1,#55H
  Use registers to hold the data to
REGISTER be manipulated
ADDRESSING MOV A,R0 ;copy contents of R0 into A
MOV R2,A ;copy contents of A into R2
MODE ADD A,R5 ;add contents of R5 to A
ADD A,R7 ;add contents of R7 to A
MOV R6,A ;save accumulator in R6

 The source and destination

registers must match in size
 MOV DPTR,A will give an error
MOV DPTR,#25F5H
MOV R7,DPL
MOV R6,DPH

 The movement of data between

Rn registers is not allowed
 MOV R4,R7 is invalid
  It is most often used the direct
ACCESSING
MEMORY addressing mode to access
RAM locations 30 – 7FH
Direct  The entire 128 bytes of RAM can be
Addressing accessed Direct addressing mode
Mode  The register bank locations are accessed
by the register names
MOV A,4 ;is same as
MOV A,R4 ;which means copy R4 into A

 Contrast this with Register addressing mode

immediate addressing mode
 There is no “#” sign in the operand
MOV R0,40H ;save content of 40H in R0
MOV 56H,A ;save content of A in 56H
  The SFR (Special Function Register)
ACCESSING
MEMORY can be accessed by their names or
by their addresses
SFR Registers MOV 0E0H,#55H ;is the same as
and Their MOV A,#55h ;load 55H into A

Addresses MOV 0F0H,R0 ;is the same as

MOV B,R0 ;copy R0 into B

 The SFR registers have

addresses between 80H and
FFH
 Not all the address space of 80 to FF is
used by SFR
 The unused locations 80H to FFH are
reserved and must not be used by the
8051 programmer
 Special Function Register (SFR) Addresses
Symbol Name Address
ACCESSING ACC* Accumulator 0E0H
MEMORY B* B register 0F0H
PSW* Program status word 0D0H
SFR Registers SP Stack pointer 81H

and Their DPTR Data pointer 2 bytes

Addresses DPL Low byte 82H

DPH High byte 83H
(cont’)
P0* Port 0 80H
P1* Port 1 90H
P2* Port 2 0A0H
P3* Port 3 0B0H
IP* Interrupt priority control 0B8H
IE* Interrupt enable control 0A8H

… … …
 Special Function Register (SFR) Addresses
Symbol Name Address
ACCESSING TMOD Timer/counter mode control 89H
MEMORY TCON* Timer/counter control 88H

T2CON* Timer/counter 2 control 0C8H

SFR Registers T2MOD Timer/counter mode control OC9H
and Their TH0 Timer/counter 0 high byte 8CH
Addresses TL0 Timer/counter 0 low byte 8AH
(cont’) TH1 Timer/counter 1 high byte 8DH
TL1 Timer/counter 1 low byte 8BH
TH2 Timer/counter 2 high byte 0CDH
TL2 Timer/counter 2 low byte 0CCH
RCAP2H T/C 2 capture register high byte 0CBH
RCAP2L T/C 2 capture register low byte 0CAH
SCON* Serial control 98H
SBUF Serial data buffer 99H
PCON Power ontrol 87H

* Bit addressable
 Example 5-1
ACCESSING
MEMORY Write code to send 55H to ports P1 and P2, using
(a) their names (b) their addresses

SFR Registers Solution :

(a) MOV A,#55H ;A=55H
and Their MOV P1,A ;P1=55H
Addresses MOV P2,A ;P2=55H
(cont’)
(b) From Table 5-1, P1 address=80H; P2 address=A0H
MOV A,#55H ;A=55H
MOV 80H,A ;P1=55H
MOV 0A0H,A ;P2=55H
  Only direct addressing mode is
ACCESSING
allowed for pushing or popping the
MEMORY stack
 PUSH A is invalid
Stack and  Pushing the accumulator onto the stack
Direct must be coded as PUSH 0E0H
Addressing Example 5-2
Mode Show the code to push R5 and A onto the stack and then pop them
back them into R2 and B, where B = A and R2 = R5

Solution:
PUSH 05 ;push R5 onto stack
PUSH 0E0H ;push register A onto stack

POP 0F0H ;pop top of stack into B

;now register B = register A

POP 02 ;pop top of stack into R2

;now R2=R6
  A register is used as a pointer to
ACCESSING
MEMORY the data
 Only register R0 and R1 are used for this
Register purpose
Indirect  R2 – R7 cannot be used to hold the
Addressing address of an operand located in RAM
Mode
 When R0 and R1 hold the addresses
of RAM locations, they must be
preceded by the “@” sign
MOV A,@R0 ;move contents of RAM whose
;address is held by R0 into A
MOV @R1,B ;move contents of B into RAM
;whose address is held by R1
  The advantage is that it makes
accessing data dynamic rather
ACCESSING
MEMORY than static as in direct addressing
mode
Register  Looping is not possible in direct
Indirect addressing mode
Addressing Example 5-4
Mode Write a program to clear 16 RAM locations starting at RAM address
(cont’) 60H
Solution:
CLR A ;A=0
MOV R1,#60H ;load pointer. R1=60H
MOV R7,#16 ;load counter, R7=16
AGAIN: MOV @R1,A ;clear RAM R1 points to

INC R1 ;increment R1 pointer

DJNZ R7,AGAIN ;loop until counter=zero

 Example 5-5
ACCESSING
MEMORY Write a program to copy a block of 10 bytes of data from 35H to 60H
Solution:
Register MOV R0,#35H ;source pointer
MOV R1,#60H ;destination pointer
Indirect MOV R3,#10 ;counter
Addressing BACK: MOV A,@R0 ;get a byte from source
Mode MOV @R1,A ;copy it to destination
INC R0 ;increment source pointer
(cont’)
INC R1 ;increment destination pointer
DJNZ R3,BACK ;keep doing for ten bytes
  R0 and R1 are the only registers
ACCESSING
MEMORY that can be used for pointers in
register indirect addressing mode
Register  Since R0 and R1 are 8 bits wide,
Indirect
Addressing
their use is limited to access any
Mode information in the internal RAM
(cont’)  Whether accessing externally
connected RAM or on-chip ROM,
we need 16-bit pointer
 In such case, the DPTR register is used
  Indexed addressing mode is widely
ACCESSING
MEMORY used in accessing data elements of
look-up table entries located in the
Indexed program ROM
Addressing  The instruction used for this purpose is
Mode and MOVC A,@A+DPTR
On-chip ROM
 Use instruction MOVC, “C” means code
Access
 The contents of A are added to the 16-bit
register DPTR to form the 16-bit address
of the needed data
  The look-up table allows access to
ACCESSING
MEMORY
elements of a frequently used
table with minimum operations
Look-up Table Example 5-8
Write a program to get the x value from P1 and send x2 to P2,
(cont’)
continuously
Solution:
ORG 0
MOV DPTR,#300H ;LOAD TABLE ADDRESS
MOV A,#0FFH ;A=FF
MOV P1,A ;CONFIGURE P1 INPUT PORT
BACK:MOV A,P1 ;GET X
MOV A,@A+DPTR ;GET X SQAURE FROM TABLE
MOV P2,A ;ISSUE IT TO P2
SJMP BACK ;KEEP DOING IT
ORG 300H
XSQR_TABLE:
DB 0,1,4,9,16,25,36,49,64,81
END
  In many applications, the size of
ACCESSING
MEMORY program code does not leave any
room to share the 64K-byte code
Indexed space with data
Addressing  The 8051 has another 64K bytes of
Mode and memory space set aside exclusively for
MOVX data storage
 This data memory space is referred to as external
memory and it is accessed only by the MOVX
instruction

 The 8051 has a total of 128K bytes of

memory space
 64K bytes of code and 64K bytes of data
 The data space cannot be shared between
code and data
  In many applications we use
ACCESSING
MEMORY
RAM locations 30 – 7FH as
scratch pad
RAM Locations  We use R0 – R7 of bank 0
30 – 7FH as  Leave addresses 8 – 1FH for stack usage
Scratch Pad  If we need more registers, we simply use
RAM locations 30 – 7FH
Example 5-10
Write a program to toggle P1 a total of 200 times. Use RAM location
32H to hold your counter value instead of registers R0 – R7
Solution: ;P1=55H
MOV P1,#55H ;load counter value
MOV 32H,#200 ;into RAM loc 32H
;toggle P1
LOP1: CPL P1 ;repeat 200 times
ACALL DELAY
DJNZ 32H,LOP1
 7F

General purpose RAM

30

BIT 2F
2E
7F
77
7E
76
7D
75
7C
74
7B
73
7A
72
79
71
78
70

ADDRESSES 2D 6F 6E 6D 6C 6B 6A 69 68
2C 67 66 65 64 63 62 61 60

Bit-addressable 2B 5F 5E 5D 5C 5B 5A 59 58

Bit- locations 2A 57 56 55 54 53 52 51 50

Addressable 29
28
4F
47
4E
46
4D
45
4C
44
4B
43
4A
42
49
41
48
40

RAM 27 3F 3E 3D 3C 3B 3A 39 38

(cont’) Byte address 26 37 36 35 34 33 32 31 30

25 2F 2E 2D 2C 2B 2A 29 28
24 27 26 25 24 23 22 21 20
23 1F 1E 1D 1C 1B 1A 19 18
22 17 16 15 14 13 12 11 10
21 0F 0E 0D 0C 0B 0A 09 08
20 07 06 05 04 03 02 01 00
1F
18 Bank 3
17
10 Bank 2
0F
08 Bank 1
07
00 Default register bank for R0-
R7
  Instructions that are used for signal-
BIT
ADDRESSES bit operations are as following
Single-Bit Instructions
Bit- Instruction Function
Addressable SETB bit Set the bit (bit = 1)
RAM CLR bit Clear the bit (bit = 0)
(cont’) CPL bit Complement the bit (bit = NOT bit)
JB bit, target Jump to target if bit = 1 (jump if bit)
JNB bit, target Jump to target if bit = 0 (jump if no bit)

JBC bit, target Jump to target if bit = 1, clear bit

(jump if bit, then clear)
  While all of the SFR registers are
BIT byte- addressable, some of them are
ADDRESSES also bit- addressable
 The P0 – P3 are bit addressable
I/O Port
Bit Addresses  We can access either the entire 8 bits
or any single bit of I/O ports P0, P1,
P2, and P3 without altering the rest
 When accessing a port in a single-
bit manner, we use the syntax
SETB X.Y
 X is the port number P0, P1, P2, or P3
 Y is the desired bit number from 0 to 7 for
data bits D0 to D7
 ex. SETB P1.5 sets bit 5 of port 1 high
  Notice that when code such as
SETB P1.0 is assembled, it
BIT becomes
ADDRESSES SETB 90H
 The bit address for I/O ports
I/O Port  P0 are 80H to 87H
Bit Addresses  P1 are 90H to 97H
 P2 are A0H to A7H
(cont’)
 P3 are B0H to B7H

Single-Bit Addressability of Ports

P0 P1 P2 P3 Port Bit
P0.0 (80) P1.0 (90) P2.0 (A0) P3.0 (B0) D0

P0.1 P1.1 P2.1 P3.1 D1

P0.2 P1.2 P2.2 P3.2 D2

P0.3 P1.3 P2.3 P3.3 D3

P0.4 P1.4 P2.4 P3.4 D4

P0.5 P1.5 P2.5 P3.5 D5

P0.6 P1.6 P2.6 P3.6 D6

P0.7 (87) P1.7 (97) P2.7 (A7) P3.7 (B7) D7

 BIT
ADDRESSES

I/O Port
Bit Addresses
(cont’)
  Only registers A, B, PSW, IP, IE,
BIT ACC, SCON, and TCON are bit-
ADDRESSES addressable
 While all I/O ports are bit-addressable
Registers
Bit-  In PSW register, two bits are set
Addressability aside for the selection of the
register banks
 Upon RESET, bank 0 is selected
 We
CY can
AC select
-- any
RS1 other
RS0 banks
OV using
-- the
P

bit-addressability of the PSW

RS1 RS0 Register Bank Address
0 0 0 00H - 07H
0 1 1 08H - 0FH
1 0 2 10H - 17H
1 1 3 18H - 1FH
 Example 5-13
Write a program to save the accumulator in R7 of bank 2.
BIT Solution:
ADDRESSES CLR PSW.3
SETB PSW.4
MOV R7,A
Registers Example 5-14
Bit- While there are instructions such as JNC and JC to check the carry flag
Addressability bit (CY), there are no such instructions for the overflow flag bit (OV).
(cont’) How would you write code to check OV?
Solution:
JB PSW.2,TARGET ;jump if OV=1

CY AC -- RS1 RS0 OV -- P

Example 5-18
While a program to save the status of bit P1.7 on RAM address bit 05.
Solution:
MOV C,P1.7
MOV 05,C
  The BIT directive is a widely used
BIT
ADDRESSES
directive to assign the bit-
addressable I/O and RAM locations
Using BIT  Allow a program to assign the I/O or RAM
bit at the beginning of the program,
making it easier to modify them
Example 5-22
A switch is connected to pin P1.7 and an LED to pin P2.0. Write a
program to get the status of the switch and send it to the LED.
Solution:
LED BIT P1.7 ;assign bit
SW BIT P2.0 ;assign bit
HERE: MOV C,SW ;get the bit from the port
MOV LED,C ;send the bit to the port
SJMP HERE ;repeat forever
 Example 5-20
BIT
Assume that bit P2.3 is an input and represents the condition of an
ADDRESSES oven. If it goes high, it means that the oven is hot. Monitor the bit
continuously. Whenever it goes high, send a high-to-low pulse to port
P1.5 to turn on a buzzer.
Using BIT
Solution:
(cont’) OVEN_HOT BIT P2.3
BUZZER BIT P1.5
HERE: JNB OVEN_HOT,HERE ;keep monitoring
ACALL DELAY
CPL BUZZER ;sound the buzzer
ACALL DELAY
SJMP HERE
  Use the EQU to assign addresses
BIT
ADDRESSES  Defined by names, like P1.7 or P2
 Defined by addresses, like 97H or 0A0H
Using EQU Example 5-24
A switch is connected to pin P1.7. Write a program to check the status
of the switch and make the following decision.
(a) If SW = 0, send “0” to P2
(b) If SW = 1, send “1“ to P2

Solution: SW EQU 97H

MYDATA EQU 0A0H
SW EQU P1.7
MYDATA EQU P2
HERE: MOV C,SW
JC OVER
MOV MYDATA,#‟0‟
SJMP HERE
OVER: MOV MYDATA,#‟1‟
SJMP HERE
END
 ARITHMETIC & LOGIC
INSTRUCTIONS AND PROGRAMS

The 8051 Microcontroller and Embedded

Systems: Using Assembly and C
 ADD A,source ;A = A + source
ARITHMETIC  The instruction ADD is used to add
INSTRUCTIONS two operands
 Destination operand is always in register A
Addition of
 Source operand can be a register,
Unsigned immediate data, or in memory
Numbers  Memory-to-memory arithmetic operations
are never allowed in 8051 Assembly
language
Show how the flag register is affected by the following instruction.
MOV A,#0F5H ;A=F5 hex CY =1, since there is
ADD A,#0BH ;A=F5+0B=00 a carry out from D7
PF =1, because the
number of 1s is zero (an
Solution: even number), PF is set
F5H 1111 0101 to 1.
+ 0BH + 0000 1011 AC =1, since there is
100H 0000 0000 a carry from D3 to
D4
 Assume that RAM locations 40 – 44H have the following values.
ARITHMETIC Write a program to find the sum of the values. At the end of the
INSTRUCTIONS program, register A should contain the low byte and R7 the high byte.
40 = (7D)
41 = (EB)
Addition of 42 = (C5)
Individual 43 = (5B)
44 = (30)
Bytes
Solution:
MOV R0,#40H ;load pointer
MOV R2,#5 ;load counter
CLR A ;A=0

MOV R7,A ;clear R7

AGAIN: ADD A,@R0 ;add the byte ptr to by R0

JNC NEXT ;if CY=0 don‟t add carry

INC R7 ;keep track of carry
NEXT: INC R0 ;increment pointer
DJNZ R2,AGAIN ;repeat until R2 is zero
  When adding two 16-bit data operands, the
ARITHMETIC propagation of a carry from lower byte to
INSTRUCTIONS higher byte is concerned
When the first byte is added
ADDC and 1 (E7+8D=74, CY=1).
Addition of 16- 3C E7 The carry is propagated to the
+ 3B 8D
Bit Numbers 78 74
higher byte, which result in 3C
+ 3B + 1 =78 (all in hex)

Write a program to add two 16-bit numbers. Place the sum in R7 and
R6; R6 should have the lower byte.
Solution:
CLR C ;make CY=0
MOV A, #0E7H ;load the low byte now
A=E7H
ADD A, #8DH ;add the low byte
MOV R6, A ;save the low byte sum in
R6
MOV A, #3CH ;load the high byte
ADDC A, #3BH ;add with the carry
MOV R7, A ;save the high byte sum
  The binary representation of the
ARITHMETIC digits 0 to 9 is called BCD (Binary
INSTRUCTIONS
Coded Decimal) Digit BCD

BCD Number  Unpacked BCD 0

1
0000
0001
System  In unpacked BCD, the lower 4 2 0010
bits of the number represent 3 0011
the BCD number, and the rest 4 0100
5 0101
of the bits are 0
6 0110
 Ex. 00001001 and 00000101 7 0111
are 8 1000
unpacked BCD for 9 and 5 9 1001

 Packed BCD
 In packed BCD, a single byte
has two BCD number in it, one
in the lower 4 bits, and one in
the upper 4 bits
 Ex. 0101 1001 is packed BCD
for 59H
 ARITHMETIC  Adding two BCD numbers must give
INSTRUCTIONS a BCD result Adding these two
numbers gives
Unpacked and MOV A, #17H 0011 1111B (3FH),
ADD A, #28H Which is not BCD!
Packed BCD
The result above should have been 17 + 28 = 45 (0100 0101).
To correct this problem, the programmer must add 6 (0110) to the
low digit: 3F + 06 = 45H.
 DA A ;decimal adjust for addition
ARITHMETIC  The DA instruction is provided to
INSTRUCTIONS correct the aforementioned problem
DA Instruction
associated with BCD addition
 The DA instruction will add 6 to the lower
nibble or higher nibble if need
Example: 6CH
MOV A,#47H ;A=47H first BCD operand
MOV B,#25H ;B=25H second BCD operand
ADD A,B ;hex(binary) addition(A=6CH)
DA A ;adjust for BCD addition
(A=72H)
72H
DA works only
after an ADD, The “DA” instruction works only on A. In other word, while the source
but not after INC can be an operand of any addressing mode, the destination must be in
register A in order for DA to work.
  Summary of DA instruction
ARITHMETIC  After an ADD or ADDC instruction
INSTRUCTIONS
1. If the lower nibble (4 bits) is greater than 9,
or if AC=1, add 0110 to the lower 4 bits
DA Instruction 2. If the upper nibble is greater than 9, or
(cont’) if CY=1, add 0110 to the upper 4 bits

Example: HEX BCD

29 0010 1001
+ 18 + 0001 1000
41 0100 0001 AC=1

+ 6 + 0110

47 Since AC=10111
0100 after the
addition, ”DA A” will add 6 to the
lower nibble.
The final result is in BCD format.
 Assume that 5 BCD data items are stored in RAM locations starting
at 40H, as shown below. Write a program to find the sum of all the
ARITHMETIC
numbers. The result must be in BCD.
INSTRUCTIONS
40=(71)
41=(11)
42=(65)
DA Instruction 43=(59)
(cont’) 44=(37)
Solution:
MOV R0,#40H ;Load pointer
MOV R2,#5 ;Load counter
CLR A ;A=0
MOV R7,A ;Clear R7
AGAIN: ADD A,@R0 ;add the byte pointer
;to by R0
DA A ;adjust for BCD
JNC NEXT ;if CY=0 don‟t
;accumulate carry
INC R7 ;keep track of carries
NEXT: INC R0 ;increment pointer
DJNZ R2,AGAIN ;repeat until R2 is 0
  In many microprocessor there are
ARITHMETIC
two different instructions for
INSTRUCTIONS
subtraction: SUB and SUBB
Subtraction of (subtract with borrow)
Unsigned In the 8051 we have only SUBB
Numbers  The 8051 uses adder circuitry to perform
the subtraction
SUBB A,source ;A = A – source – CY
 To make SUB out of SUBB, we have
to make CY=0 prior to the execution
of the instruction
 Notice that we use the CY flag for the
borrow
  SUBB when CY = 1
ARITHMETIC
 This instruction is used for multi-byte
INSTRUCTIONS
numbers and will take care of the borrow
of the lower operand
Subtraction of
A = 62H – 96H – 0 = CCH
Unsigned CLR C CY = 1
Numbers MOV A,#62H ;A=62H
(cont’) SUBB A,#96H ;62H-96H=CCH with CY=1
MOV R7,A ;save the result
MOV A,#27H ;A=27H
SUBB A,#12H ;27H-12H-1=14H
MOV R6,A ;save the result
A = 27H - 12H - 1 = 14H
Solution: CY = 0
We have 2762H - 1296H = 14CCH.
  The 8051 supports byte by
ARITHMETIC
byte multiplication only
INSTRUCTIONS
The byte are assumed to be unsigned data

MUL AB ;AxB, 16-bit result in B, A
Unsigned MOV A,#25H ;load 25H to reg. A
Multiplication MOV B,#65H ;load 65H to reg. B
MUL AB ;25H * 65H = E99 where
;B = OEH and A = 99H

Unsigned Multiplication Summary (MUL AB)

Multiplication Operand1 Operand2 Result

Byte x byte A B B = high byte
A = low byte
  The 8051 supports byte over
ARITHMETIC
INSTRUCTIONS byte division only
The byte are assumed to be unsigned data

Unsigned DIV AB ;divide A by B, A/B
Division
MOV A,#95 ;load 95 to reg. A
MOV B,#10 ;load 10 to reg. B
MUL AB ;A = 09(quotient) and
;B = 05(remainder)

Unsigned Division Summary (DIV AB)

Division Numerator Denominator Quotient Remainder
Byte / byte A B A B

CY is always 0
If B  0, OV = 0
If B = 0, OV = 1 indicates error
 (a) Write a program to get hex data in the range of 00 – FFH from
port 1 and convert it to decimal. Save it in R7, R6 and R5.
ARITHMETIC (b) Assuming that P1 has a value of FDH for data, analyze program.
INSTRUCTIONS Solution: MOV A,#0FFH
MOV P1,A ;make P1 an input port
(a)
Application for MOV
MOV
A,P1
B,#10
;read data from P1
;B=0A hex
DIV DIV AB ;divide by 10
MOV R7,B ;save lower digit
MOV B,#10
DIV AB ;divide by 10 once more

MOV R6,B ;save the next digit

MOV R5,A ;save the last digit
(b) To convert a binary (hex) value to decimal, we divide it by 10
repeatedly until the quotient is less than 10. After each division the
remainder is saves.
Q R
FD/0A = 19 3 (low digit)
19/0A = 2 5 (middle digit)
2 (high digit)
Therefore, we have FDH=253.
  To make the 2‟s complement of
SIGNED a number
ARITHMETIC
INSTRUCTIONS
CPL A ;1‟s complement (invert)
2's ADD A,#1 ;add 1 to make 2‟s comp.

Complement
 ANL destination,source ;dest = dest AND source

LOGIC AND  This instruction will perform a

COMPARE logic AND on the two operands
INSTRUCTIONS and place the result in the
destination
AND  The destination is normally the
accumulator
 The source operand can be a register, in
memory, or immediate

Show the results of the following.

X Y X AND Y
0 0 0
0 1 0 MOV A,#35H ;A = 35H
1 0 0 ANL A,#0FH ;A = A AND 0FH
1 1 1 35H 0 0 1 1 0 1 0 1 ANL is often used to
0FH 0 0 0 0 1 1 1 1 mask (set to 0) certain
05H 0 0 0 0 0 1 0 1 bits of an operand
 ORL destination,source
LOGIC AND ;dest = dest OR source
COMPARE  The destination and source
INSTRUCTIONS operands are ORed and the result
is placed in the destination
OR
 The destination is normally the
accumulator
 The source operand can be a register, in
memory, or immediate

X Y X OR Y Show the results of the following.

0 0 0 MOV A,#04H ;A = 04
ORL A,#68H ;A = 6C
0 1 1 ORL instruction can be
1 0 1 04H 0 0 0 0 0 1 0 0 used to set certain bits
68H 0 1 1 0 1 0 0 0
1 1 1 of an operand to 1
6CH 0 1 1 0 1 1 0 0
 XRL destination,source
;dest = dest XOR source
LOGIC AND
COMPARE  This instruction will perform XOR
INSTRUCTIONS operation on the two operands and
place the result in the destination
XOR
 The destination is normally the
accumulator
 The source operand can be a register, in
memory, or immediate
Show the results of the following.
X Y X XOR Y
0 0 0 MOV A,#54H
0 1 1 XRL A,#78H
XRL instruction can be
1 0 1 54H 0 1 0 1 0 1 0 0 used to toggle certain
1 1 0 bits of an operand
78H 0 1 1 1 1 0 0 0
2CH 0 0 1 0 1 1 0 0
 CPL A ;complements the register A
LOGIC AND
COMPARE  This is called 1’s
INSTRUCTIONS complement
MOV A, #55H ;now A=AAH
Complement CPL A ;0101 0101(55H)
;becomes 1010 1010(AAH)
Accumulator

 To get the 2’s complement, all

we have to do is to to add 1 to
the 1’s complement
 CJNE destination,source,rel. addr.
LOGIC AND
COMPARE  The actions of comparing and
INSTRUCTIONS jumping are combined into a single
instruction called CJNE (compare
Compare
and jump if not equal)
Instruction
 The CJNE instruction compares two
operands, and jumps if they are not equal
 The destination operand can be in the
accumulator or in one of the Rn registers
 The source operand can be in a register, in
memory, or immediate
 The operands themselves remain unchanged
 It changes the CY flag to indicate if the
destination operand is larger or smaller
 CJNE R5,#80,NOT_EQUAL ;check R5 for 80
LOGIC AND ... ;R5 = 80
COMPARE NOT_EQUAL:
INSTRUCTIONS JNC NEXT ;jump if R5 > 80
... ;R5 < 80
NEXT: ...
Compare
Instruction Compare Carry Flag
(cont’) destination  source CY = 0
destination < source CY = 1
CY flag is always
checked for cases
of greater or less
than, but only after  Notice in the CJNE instruction that
it is determined that any Rn register can be compared
with an immediate value
they are not equal

 There is no need for register A to be

involved
  The compare instruction is really a
LOGIC AND subtraction, except that the
COMPARE operands remain unchanged
INSTRUCTIONS  Flags are changed according to the
execution of the SUBB instruction
Compare Write a program to read the temperature and test it for the value 75.
Instruction According to the test results, place the temperature value into the
registers indicated by the following.
(cont’) If T = 75 then A = 75
If T < 75 then R1 = T
If T > 75 then R2 = T
Solution:
MOV P1,#0FFH ;make P1 an input port
MOV A,P1 ;read P1 port
CJNE A,#75,OVER ;jump if A is not 75
SJMP EXIT ;A=75, exit
OVER: JNC NEXT ;if CY=0 then A>75
MOV R1,A ;CY=1, A<75, save in R1
SJMP EXIT ; and exit
NEXT: MOV R2,A ;A>75, save it in R2
EXIT: ...
 RR A ;rotate right A
ROTATE
INSTRUCTION  In rotate right
AND DATA  The 8 bits of the accumulator are rotated
SERIALIZATION right one bit, and
 Bit D0 exits from the LSB and enters into
Rotating Right MSB, D7
and Left

MSB LSB

MOV A,#36H ;A = 0011 0110

RR A ;A = 0001 1011
RR A ;A = 1000 1101
RR A ;A = 1100 0110
RR A ;A = 0110 0011
 RL A ;rotate left A
ROTATE
INSTRUCTION  In rotate left
AND DATA  The 8 bits of the accumulator are rotated
SERIALIZATION left one bit, and
 Bit D7 exits from the MSB and enters into
Rotating Right LSB, D0
and Left
(cont’)
MSB LSB

MOV A,#72H ;A = 0111 0010

RL A ;A = 1110 0100
RL A ;A = 1100 1001
 RRC A ;rotate right through carry
ROTATE
INSTRUCTION  In RRC A
AND DATA  Bits are rotated from left to right
SERIALIZATION  They exit the LSB to the carry flag, and
the carry flag enters the MSB
Rotating
through Carry
MSB LSB CY

CLR C ;make CY = 0
MOV A,#26H ;A = 0010 0110
RRC A ;A = 0001 0011 CY = 0
RRC A ;A = 0000 1001 CY = 1
RRC A ;A = 1000 0100 CY = 1
 RLC A ;rotate left through carry
ROTATE
INSTRUCTION  In RLC A
AND DATA  Bits are shifted from right to left
SERIALIZATION  They exit the MSB and enter the carry flag,
and the carry flag enters the LSB
Rotating
through Carry
(cont’) CY MSB LSB

Write a program that finds the number of 1s in a given byte.

MOV R1,#0
MOV R7,#8 ;count=08
MOV A,#97H
AGAIN: RLC A
JNC NEXT ;check for CY
INC R1 ;if CY=1 add to count
NEXT: DJNZ R7,AGAIN
  Transfer a byte of data serially by
ROTATE
INSTRUCTION  Moving CY to any pin of ports P0 – P3
AND DATA  Using rotate instruction
SERIALIZATION Write a program to transfer value 41H serially (one bit at a time)
via pin P2.1. Put two highs at the start and end of the data. Send the
byte LSB first.
Serializing Data Solution:
(cont’) MOV A,#41H
SETB P2.1 ;high
SETB P2.1 ;high
MOV R5,#8
AGAIN: RRC A
MOV P2.1,C ;send CY to P2.1
DJNZ R5,HERE
SETB P2.1 ;high
SETB P2.1 ;high
Pin
Register A CY P2.1
D7 D0
 ROTATE  There are several instructions by
INSTRUCTION which the CY flag can be
AND DATA manipulated directly
SERIALIZATION
Instruction Function
Single-bit SETB C Make CY = 1
Operations with CLR C Clear carry bit (CY = 0)
CPL C Complement carry bit
CY MOV b,C Copy carry status to bit location (CY = b)

MOV C,b Copy bit location status to carry (b = CY)

JNC target Jump to target if CY = 0
JC target Jump to target if CY = 1
ANL C,bit AND CY with bit and save it on CY
ANL C,/bit AND CY with inverted bit and save it on
CY
ORL C,bit OR CY with bit and save it on CY
ORL C,/bit OR CY with inverted bit and save it on CY
 Assume that bit P2.2 is used to control an outdoor light and bit P2.5
ROTATE a light inside a building. Show how to turn on the outside light and
INSTRUCTION turn off the inside one.
AND DATA Solution:
SERIALIZATION SETB C ;CY = 1
ORL C,P2.2 ;CY = P2.2 ORed w/ CY
MOV P2.2,C ;turn it on if not on
Single-bit CLR C ;CY = 0
ANL C,P2.5 ;CY = P2.5 ANDed w/ CY
Operations with MOV P2.5,C ;turn it off if not off
CY
(cont’) Write a program that finds the number of 1s in a given byte.
Solution:
MOV R1,#0 ;R1 keeps number of 1s
MOV R7,#8 ;counter, rotate 8 times
MOV A,#97H ;find number of 1s in 97H
AGAIN: RLC A ;rotate it thru CY
JNC NEXT ;check CY
INC R1 ;if CY=1, inc count
NEXT: DJNZ R7,AGAIN ;go thru 8 times
 SWAP A
ROTATE
INSTRUCTION  It swaps the lower nibble and
AND DATA the higher nibble
SERIALIZATION  In other words, the lower 4 bits are put
into the higher 4 bits and the higher 4 bits
SWAP are put into the lower 4 bits
 SWAP works only on the
accumulator (A)
before : D7-D4 D3-D0

after : D3-D0 D7-D4

 (a) Find the contents of register A in the following code.
ROTATE (b) In the absence of a SWAP instruction, how would you
INSTRUCTION exchange the nibbles? Write a simple program to show the
AND DATA process.
SERIALIZATION Solution:
(a)
SWAP MOV A,#72H ;A = 72H

(cont’) SWAP A ;A = 27H

(b)
MOV A,#72H ;A = 0111 0010

RL A ;A = 0111 0010

RL A ;A = 0111 0010

RL A ;A = 0111 0010

RL A ;A = 0111 0010
BCD AND ASCII ASCII code and BCD for digits 0 - 9
APPLICATION
PROGRAMS Key ASCII (hex) Binary BCD (unpacked)
0 30 011 0000 0000 0000
1 31 011 0001 0000 0001
2 32 011 0010 0000 0010
3 33 011 0011 0000 0011
4 34 011 0100 0000 0100
5 35 011 0101 0000 0101
6 36 011 0110 0000 0110
7 37 011 0111 0000 0111
8 38 011 1000 0000 1000
9 39 011 1001 0000 1001
  To convert ASCII to packed BCD
BCD AND ASCII
APPLICATION  It is first converted to unpacked BCD (to
PROGRAMS get rid of the 3)
 Combined to make packed BCD
ASCII to
key ASCII Unpacked BCD Packed BCD
Packed BCD
Conversion 4 34 0000 0100
7 37 0000 0111 0100 0111 or 47H

MOV A, #‟4‟ ;A=34H, hex for „4‟

MOV R1,#‟7‟ ;R1=37H,hex for „7‟

ANL A, #0FH ;mask upper nibble (A=04)

ANL R1,#0FH ;mask upper nibble (R1=07)

SWAP A ;A=40H
ORL A, R1 ;A=47H, packed BCD
 Assume that register A has packed BCD, write a program to convert
BCD AND ASCII packed BCD to two ASCII numbers and place them in R2 and R6.
APPLICATION MOV A,#29H ;A=29H, packed BCD
PROGRAMS MOV R2,A ;keep a copy of BCD data
ANL A,#0FH ;mask the upper nibble (A=09)
ASCII to ORL A,#30H ;make it an ASCII, A=39H(„9‟)
MOV R6,A ;save it
Packed BCD MOV A,R2 ;A=29H, get the original
Conversion data
(cont’) ANL A,#0F0H ;mask the lower nibble
RR A ;rotate right
RR A ;rotate right
RR A ;rotate right SWAP A
RR A ;rotate right
ORL A,#30H ;A=32H, ASCII char. ‟2‟
MOV R2,A ;save ASCII char in R2
 Assume that the lower three bits of P1 are connected to three
switches. Write a program to send the following ASCII characters
to P2 based on the status of the switches.
BCD AND ASCII
APPLICATION 000 „0‟
001 „1‟
PROGRAMS 010 „2‟
011 „3‟
Using a Look- 100 „4‟
101 „5‟
up Table for 110 „6‟
ASCII 111 „7‟
MOV DPTR,#MYTABLE
Solution:
MOV A,P1 ;get SW status
ANL A,#07H ;mask all but lower 3
MOVC A,@A+DPTR ;get data from table
MOV P2,A ;display value
SJMP $ ;stay here
;------------------
ORG 400H
MYTABLE DB „0‟,„1‟,„2‟,„3‟,„4‟,„5‟,„6‟,„7‟
END