e·MMC v4.41 and v4.

5
Architecture for High Speed
Functions and Features
Victor Tsai
Micron Technology, Inc.

Flash Forward @ CES 2011

 Agenda
• e·MMC Market Trend

• e·MMC
e MMC Versions

• e·MMC v4.41 New Features

for High-Performance Mobile Handset Platform

• e·MMC v4.5 Preview

• In Conclusion

Flash Forward @ CES 2011 2

e·MMC Market Trend

Flash Forward @ CES 2011 3

 e·MMC Share of Total Flash Market (% of total Gbytes)

20.0%
18.0%
16.0%
14.0%
12.0%
10.0%
8.0%
6 0%
6.0%
4.0%
2.0%
0.0%

2009
2010
2011
2012
2013

Source: Micron Marketing

Flash Forward @ CES 2011 4

 e·MMC Density Trend
100%
90%
nits

80%
ntage of Un

70% 128GB
64GB
60%
32GB
50%
16GB
40%
Percen

8GB
30% 4GB
20% 2GB
10% 1GB
0%

2009
2010
2011
2012
2013
2014

Source: Micron Marketing

Flash Forward @ CES 2011 5

Mobile Handset Booting Architecture
100%
MLC-based eMMC
90%
SLC-based eMMC
nits

80%
ntage of Un

70%
MLC-based
60% Raw/Error Free
NAND
50% SLC NAND

40%
Percen

OneNAND
30%
20% NOR
10%
0%

2009
2010
2011
2012
2013
2014
Source: Micron Marketing

Flash Forward @ CES 2011 6

e·MMC Versions

Flash Forward @ CES 2011 7

• e·MMC v4.41
– JEDEC document JESD84-A441, published in March
2010
– Replaces e
e·MMC
MMC v4.4
v4 4
– Incorporates all e·MMC v4.4 features, plus new
features

• e·MMC v4.4
– JEDEC document JESD84-A44, published in March
2009
– Considered to be obsolete
– Replaced
ep aced by e
e·MMCC v4.41

Flash Forward @ CES 2011 8

e·MMC v4.41 New Features
for High
High-Performance
Performance Mobile
Handset Platform

Flash Forward @ CES 2011 9

 New Features for Demand Paging
• exMMC v4.41 specification introduces 2 new
features for Demand Paging
g g code execution
strategies:
– Background Operation
– High Priority Interrupt (HPI)
• The features are complementary in improving
Write Throughput performance as well as
Paging request latencies on the non-volatile
memory solution

Flash Forward @ CES 2011 10

 Background Operation
• e·MMC may perform various internal background
operations necessary for internal maintenance purposes
during run-time,
run time independent from the normal
operations initiated by the Host

• In order to reduce latencies during time-critical

operations such as Read and Write, and minimize
uncontrolled power consumption by e·MMC during Idle
time, this feature gives the Host the capability to delay
Device background operations until the Host explicitly
initiates Device background operation in a controlled
manner
Flash Forward @ CES 2011 11
 Background Operation Benefits
Minimized
Foreground Time Consuming
number of time
Operations consuming
User write request operations
latency
BO Enabled

BO Disabled

Write
Latency
Average

Time
User is not accessing the Foreground User write requests
memory

Flash Forward @ CES 2011 12

 High Priority Interrupt (HPI)
• During the execution of a large multiple-block Write or
Erase operation, BUSY time can be long and
unpredictable
• Due to this limitation, it is difficult to utilize e·MMC in
system
y use
u cases
a such
u asa Demand
a d Paging,
ag g, where data
da a
must be retrieved from the e·MMC with minimal latency

• e
e·MMC
MMC 4.41 introduced a mechanism to interrupt a busy
condition in a controlled manner within a well-defined
timeout, without compromising data integrity

Flash Forward @ CES 2011 13

 HPI Function
e·MMC v4.4

System Write Read Host may have to wait long time to issue the read command

Write stop Read

CMD CMD25 CMD12 CMD18

DAT DATA Device Busy DATA

e·MMC v4.41 Host can interrupt the long busy

System Write Read Host can restart the rest of the write operation if needed

Write stop
p Arg[0]=“1” Read Write
CMD CMD25 CMD12 CMD12 CMD18 CMD25
Device
DAT DATA-0 Device DATA DATA-1 Busy DATA-2
Busy

Flash Forward @ CES 2011 14

 HPI Benefits

Foreground Time Consuming

Capability to
Operations interrupt a time
P i llatency
Paging t
consuming
co su g
operation

HPI Enabled

HPI Disabled

Paging
Latency
A
Average
Paging requests Time

Flash Forward @ CES 2011 15

 Combined Effects of
Background Operation and HPI

Foreground Time Consuming

Operations Reduced latency for
Paging latency high performance

BO+HPI Enabled

BO+HPI Disabled

Paging
Latency
Average
Paging requests Tim
e

Flash Forward @ CES 2011 16

 DDR Mode (52Mhz Max.)
• Transferred user data are sampled on both clock edge (DDR)
– doubling the data rate for a given clock frequency
– The risingg edge
g of the clock always
y capture
p odd numbered byte.
y
– The falling edge of the clock always capture even numbered byte.

Flash Forward @ CES 2011 17

 Security and Data Integrity
exMMC v4.41/v4.4 specification introduces several new
features that address the security and data integrity needs
off high-performance
hi h f handset
h d t platforms
l tf
• Addition of hardware RESET pin and signal definition
• Partition features to enable segregation of data
• Replay Protected Memory Block (RPMB)
• Multiple Write Protection definitions
• Secure Trim, Secure Erase
• Data Reliability definition
• Enhanced Reliable Write definition

Flash Forward @ CES 2011 18

 Different Types of RESET
• Hard Reset
Power Cycle or RSTN
– Power Cycle or triggered by POR
H/W RESET (RSTN) signal
CMD0 (0xF0F0F0F0)
d
– Write protection is removed Pre-Idle state
in memory regions
protected by Power-On WP
Boot
Sequences
q
• Soft
S f Reset CMD0 (0x00000000)
– CMD0 arg=0x00000000 --
Idle state
device moves to Idle state
– CMD0 arg
arg=0xF0F0F0F0
0xF0F0F0F0 --
device moves to Pre-Idle Identification
state Sequences
– Write protection in memory
regions protected by Stand-by
Stand by
Power-On WP is maintained state

Flash Forward @ CES 2011 19

 Partition Feature
• Host can configure partition in e·MMC device using extended
CSD register
– Independent addressable space

– Partition size is multiple of a WP group size

– Configuration is one time program

• Each partition can be configured with two types of attribute

– Enhanced attribute (faster read/write access, better data
integrity)

– Default attribute (normal mass storage memory)

– User may create enhanced area in the user area

Flash Forward @ CES 2011 20

 Host configures max 4 partitions allowing system to separate
code from user storage area

0x00000 Enhanced attribute

0x00000 General partition 1

0x00000
General partition 2 Standard attribute

0x00000
U
User d t area
data General partition 3 Standard attribute

0x00000
General partition 4 Standard attribute

0x00000 Standard attribute

User data area
Enhanced attribute

Flash Forward @ CES 2011 21

 Use Case Example
e·MMC Physical Layout Partitioning Code Layout
Boot partition1,2 Boot partition1,2 XLOAD

EBOOT
Partition 1
(Enhanced) IPL
Logo

MBR
User Area
(Default) Partition 2
ULDR
(Enhanced) Copying
Partitioning
image data NK
Partition 3
OS (Image FS)
(Enhanced)
User area
EXTFAT
(
(Highh density
d )

Flash Forward @ CES 2011 22

 Replay Protected Memory Block (RPMB)
• This function provides means for the system to store data to
the specific memory area in an authenticated and replay
protected manner
p
• RPMB operation is a separate self-contained security
command protocol that has its own command opcodes
(message types) and well-defined data structure
• This feature is designed to fulfill the security requirements
below
– EICTA CCIG Doc Ref: Eicta Doc: 04cc100

– GSMA Doc Ref: Security Principles Related to Handset Theft 3.0.0

Flash Forward @ CES 2011 23

 RPMB Requirements (Device Side)
• Th
The R l
Replay P t t dM
Protected Memory BlBlockk (RPMB) iis
defined as a separate partition in the e·MMC Boot partition 1
memory space
– Partition size = multiples of 128KByte Boot partition 2
• Secure storage of Authentication Key
– An Authentication Key is written to the RPMB at RPMB
host system manufacturing time and is used as
shared secret to authenticate subsequent RPMB
t ansactions between
transactions bet een the Host and DeDevice
ice
• Transaction Authentication
– Transactions (messages) are authenticated by the
Message Authentication Code (MAC) which is a hash User data area
value generated by the Authentication Key,
Key a
random number provided by the Host and the
message itself using HMAC SHA-256
• [HMAC-SHA] Eastlake, D. and T. Hansen, "US Secure
Hash Algorithms (SHA and HMAC-SHA)", RFC 4634,
July 2006.

Flash Forward @ CES 2011 24

 Write Protect Feature
• Permanent Write Protect
– Once the Permanent Write Protect is set, the protected memory
region becomes read
read-only
only

• Power-On Write Protect (Volatile Write Protect)

– Once the Power-on Write Protect is set, it is persistent until the
next power cycle or H/W RESET

– Host needs to re-set the Power-On Write Protect to memory

regions
i th
thatt it wants
t tto apply
l thi
this type
t off write
it protection
t ti each
h
time after power cycle or H/W RESET

Flash Forward @ CES 2011 25

 Use Case Example
Partitioning Code Layout WP settings
Boot partition1,2 XLOAD Permanent WP
EBOOT Power-On WP (4MB)
Partition 1
(Enhanced) IPL Power-On WP (4MB)
Logo Power-On WP (4MB)
MBR Power-On WP (4MB)
Partition 2
(Enhanced) ULDR Power-On WP (4MB)

NK Power-On
Power On WP (8MB)
Partition 3
(Enhanced) OS (Image FS) Power-On WP (256MB)
User area
(High density ) EXTFAT Unprotected

* Assuming minimum write protect group size is 4MB

Flash Forward @ CES 2011 26

 Secure Trim/Secure Erase
• Secure Erase
– When a Secure Erase command is sent, data in the specified
memory addresses must be purged from the physical memory
array

– “Logical” memory erase is not acceptable

• Secure Trim
– For cases where smaller amounts of data might be spread through
multiple
lti l erase groups, a fforce garbage
b collect
ll t command
d is
i added
dd d

– This allows the same function as Secure Erase to be performed on

write blocks ((Sectors)) instead of erase g
groups
p

Flash Forward @ CES 2011 27

 Secure Erase
• Secure
S Erase
E command
d sequences
– CMD35 – Specify start address of erase groups
– CMD36 - Specify end address of erase groups
– CMD38 (with arg=0x80000000) – Erase operation
User data area User data area

Erase group A
(arg=A+1)
CMD35 (arg A+1)
Erase group A+1 CMD36 (arg=A+3)
CMD38 (arg=0x80000000)
Physical
Erase group A+2 Memory
Erase

Erase group A+3

Erase group A+4

Flash Forward @ CES 2011 28

 Secure Trim
CMD35 (arg=A)
• Secure Trim
S T i command
d CMD36 (arg=A+2)
CMD38
sequences (arg=0x80000001)

• Step1: CMD35 (arg=B)

CMD36 (arg=B+4)
– CMD35 – Specify start address
CMD38
off write
it bl k tto b
blocks d
be erased (arg=0x80000001)
– CMD36 - Specify end address User data area User data area
CMD35 (arg=C)
of write blocks to be erased
CMD36 (arg=C)
– CMD38 (with Sector A CMD38 (arg=0x80000001)
arg=0x80000001) - Keep Sector A+2
write
it block
bl k address
dd to
t bbe CMD35 (arg=xx)
erased. CMD36 (arg=xx)
Sector B CMD38 (arg=0x80008000)
– Host can repeat Step 1
Sector B+4
sequence until all memory
blocks to be erased is identified
• Step2: Sector C
– CMD35 Physical
Memory
– CMD36
Erase
– CMD38 (with
arg=0x80008000) - Erase
operation for the write blocks.

Flash Forward @ CES 2011 29

 Secure Bad Block Management
• Allow the user to specify that bad blocks cannot contain any
user data when they are retired
• When blocks are discarded, all “good” bits must be purged
before discarding.
• ECSD register [134] need to be set to execute this feature

Flash Forward @ CES 2011 30

 Data Reliability
• Data
D t Reliability
R li bilit iis d
defined
fi d as followed
f ll d
– High data reliability: once a Device indicates to the Host
that a write has successfully completed, the data that was
written,
itt along
l with
ith all
ll previous
i d
data
t written,
itt cannott be
b
corrupted by other operations that are host initiated,
controller initiated or accidental (such as power
interruption)
– Normal data reliability: there is some risk that previously
written data may be corrupted for unforeseen events such
as power interruption
• Performance implication
– Write performance may be impacted when high data
reliability is set

Flash Forward @ CES 2011 31

 Enhanced Reliable Write
• All blocks
bl k are 512B (sector)
( t ) in
i length;
l th each
h sector
t being
b i
modified by the write is atomic
• If a power loss occurs during a Reliable Write, sectors may
either
ith contain
t i old
ld d
data
t or new data;
d t all ll sectors
t being
b i modified
difi d
by the write operation may be in one of the following states:
– All sectors contain new data
– All sectors contain old data
– Some sectors contain new data and some sectors contain old data

Flash Forward @ CES 2011 32

e·MMC v4.5 Preview

Flash Forward @ CES 2011 33

 e·MMC v4.5 Primary Objectives
• Embedded-only specification

• Performance improvement/optimization

• Clarification of v4.41 functions and features

Flash Forward @ CES 2011 34

 Some New Features under Consideration
• E t di
Extending Partition
P titi Att
Attributes
ib t
– Adding attribute registers to clearly define and distinguish the behaviors of
individual partitions
• Data Tag
– Providing information on the type and access frequency of the data being
written
• Real-Time Clock
– Adding a capability for the e·MMC device to receive real-time clock
information from the Host such that certain time-sensitive operations
internal to the e·MMC device may be improved
• Power-Off Notification
– Adding a capability for the Host to notify the e·MMC of an impending power
shutdown
• Dynamic Device Capacity
– Extending the useful life of the e·MMC device by adding the capability of
Host-initiated reduction of Device storage capacity in order to free up spare
memory space to enable the e·MMC device to continue to function
• Discard Command
– A variant of the TRIM command that is more memory technology friendly

Flash Forward @ CES 2011 35

In Conclusion

Flash Forward @ CES 2011 36

• e·MMC
e MMC has established to be the dominant
standard of managed, embedded mass-
storage solution for Mobile

• New e·MMC v4.41 features address many

advanced requirements in high-performance
high performance
handset architecture

• v4.5 Preview – a peek into the future of the

e·MMC Standard

Flash Forward @ CES 2011 37

 Thank You

Flash Forward @ CES 2011 38