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Boost Converter Analysis and Design

The document summarizes the operating principles, analysis, and design of a boost DC-DC converter. It includes: 1) A description of the basic schematic and operation of the boost converter compared to a buck converter. 2) Analysis of the equivalent circuits during the two operating intervals and derivation of the input-output voltage relationship showing that the output voltage is greater than the input voltage. 3) Explanation of the boost converter waveforms including inductor current, capacitor voltage, and derivation of the voltage conversion ratio from volt-second balance of the inductor.

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0% found this document useful (0 votes)
524 views13 pages

Boost Converter Analysis and Design

The document summarizes the operating principles, analysis, and design of a boost DC-DC converter. It includes: 1) A description of the basic schematic and operation of the boost converter compared to a buck converter. 2) Analysis of the equivalent circuits during the two operating intervals and derivation of the input-output voltage relationship showing that the output voltage is greater than the input voltage. 3) Explanation of the boost converter waveforms including inductor current, capacitor voltage, and derivation of the voltage conversion ratio from volt-second balance of the inductor.

Uploaded by

Karthick
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Lecture 4

Analysis and design of a


boost dc-dc converter
• Basic operating principles
• Steady-state analysis and waveforms
• Average model
• Design methods
Schematic and basic operation of boost converter

Buck converter Boost converter


Vin
L L
Vin C R Vo
C R

For unidirectional
power flow iC Io +
qA D1
DTS (1-D)TS iL
1 L
A C
0 + vL _ + R
Vo Vo
vA Vin
qA + vA
S1 _
0 _

D
Raja Ayyanar, ASU
Equivalent circuits in the sub-intervals
iD DTS (1-D)TS
iC Io 1
iL D1 +
L 0
A C Vo
+ vL _ R Vo vA
+
Vin +
qA vA
_ _ 0
D S1

L +
L +
C C R
R Vo Vin Vo
Vin
_ _
• vL =Vin -Vo
• vL = Vin
• iL and energy stored in L decrease,
• iL and energy stored in L increase
energy fed to C and R
• C supports load and discharges
• iC positive and C charges up
• C large enough to maintain voltage
• C large enough to maintain voltage
almost constant (small ripple)
almost constant (small ripple)
Raja Ayyanar, ASU
Input-output voltage relationship

iC Io +
D1
iL
L
A C
+ vL _ + R Vo
Vin
qA + vA
S1 _
_

qA
DTS
v A  Vin since vL  0
(1-D)TS
1
0
v A  1 D Vo (from waveform)
vA Vo
Vo 1 Input-output
(1-D)Vo  relationship for
Vin 1 D
0
boost converter

Raja Ayyanar, ASU


Input-output voltage relationship

Ideal

Vo
Vin

With resistances of L
and MOSFET considered

D
Vo 1 • Resistances of inductor and MOSFET, and voltage
 drop across diode affect voltage conversion ratio
Vin 1 D • Effect is dominant at high D
• Difficult to achieve large conversion ratios ( > 10)
Ideal input-output
• No power transfer at D = 1
relationship
Raja Ayyanar, ASU
Boost converter waveforms
(1 − D)TS
iD qA DTS

iC Io + 1 qA = D
D1
iL t
L 0 VO
A C vA
Vin + vL _ + R Vo v A= (1 − D)Vo

qA + vA 0 t
S1 _ Vin Small ripple approximation
_ vL

D 0 Vin − Vo t
ON interval iL
Io Vin − Vo
i= I= m1 =
Vin
m2 =
(1 − D)
L in
L L
0 t
Volt-sec balance for L
By power balance:
OFF interval Vin DTs  Vin Vo 1 D Ts  0
Vin I in Vo I o
V I Vin  D  1 D   Vo 1 D 
I in  o I o  o Vo 1
Vin 1 D 
Vin 1 D
Raja Ayyanar, ASU
Boost converter waveforms
qA DTS (1 − D)TS
x
iD 1 qA = D
iC Io +
D1 0 VO t
iL vA
L
A C
_ + v A= (1 − D)Vo
Vin + vL R Vo
0 t
qA + vA vL Vin
S1 _
_
0 Vin − Vo t
D
iL
Vin Vin − Vo
Io m1 = m2 =
i= I= L L
(1 − D)
L in
0 t
Average KCL at node x iD iD = I o
iD = iC + I o = I o
0
t
KCL at node x instantaneously iC
iC= iD − I o 0 −Io t

Raja Ayyanar, ASU


Selection of L
vL Vin

0
DTS Vin-Vo
iL Iin Peak-peak ripple
Io  I L in inductor current
iL  I in 
1 D
0

•L selected to limit peak-peak


Consider the TON interval
inductor current ripple to a chosen value
 IL
• For example, 10-20% of max. Iin L  Vin Vo 1 D 
• Specifications on input current ripple DTS
• CCM considerations Vo D 1 D TS
• Choice of L does not significantly L
affect capacitor selection  IL
Raja Ayyanar, ASU
Selection of L
• Design for worst case condition VoTs / 4 L
 IL
Vo D 1 D TS
L
 IL
D
Worst case condition for constant
output voltage applications

dL  D  Vo TS
 1 2 D  0
dD  IL

 D  0.5 (or closest to 0.5 in the


operating range of D)

Raja Ayyanar, ASU


Design parameters for inductor
iL
Iin
Io  IL
iL  Iin 
1 D
0

Vo D 1 D TS I o,max


L DC bias : I in,max 
 IL 1 Dmax

 IL I L 
2
I L, peak  I in,max  I L, RMS  I in,max 
2
2 12

Raja Ayyanar, ASU


Selection of C
• Capacitor selection dictated mostly by the RMS current requirement
(which can be larger than the maximum load current)
iC Iin-Io
0 t
-Io Considering the inductor current ripple
Neglecting the inductor current ripple D 1 D I 2
2
IC ,RMS  I o 1
1 D D 12 I o2
I C , RMS  I o2 D   I in  I o  1 D 
2 2
0% Iripp le
20% Iripp le
50% Iripp le
I 1.5

substitute, I in  o I C , RMS
1 D 1
Io
D
IC ,RMS  I o
0.5

1 D 0
0 0.2 0.4 0.6
D
Raja Ayyanar, ASU
Selection of C
• Choose C based on RMS current requirement
• Worst case condition is max. load and max. D
• Verify if Vo specification is satisfied with the chosen C and ESR
iC Iin-Io
0
-Io
t

Vo due to capacitive impedance iD


D1 iC Io +
Consider the ON interval iL
A C
I o DTS L
Vo  Vin R Vo
C qA +

S1 _
ESR limit
Vo Vo D
ESR  
I Co , max I in, pk Voltage rating: Vo
Raja Ayyanar, ASU
Switch ratings
+
iL D1

Vin Vo
+
S1 _

MOSFET Diode
Voltage rating: Vo
Voltage rating: Vo
Peak current rating: Peak current rating:
I L
isw, pk  iL, pk  I in,max  I L
2 iD , pk  iL, pk  I in,max 
2
RMS current rating: Average current rating:
D iD ,avg  I o,max
isw, RMS  I in,max D  I o,max
1 D
Raja Ayyanar, ASU

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