3/21/2021 Take Test: Midterm Test – CS-385-01 Spring 2021

Take Test: Midterm Test

Test Information
Description
Instructions The test must be done completely individually. The only sources you are allowed to access
are: Blackboard for this course, the lecture notes in the Syllabus, the lecture recordings, and
the textbook. You may not use any other online tools or sources during the test. Use of any
other source or any form of collaboration during the test will constitute Academic Misconduct
per CCSU Academic Integrity policy and will be met with a zero for the exam and an
Academic Misconduct Report will be filed with the university.

Timed Test This test has a time limit of 3 hours.This test will save and submit automatically when the time
expires.
Warnings appear when half the time, 5 minutes, 1 minute, and 30 seconds remain.
Multiple Not allowed. This test can only be taken once.
Attempts
Force This test can be saved and resumed at any point until time has expired. The timer will continue
Completion to run if you leave the test.
Your
Remaining answers
Time: 59 minutes,
are saved
2 hours, 51 seconds.
automatically.

Question Completion Status:

QUESTION 1 1 points Save Answer

The pipelined MIPS datapath executes the following code:

lw $16, 12($4)
lw $17, 16($4)
beq $8, $9, skip
sw $18, 16($4)
skip: sw $18, 12($4)

How many cycles does it take to execute the code if the branch is not taken?

QUESTION 2 1 points Save Answer

The following is a fragment of Verilog code implementing the MIPS processor.

What is the value in decimal loaded in register $8 after executing the instruction?
Assume little-endian byte order.
Click Save and
reg[31:0] Submit to saveDMemory[0:1023];
IMemory[0:1023], and submit. Click Save All Answers to save all answers.
initial begin
IMemory[0] = 32'h81280002; // lb $8, 2($0)
DMemory[0] = 32'h01234567;
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3/21/2021 Take Test: Midterm Test – CS-385-01 Spring 2021
y[ ] ;
end

QUESTION 3 1 points Save Answer

Check all instructions that set the value of the MemtoReg control signal to 1 when
executed on a single cycle datapath.
add $t0, $t0, $t1

addi $t0, $t1, 0

lw $t0, 4($a0)

lw $t0, X

QUESTION 4 1 points Save Answer

The decimal number 1.024 can be represented in the floating point IEEE 754
format exactly (without an error).
True Time: 2 hours, 59 minutes, 51 seconds.
Remaining

False
Question Completion Status:

QUESTION 5 1 points Save Answer

The following program is executed on the datapath shown below.

lw $16, 12($4)
lw $17, 16($4)
beq $8, $9, skip
sw $18, 16($4)
add $18, $16, $18

Click Save and Submit to save and submit. Click Save All Answers to save all answers.
The address of the skip label is computed during cycle number (start counting from 1):

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3/21/2021 Take Test: Midterm Test – CS-385-01 Spring 2021

QUESTION 6 1 points Save Answer

Assuming that ALUOut holds a byte address, which definition of the data
memory is consistent with the following definition of the MemtoReg multiplexer:
assign WD = (MemtoReg) ? DMemory[ALUOut>>1]: ALUOut;

reg[31:0] DMemory[0:1023];

reg[7:0] DMemory[0:1023];

reg[15:0] DMemory[0:1023];

reg[0:7] DMemory[0:1023];

reg[0:31] DMemory[0:1023];

QUESTION 7 1 points Save Answer

A is a two's complement binary number represented in 12 bits and B is a two's

complement binary number represented in 10 bits as shown below.
A = 110000111100
Remaining Time: 2 hours, 59 minutes, 51 seconds.
B = 0000111100

Compare
Question A and B and
Completion check the correct result.
Status:
A<B

A=B

A>B

QUESTION 8 1 points Save Answer

An R-type instruction is represented by the bit string 00000001001010100100000

000100000. The destination register (rd) number (in decimal) is

QUESTION 9 1 points Save Answer

A is a negative two's complement binary number and B is a positive two's

complement binary number. Check all arithmetic expressions that may cause an
overflow.

0+A

0-A

A+B

0-B

B-A

Click Save
A-B and Submit to save and submit. Click Save All Answers to save all answers.

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3/21/2021 Take Test: Midterm Test – CS-385-01 Spring 2021
QUESTION 10 1 points Save Answer

The following program is executed on the pipelined MIPS processor:

1: sub $12, $1, $2
2: and $2, $12, $5
3: or $14, $6, $2

4: add $14, $12, $12

Check all true statements below about data dependencies:
Instruction 4 depends on instruction 2 through register $12.

Instruction 4 depends on instruction 1 through register $12.

Instruction 2 depends on instruction 1 through register $12.

Instruction 4 depends on instruction 3 through register $14.

Instruction 2 depends on instruction 1 through register $2.

Instruction 3 depends on instruction 2 through register $2.

Q U E S T I O N 11 1 points Save Answer

Remaining Time: 2 hours, 59 minutes, 51 seconds.
Check all instructions that set the value of the RegDst control signal to 1 when
executed
Question on a singleStatus:
Completion cycle datapath.

add $t0, $t0, $t1

addi $t0, $t1, 0

lw $t0, 4($a0)

mul $t0, $t0, $t1

QUESTION 12 1 points Save Answer

The single-cycle datapath executes a beq instruction represented by the following

bit string: 00010001000010011111111111111111. Which two registers does this
instruction compare?

$t1 and $t2

$a0 and $a1

$t0 and $t1

$t0 and $a0

QUESTION 13 1 points Save Answer

The following Verilog module implements

module xyz(S, x, y, M);
input S, x, y;
output M;
Clickwire
Savew1,
and Submit to save and submit. Click Save All Answers to save all answers.
w2;
not(s, S);
and(w1, x, s);
and(w2, y, S);
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3/21/2021 Take Test: Midterm Test – CS-385-01 Spring 2021
or(M, w1, w2);
endmodule

D latch

1-bit half adder

D flip-flop

None of the above

2x1 multiplexor

QUESTION 14 1 points Save Answer

Check all instructions that set the value of the ALUSrc control signal to 0 when
executed on a single cycle datapath.
lw $t0, 4($a0)

add $t0, $t0, $t1

addi $t0,
Remaining $t1, 20 hours, 59 minutes, 51 seconds.
Time:
beq $t0, $t1, Label
Question Completion Status:

QUESTION 15 1 points Save Answer

The following program is executed on the pipelined MIPS processor:

sub $2, $1, $3
and $12, $2, $5
or $14, $6, $14
add $14, $2, $12

Assuming that there is no forwarding, what is the minimal number of nop’s to be

inserted in the code in order to resolve all data hazards:

QUESTION 16 1 points Save Answer

A lw instruction is represented by the bit string 100011000000100000000000001

10010. The data memory address (in decimal) this instruction refers to is

QUESTION 17 1 points Save Answer

The pipelined MIPS datapath executes the following code:

lw $16, 12($4)
lw $17, 16($4)
beq $8, $9, skip
Click Save and Submit to save and submit. Click Save All Answers to save all answers.
sw $18, 16($4)
add $18, $16, $18

The value of a memory word is assigned to register $17 during cycle number
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3/21/2021 Take Test: Midterm Test – CS-385-01 Spring 2021
The value of a memory word is assigned to register $17 during cycle number
(start counting from 1):

QUESTION 18 1 points Save Answer

The following program is executed on the pipelined MIPS processor:

sub $2, $1, $3
and $12, $2, $5
or $14, $6, $12
add $14, $2, $2

How many data dependencies in this code are hazards?

QUESTION 19 1 points Save Answer

Assume that variables A, B and C are stored in three consecutive 4-byte words in
the memory (A is at the lowest address). The address of C is stored in register
$a0. Check the instruction which loads the value of A in register $t0.
Remaining -8($a0)2 hours, 59 minutes, 51 seconds.
la $t0,Time:

lw $t0, -8($a0)
Question Completion Status:
move $t0, $a0

lw $t0, 8($a0)

QUESTION 20 1 points Save Answer

The bit string 1111010101 represents an 10-bit two's complement binary number.
Its decimal equivalent is:

Click Save and Submit to save and submit. Click Save All Answers to save all answers.

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