Introduction To Field Programmable Gate Arrays AND Its Applications
Introduction To Field Programmable Gate Arrays AND Its Applications
SEMINAR REPORT ON
INTRODUCTION TO
FIELD PROGRAMMABLE GATE ARRAYS
AND
ITS APPLICATIONS
Submitted By:
PARIDHI NAGORI
08EC000324
6th sem, 3rd year
CONTENTS
1. INTRODUCTION…………………………………………………………………….. 3
1.1 What is an FPGA?....................................................................................... 3
1.2 History …………………………………………………………………………... 3
1.3 Why FPGAs were introduced? …………………………….………………….. 4
5. Architecture of FPGA.………………………………………………………………. 7
5.1 Logic Cells………………………………………………………..…………….. 8
5.2 Inter-connect……………………………………………………………..………. 8
5.3 IO cells……………………………………………………………..……………… 8
5.4 Dedicated Routing/Carry Chains……………………………………………….. 9
5.5 Internal RAM ……………………………………………………………..………. 10
5.6 FPGA Pins……………………………………………………………..…………. 10
5.7 Clock and Global Lines………………………………………………………….. 11
5.8 Clock and Global Lines………………………………………………………….. 11
6. Applications ………………………………………………………………………… 11
7. References ………………………………………………………………………… 13
1. INTRODUCTION
Field-programmable gate array (FPGA) technology continues to gain momentum, and
the worldwide FPGA market is expected to grow from $1.9 billion in 2005 to $2.75
billionby 2011. Since its invention by Xilinx in 1984, FPGAs have gone from being
simple glue logic chips to actually replacing custom application-specific integrated
circuits (ASICs) and processors for signal processing and control applications.
At the highest level, FPGAs are reprogrammable silicon chips. Using prebuilt logic
blocks and programmable routing resources, these chips can be configured to
implement custom hardware functionality without ever having to pick up a breadboard or
soldering iron. We can develop digital computing tasks in software and compile them
down to a configuration file or bitstream that contains information on how the
components should be wired together. In addition, FPGAs are completely
reconfigurable and instantly take on a brand new “personality” when you recompile a
different configuration of circuitry. The rise of high-level design tools with new
technologies can convert graphical block diagrams or even C code into digital hardware
circuitry.
FPGA chip adoption across all industries is driven by the fact that FPGAs combine the
best parts of ASICs and processor-based systems. FPGAs provide hardware-timed
speed and reliability, but they do not require high volumes to justify the large upfront
expense of custom ASIC design. Unlike processors, FPGAs are truly parallel in nature
so different processing operations do not have to compete for the same resources.
Each independent processing task is assigned to a dedicated section of the chip, and
can function autonomously without any influence from other logic blocks. As a result,
the performance of one part of the application is not affected when additional
processing is added.
1.2 HISTORY
In the late 1980s the Naval Surface Warfare Department funded an experiment
proposed by Steve Casselman to develop a computer that would implement 600,000
reprogrammable gates. Casselman was successful and a patent related to the system
was issued in 1992.
Xilinx continued unchallenged and quickly growing from 1985 to the mid-1990s, when
competitors sprouted up, eroding significant market-share. By 1993, Actel was serving
about 18 percent of the market.
The 1990s were an explosive period of time for FPGAs, both in sophistication and the
volume of production. In the early 1990s, FPGAs were primarily used in
telecommunications and networking. By the end of the decade, FPGAs found their way
into consumer, automotive, and industrial applications.
There are only few companies which manufactures FPGAs. Xilinx (inventor of FPGA),
Altera hold bulk of the market. Lattice, Actel and Silicon Blue are small players.
By the early 1980's Large scale integrated circuits (LSI) formed the back bone of most
of the logic circuits in major systems. Microprocessors, bus/IO controllers, system
timers etc were implemented using integrated circuit fabrication technology. Initially, to
solve the problem of presence of large number of MSI and SSI component, Custom ICs
were used which reduced system complexity and manufacturing cost, and improved
performance. However they have their own disadvantages. They are relatively very
expensive to develop as both cost of development and designing and cost of
manufacturing are included. Therefore these were viable for products with very high
volume, and which were not time to market sensitive.
FPGAs were introduced as an alternative to custom ICs for implementing entire system
on one chip and to provide flexibility of re-programmability to the user. Introduction of
FPGAs resulted in improvement of density relative to discrete SSI/MSI components
(within around 10x of custom ICs). Another advantage of FPGAs over CustomICs is that
with the help of computer aided design (CAD) tools circuits could be implemented in a
short amount of time (no physical layout process, no mask making, no IC
manufacturing).
1. Performance
2. Time to Market
3. Cost
4. Reliability
5. Long-Term Maintenance
3. Cost – The nonrecurring engineering (NRE) expense of custom ASIC design far
exceeds that of FPGA-based hardware solutions. The large initial investment in
ASICscan be saved. The very nature of programmable silicon means that there
is no cost for fabrication or long lead times for assembly. As system requirements
often change over time, the cost of making incremental changes to FPGA
designs are quite negligible when compared to the large expense of re-spinning
an ASIC.
FPGAs and CPLDs are not the same thing. Both are Programmable digital logic chips
and are made by the same companies. But they have different characteristics.
FPGAs are "fine-grain" devices - that means that they contain a lot (up to
100000) of tiny blocks of logic with flip-flops. CPLDs are "coarse-grain" devices -
they contain relatively few (a few 100's max) large blocks of logic with flip-flops.
FPGAs are RAM based - they need to be "downloaded" (configured) at each
power-up. CPLDs are EEPROM based - they are active at power-up (i.e. as long
as they've been programmed at least once...).
FPGAs have special routing resources to implement efficiently arithmetic
functions (binary counters, adders, comparators...). CPLDs do not.
In general, FPGAs can contain large digital designs, while CPLDs can contain small
designs only.
Microcontrollers have on-chip peripherals that also execute in parallel with their CPU.
But they are still much less configurable than FPGAs.
5. ARCHITECTURE OF FPGAs
The FPGA has three major configurable elements: configurable logic blocks
(CLBs),input/output blocks and interconnects. The CLBs provide the functional
elements for constructing user's logic.The IOBs provide the interface between the
package pins and internal signal lines. The programmable interconnect resources
provide routing paths to connect the inputs and outputs of the CLBs and IOBs onto the
appropriate networks.
FPGAs are built from one basic "logic-cell", duplicated hundreds or thousands of time. A
logic-cell is basically a small lookup table ("LUT"), a D-flip-flop and a 2-to-1 mux (to
bypass the flip-flop if desired).
The LUT is like a small RAM that can implement any logic function. It has typically a few
inputs (4 in the drawing above), so for example an AND gate with 3 inputs, whose result
is then OR-ed with another input would fit in one 4-inputs LUT.
5.2 Interconnect
5.3 IO-Cells
The interconnect wires also go to the boundary of the device where I/O cells are
implemented and connected to the pins of the FPGAs
Interconnect Sources
FPGA Architecture
Older programmable technologies (PAL/CPLD) don't have carry chains and so are
quickly limited when arithmetic operations are required.
SIR PADAMPAT SINGHANIA UNIVERSITY Page 9 of 13
Introduction To Field Programmable Gate Arrays And Its Applications
In addition to logic, all new FPGAs have dedicated blocks of static RAM distributed
among and controlled by the logic elements.
There are many parameters affecting RAM operation. The main parameter is the
number of agents that can access the RAM simultaneously.
FPGAs consist of many pins. They can be broadly classified into two
User Pins
Dedicated Pins
USER PINS
The User pins are called “IOs”, or “I/Os”. We can have total control over IOs. They can
be programmed to be inputs outputs, or bi-directional (using tri-state buffers).Each IO
pin is connected to an “IO cell” inside the FPGA. The “I/O cells” are powered by the
VCCIO pins (IO power pins).
DEDICATED PINS
These pins are hard coded to a specific function. These can be further divided as:
Power pins.
Configuration pins: used to “download” the FPGA.
Dedicated inputs, or clock pins: These are able to drive large nets inside the
FPGA, suitable for clocks or signals with large fan-outs.
FPGA designs are usually synchronous i.e. design is clock based (each clock’s rising
edge allows the D-flip-flops to take a new state). A single clock can drive many flip-flops
simultaneously, but this can cause timing and electrical problems inside the FPGA. To
get that working properly, special internal wires called “GLOBAL ROUTING” or
“GLOBAL LINES” are provided. These allow distributing the clock signal all over the
FPGA with a low skew.
For each clock domain, the FPGA software analyses all flip-to –flop paths and gives a
report with the maximum allowed frequencies.
One clock domain may work at 10MHz, while another may work at 100MHz. As long as
each clock uses a global line,& we use clock speeds that are lower than the maximum
speed reported by the software we need not to worry about internal timing issues.
6. APPLICATIONS
Applications of FPGAs include digital signal processing , software-defined
radio, aerospace and defense systems, ASIC prototyping, medical imaging, computer
vision, speech recognition, cryptography, bioinformatics, computer hardware
emulation, radio astronomy, metal detection and a growing range of other areas.
FPGAs especially find applications in any area or algorithm that can make use of
the massive parallelism offered by their architecture.
FPGAs are increasingly used in conventional high performance
computing applications where computational kernels such
as FFT or Convolution are performed on the FPGA instead of amicroprocessor.
Traditionally, FPGAs have been reserved for specific vertical applications where
the volume of production is small. For these low-volume applications, the
premium that companies pay in hardware costs per unit for a programmable chip
is more affordable than the development resources spent on creating an ASIC for
a low-volume application. Today, new cost and performance dynamics have
broadened the range of viable applications.
7. REFERENCES
http://zone.ni.com/devzone/cda/tut/p/id/6984
www.wikepedia.com
http://www.tutorial-reports.com/computer-science/fpga/overview.php
www.fpga4fun.com
“Introduction to FPGA-based micro system design”, Texas Instruments
Arifur Rahman, “FPGA Based Design and Applications”, Springer