2.

4 GHz Class-E power amplifier with transmission-

line harmonic terminations
T. Mury, V.F. Fusco and H. Cantu

Abstract: The design procedure, fabrication and measurement of a Class-E power amplifier with
excellent second- and third-harmonic suppression levels are presented. A simplified design tech-
nique offering compact physical layout is proposed. With a 1.2 mm gate-width GaAs MESFET
as a switching device, the amplifier is capable of delivering 19.2 dBm output power at
2.41 GHz, achieves peak PAE of 60% and drain efficiency of 69%, and exhibits 9 dB power
gain when operated from a 3 V DC supply voltage. When compared to the classical Class-E two-
harmonic termination amplifier, the Class-E amplifier employing three-harmonic terminations has
more than 10% higher drain efficiency and 23 dB better third-harmonic suppression level.
Experimental results are presented and good agreement with simulation is obtained. Further, to
verify the practical implementation in communication systems, the Bluetooth-standard GFSK
modulated signal is applied to both two- and three-harmonic amplifiers. The measured RMS
FSK deviation error and RMS magnitude error were, for the three-harmonic case, 1.01 kHz and
0.122%, respectively, and, for the two-harmonic case, 1.09 kHz and 0.133%.

1 Introduction Class-E load network L-Ls-Cs-R, as shown in Fig. 1, is

intended to suppress the unwanted harmonic signal, then a
As the demand for wireless-handset electronic devices high-inductance value of L þ Ls which inherently has high
such as cellular phones, keeps increasing, powerful new ESR is required. This, in turn, will degrade amplifier
standards which offer advanced high-quality integrated performance in terms of its efficiency and output power.
services, such as video, camera, high-speed internet etc., To minimise these effects, a load topology based on trans-
at high data rates, are utilised. The negative consequence mission lines [3, 5 – 6] can be used.
of this is that transceiver circuit complexity, and hence An idealized conventional Class-E amplifier, [1, 2]
its power consumption, can increase, thereby reducing requires a load impedance R þ jvL at the fundamental
talk time. A major power-hungry component is the frequency and an open circuit at all other harmonic
transmitter power amplifier, and thus it is critical to frequencies. In [3], a transmission-line load network was
design highly efficient power amplifiers. Improving the designed to meet the required Class-E impedance termin-
efficiency of an amplifier not only means increasing ations at the fundamental frequency and second harmonic
battery life time, or obtaining higher output power which only. The techniques for analysis of Class-E amplifers
implies longer range coverage in wireless communication based on a finite number of harmonics were developed in
systems, but also enhancing reliability and reducing [4], where it was shown theoretically that the drain effi-
thermal dissipation. ciency can be increased by increasing the number of harmo-
The Class-E power amplifier in Fig. 1, introduced by nics employed from 2 to 3.
Sokal [1] and analysed by Raab [2], theoretically offers In this paper, we present the design, fabrication and
100% collector or drain efficiency by the fact that characterisation of a 2.4 GHz-3 V Class-E amplifier
nonzero switching voltage and current are prevented employing a three-harmonic termination circuit. A simpli-
from occurring simultaneously. Further, as a switching fied version of the design approach given in [5] is used to
amplifier, it has direct control of the output power level transform the optimum lumped-element load network into
through the DC supply voltage, without undue impairment an equivalent distributed-element load network. Two open-
of efficiency. circuit shunt stubs are deployed to terminate the second and
At RF and microwave frequencies, the lumped realisation third-harmonic signals, while meeting the required
of a Class-E amplifier is not very attractive, because the optimum load impedance at the fundamental frequency.
unloaded Q-factor of the lumped components is inherently The proposed technique offers a physically more compact
reduced at these frequencies. This results in higher parasitic design, when compared to that obtained by following the
electrical series resistances (ESR) and lower self-resonance procedure given in [5].
frequencies. Moreover, if a high-loaded Q-factor of the For comparison, a second 2.4 GHz-3 V Class-E amplifier
employing a two-harmonic termination circuit was also
constructed and measured. We show that better drain effi-
# The Institution of Engineering and Technology 2007 ciency and better harmonic suppression levels, for the
doi:10.1049/iet-map:20060133 Class-E circuit employing three-harmonic termination,
Paper first received 12th June and in revised form 29th November 2006 were obtained. The effects that the different order termin-
The authors are with The Institute of Electronics Communications and IT, ation circuits have on Class-E amplifier response to
Queens University of Belfast, Queens Rd, Queens Island, Belfast BT3 9DT, UK Bluetooth GFSK modulation, i.e. at 1 Mbps data rate [7],
E-mail: [email protected] are investigated.
IET Microw. Antennas Propag., 2007, 1, (2), pp. 267– 272 267
 been demonstrated that an open-circuit termination at the
second harmonic is sufficient to produce approximate
Class-E operation. In other words, the switch voltage
consists of only fundamental and second-harmonic
components. The electrical lengths of series line u1 and
shunt stub u2 in Fig. 2 may be chosen to be 458 at fo or
908 at 2fo , so that they can provide an open circuit at
second harmonic. The characteristic impedances for these
Fig. 1 Basic Class-E amplifier circuit
lines Z01 and Z02 can be computed by solving (6) and (7)
simultaneously, to satisfy the fundamental-frequency
impedance requirement
2 Class-E circuit design
2 2
2R0 Z01 Z02
The basic circuit of a Class-E amplifier shown in Fig. 1 is ¼R ð6Þ
comprised of a transistor, a shunt capacitance C and a R20 ðZ01 þ Z02 Þ2 þ Z01
2 Z2
02
series-tuned load network Ls-Cs-R. An additional inductive R20 ðZ01
2 2

Z02 2 2
Þ þ Z01 Z02
reactance L is required to compensate the fundamental- Z01 2 2 2 2
¼ vL ð7Þ
frequency phase shift. The DC supply voltage VDC is trans- R0 ðZ01 þ Z02 Þ þ Z01 Z02
formed by transistor ON-OFF switching action into a series
of related fundamental and harmonic voltages. The By means of the approach explained here the third-
unwanted harmonic voltages are then suppressed by the harmonic level is, in most cases, still quite high, and
series-tuned Ls-Cs circuit, provided this has a high enough therefore can degrade the amplifier’s efficiency. To
Q-factor to leave only the fundamental-frequency voltage resolve this problem, the shunt stub TL2 in Fig. 2 is modi-
waveform. fied into two open-circuit shunt stubs TL2nd and TL3rd
The design-oriented equations required to determine the to simultaneously suppress second- and third-harmonic
optimum lumped-component values of the Class-E power signal contents. Here, the electrical lengths of TL2nd and
amplifier in Fig. 1, under 50% duty ratio operation and TL3rd are, respectively, 458 and 308 at fo . The characteristic
for given input specifications in terms of output power Po , impedances for both shunt stubs are computed using (8).
DC supply voltage VDC , operating frequency fo and
Z0 ¼ Z02 ðtan 45W þ tan 30W Þ ð8Þ
loaded Q-factor given in [8], are reproduced here as (1) – (5)
Po Note that, Owing to the periodic characteristic of a trans-
C¼ 2
ð1Þ mission line, other higher harmonics (6fo , 9fo etc.) are
pvVDC also suppressed by these lines. The proposed technique,
pðp2
4ÞVDC
2 thus, does not violate the load-impedance requirements
L¼ ð2Þ for Class-E operation as explained in the preceding text
2ðp2 þ 4ÞvPo i.e. R þ jvL at fundamental frequency and an open circuit
8 VDC 2 at the second harmonic. More importantly, unlike in [5],
R¼ ð3Þ our approach does not require an additional series line and
p2 þ 4 Po
thereby results in a physically more compact design.
1
Cs ¼ ð4Þ
vQR
3 Simulation results
1
Ls ¼ 2 ð5Þ
v Cs To confirm the theoretical analysis and synthesis explained
in the preceding sections, harmonic balance augmented with
In most cases, the load resistance of a power amplifier has to momentum simulations have been carried out within
meet a specific value, 50 V is typical. However, Class-E Agilent Advanced Design Systems (ADS) suite, [9]. The
synthesis may suggest values of other than 50 V, depending transistor used is a 0.3 mm gate-length 1.2 mm gate-width
on the values of VDC and Po given in (3). Hence, an impe- MwT-8 GaAs MESFET [10], which has a large-signal
dance transformation of the load may be required for effec- model available within the ADS library. A realistic model
tive 50 V system utilisation of the Class-E amplifier. for the lumped-component DC blocking capacitance 22 pF
Consider Fig. 2, where a combination of series line TL1 is provided by AVX Corporation [11] and is included in
and open-circuit shunt stub TL2 is used to transform any the simulation. The substrate used was Rogers RO4003C,
arbitrary system load resistance Ro into the optimum dielectric constant 3.38 + 0.05, substrate thickness
Class-E load impedance values, R þ jvL, described by (2) 508 mm, copper thickness 17 mm and loss tangent 0.0021
and (3). The Class-E amplifier requires a load impedance at 2.5 GHz. The dimensions of the series line and the open-
R þ jvL at fundamental frequency and an open circuit at circuit shunt stubs are as follow: W ¼ 1154 mm and
other harmonic frequencies [2]. However, in [3], it has L ¼ 10903 mm for TL1, W ¼ 935 mm and L ¼ 9663 mm
for TL2nd, and W ¼ 935 mm and L ¼ 6442 mm for
TL3rd. The characteristic impedances of both stubs are
the same and are computed using (8), and the electrical
lengths of TL2nd and TL3rd are, respectively, 458 and 308.
Small signal S-parameter simulations are used to deter-
mine an approximate value of transistor output capacitance
at the design frequency 2.4 GHz at the operational gate and
drain bias conditions VGS ¼ 22.2 V and VDC ¼ 4 V. Here,
the intrinsic transistor output capacitance 0.3 pF is found
Fig. 2 Transmission-line load network of Class-E circuit to be smaller than that required for optimum Class-E
268 IET Microw. Antennas Propag., Vol. 1, No. 2, April 2007
Fig. 3 ADS simulation results (VGS ¼ 22.2 V, VDC ¼ 4 V, f ¼ Fig. 5 ADS simulation results (VGS ¼ 22.2 V, Pi ¼ 10.4 dBm,
2.4 GHz): output power, gain, drain and power-added efficiency f ¼ 2.4 GHz): output power, gain, drain and power-added
against input power efficiency against DC supply voltage

operation, 1.3 pF (1). Hence, an extra shunt capacitance of 2.4 GHz. However, owing to stub-to-stub electromagnetic
l pF is added by using an open-circuit shunt stub. coupling effects, the input-match frequency for the same
The chokes for gate and drain biasing are designed using circuit, as predicted from momentum simulation, shifts to
quarter-wavelength transmission lines, which provide an 2.37 GHz with return loss ,229 dB.
open-circuit path for RF signals and a short-circuit path
for DC, and these are connected to radial stubs. 4 Experimental results
The simulation results are shown in Figs. 3, 4 and 5. Fig. 3
depicts the output power, gain, drain and power-added effi- To validate both theoretical analysis and simulation results,
ciency against input power for VGS ¼ 22.2 V VDC ¼ 4 V we built a Class-E amplifier on a 4.7 cm  3.7 cm substrate,
and fo ¼ 2.4 GHz. It can be seen from Fig. 3 that the peak Fig. 6. The measured output power, gain, drain and power-
PAE and h are, respectively, 64% and 70%, at output added efficiency against input power, when the transistor is
power 21.3 dBm and input power 10.4 dBm, and hence biased with VGS ¼ 23 V and VDC ¼ 3 V at 2.41 GHz, are
results in 10.9 dB gain. The output power starts to saturate illustrated in Fig. 7. Here, peak PAE and h obtained are
at an input power level of about 8 dBm, below which the respectively, 60% and 69%, at output power 19.2 dBm
input and output power relationship is linear. and input power 10.4 dBm, and hence results in 8.8 dB gain.
The output power, gain, drain efficiency and power added The amplifier performance at input power 10.4 dBm,
efficiency are plotted against frequency in Fig. 4, for input when the operating frequency is varied, is presented in
power 10.4 dBm. A PAE . 49% and h . 54% are obtained Fig. 8. It can be seen that the PAE, h, output power and
over a 300 MHz bandwidth, i.e. from 2.1 GHz to 2.4 GHz. gain reach their peak values simultaneously at 2.41 GHz.
Within this bandwidth, output power level is better than Also, it is obvious from Fig. 8 that h is better than 49% is
20 dBm and gain is better than 9.9 dB. obtained over a 200 MHz bandwidth, i.e. from 2.21 GHz
The amplifier performance when the DC supply voltage is to 2.41 GHz.
swept from I V to 5 V is presented in Fig. 5. It is evident that Fig. 9 shows the plot of output power, gain, drain and
the output power can be directly controlled through the DC power added efficiency against VDC . When the DC supply
supply voltage without unduly impairing efficiency, i.e. h voltage is swept from 2 V to 3.5 V, the PAE remains
is better than 59% as VDC is varied from 1 V to 5 V. .53%, while h . 61%. In [2], it has been demonstrated
The input matching circuitry formed using a series line that the amplitude of output voltage vo (u) is linearly pro-
together with a shunt stub is designed based on small-signal portional to the DC supply voltage VDC , reproduced here
S-parameter simulations at the input. This matching circuit as (9) – (12), and, as a consequence, the output power is a
results in a computed return loss of about 226 dB at quadratic function of VDC . From Fig. 9, the typical quadratic
behaviour of output power as a function of VDC is confirmed
in (13), which agrees well with theoretical analysis.
Although not discussed further here, this feature makes
the Class-E amplifier useful for envelope elimination

Fig. 4 ADS simulation results (VGS ¼ 22.2 V, VDC ¼ 4 V, Pi ¼

10.4 dBm): output power, gain, drain and power-added efficiency Fig. 6 Photograph of fabricated three-harmonic Class-E power
against frequency amplifier

IET Microw. Antennas Propag., Vol. 1, No. 2, April 2007 269

 Fig. 9 Measurement results (VGS ¼ 23 V, Pi ¼ 10.4 dBm, f ¼
Fig. 7 Measurement results (VGS ¼ 23 V, VDC ¼ 3 V, f ¼ 2.41 GHz): output power, gain, drain and power-added efficiency
2.41 GHz): output power, gain, drain and power-added efficiency against DC supply voltage
against input power

substrate as shown in Fig. 11. This circuit apparently con-

restoration (EER) transmitter-linearisation schemes [12] sumes more area when compared to the amplifier in Fig. 6.
The simulated and measured results for the comparative
vo ðuÞ ¼ c sinðu þ fÞ ð9Þ design are depicted in Fig. 12 when the input power is
VDC manually swept from 220 dBm to 15 dBm in 2.5 dBm
c¼ Rg ð10Þ steps. Here, the amplifier, when biased with VGS ¼ 23 V
RDC
and VDC ¼ 3 V is capable of delivering peak output power
RDC 20.5 dBm, achieves peak PAE 55% and peak drain effi-
¼ 1:7337 ð11Þ
R ciency 57%, at operating frequency 2.44 GHz. At its
optimum operating point the measured second- and third-
g ¼ 1:8621 ð12Þ
harmonic levels are, respectively, 35 dBc and 21 dBc.
When compared to these results, the Class-E with three
here u ¼ vt, v ¼ 2pf, f is the operating frequency, f is the harmonics, discussed previously, has a 5% higher PAE
output phase, R is the load resistance and RDC is the load and a 12% higher drain efficiency at about 1 dB lower
that the amplifier shows to the power supply output power. The second- and third-harmonic levels are,
 2 respectively, 9 dB and 23 dB better. Here, the increase of
3:5 V drain efficiency of more than 10% agrees well with the
10ð20:15 dBm
15:9 dBmÞ=10 ’ ’3 ð13Þ
2V

The comparisons between simulated and measured results

are given in Fig. 10, and good agreement was obtained.
Measured second- and third-harmonic levels are
,225 dBm, which are about 44 dBc at optimum operating
point, i.e. 19.2 dBm output power.

5 Comparison with Class-E amplifier employing

two-harmonic termination

Using the same transistor MwT-8 GaAs MESFET and the

same RO4003C material and following the design pro-
cedure presented in [3], a Class-E amplifier employing
two harmonics was constructed on a 5.7 cm  3.7 cm

Fig. 8 Measurement results (VGS ¼ 23 V, VDC ¼ 3 V, Pi ¼ Fig. 10 Comparisons of simulated and measured results
10.4 dBm): output power, gain, drain and power-added efficiency a Output power and gain against input power
against frequency b Drain and power-added efficiency against input power

270 IET Microw. Antennas Propag., Vol. 1, No. 2, April 2007

Fig. 11 Photograph of the constructed two-harmonic Class-E
power amplifier

analysis prediction treated in [4]. Further, it is observed that

there is a sudden increase in the second-harmonic level,
i.e. from 230 dBm to 215 dBm, for input power levels
between 22.5 dBm and 0 dBm. This has the effect of
causing a sudden increase in both PAE and drain efficiency,
as can be seen from Fig. 12b. This behavioural character-
istic was not observed in the Class-E with three-harmonic
termination shown in Fig. 7.
The simulated and measured results when the frequency
is swept are plotted in Fig. 13. Here, the input power,
VGS, and VDC used are, respectively, 7.5 dBm, 23 V and
3 V. The effective bandwidth obtained from the measure-
ment results is 120 MHz, i.e. from 2.38 GHz to 2.5 GHz,
better than the simulation prediction, which is 80 MHz,
i.e. from 2.38 GHz to 2.46 GHz, but worse than the
effective bandwidth of the previous circuit Class-E with Fig. 13 Output power, gain, drain and power-added efficiency
against frequency
a Simulation
b Measurement

three harmonics, i.e. 200 MHz. Fig. 14 shows the exper-

imental amplifier response to the DC supply voltage vari-
ations. When sweeping the VDC from 2 V to 3.5 V, the
drain efficiency remains better than 52%; compare this to
Class-E with three harmonics, Fig. 9, where the drain effi-
ciency remains better than 61%.

6 Bluetooth GFSK modulation

The Class-E amplifier is ideally used for amplifying signals

which are phase-encoded, i.e. have constant-envelope
modulation. Fig. 15 shows the measured output spectrum
of the Class-E amplifier with three harmonics when a con-
stant envelope Bluetooth-standard GFSK modulated signal
at 1 Mbits/s data rate was applied from a Rohde and

Fig. 12 Comparisons of simulated and measured results (with

respect to Fig. 11)
a Output power and gain against input power Fig. 14 Measured output power, gain, drain and power-added
b Drain and power-added efficiency against input power efficiency against DC supply voltage

IET Microw. Antennas Propag., Vol. 1, No. 2, April 2007 271

 achieves peak PAE of 60% and drain efficiency of 69%,
and exhibits 8.8 dB power gain when operated with 3 V
supply voltage. When a GFSK modulated signal with con-
stant envelope was applied to both amplifiers, no spectral
regrowth was observed. However, when compared to the
Class-E with two-harmonic termination, the Class-E ampli-
fier employing three-harmonic termination has more than
10% higher drain efficiency and 23 dB better third-
harmonic suppression level.

8 Acknowledgments

This work was funded by the UK Engineering and Physical

Science Research Council under Grant EP/C002083/1. The
work of T. Mury was supported by the Queen’s University
of Belfast. The authors would like to thank Mr. A. Black,
Mr. J. Knox, and Mr. N. Kidd for carrying out the
fabrication.
Fig. 15 Measured output spectrum for Bluetooth GFSK modu- 9 References
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