Scribd
Upload
5K views

Assignment2 Half and Full Adder

The document describes half adders and full adders. A half adder adds two binary digits and produces a sum and carry output. A full adder adds three binary digits and produces a sum and carry output. It provides the circuit diagrams and truth tables for each. The aim of the experiment was to construct half and full adder circuits using NAND gates and verify their truth tables.

Uploaded by

Shlôkä Jõshï
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
5K views

Assignment2 Half and Full Adder

The document describes half adders and full adders. A half adder adds two binary digits and produces a sum and carry output. A full adder adds three binary digits and produces a sum and carry output. It provides the circuit diagrams and truth tables for each. The aim of the experiment was to construct half and full adder circuits using NAND gates and verify their truth tables.

Uploaded by

Shlôkä Jõshï
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 10

HALF ADDER

&
FULL ADDER

Performed by: Ayush Rana


Roll No: 2030203
Lab Group: G2
Submitted to: Dr. Prachi Yadav
CONTENTS

AIM: 03

APPARATUS: 03

PLATFORM USED: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 03

THEORY:

DEFINITION OF ADDER: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 03

3.1: HALF ADDER: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 04

3.1.1: INTRODUCTION: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 04

3.1.2: CIRCUIT DIAGRAM: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 05

3.2: FULL ADDER: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .06

3.2.1: INTRODUCTION : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 06

3.2.2: CIRCUIT DIAGRAM: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 07

TRUTH TABLE:

HALF ADDER: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 08

FULL ADDER: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 09

RESULT: 10
AIM:
To construct Half and Full Adder circuits using two- i/p
NAND Gates (IC- 7400), and verify their truth tables.

APPARATUS:
1. IC-7400(4 two- i/p NAND Gates)
2. Breadboard
3. 5V supply
4. Connecting wires.

PLATFORM USED:
• Application: Logisim- win-2.7.1
• Operating System: Windows 10

THEORY:

DEFINITION OF AN ADDER
An adder is a digital logic circuit in electronics that
implements addition of numbers. In many computers
and other types of processors, adders are used to calculate
addresses, similar operations and table indices in the ALU
and also in other parts of the processors. These can be built or
many numerical representations like excess-3 or binary coded
decimal.
1. HALF ADDER:
The half adder accepts two binary digits on its inputs and
produce two binary digits outputs a sum bit and a carry bit.

SUM = A’B + AB’


SUM = A B
CARRY = A B
CIRCUIT DIAGRAM:
2. FULL ADDER:
The full adder accepts three binary digits on its inputs and
produce two binary digits outputs a sum bit and a carry bit.

SUM = A′B′C + A′BC′ + AB′C′ + ABC


= A′ (B′C+BC′) + A(B′C′+BC)
= A′ (B C) + A (B C)′
= A’P +AP’

let B C = P

= A P

= A B C

CARRY = A’BC + AB’C + ABC’ + ABC

= C(A’B+AB’) + AB(C’+C)

= C(A B) + AB
CIRCUIT DIAGRAM:
TRUTH TABLE:

1. HALF ADDER:

INPUTS OUTPUTS

A B SUM CARRY

0 0 0 0

o 1 1 0

1 0 1 0

1 1 0 1
1. FULL ADDER:

INPUT OUTPUT

A B C SUM CARRY

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1
RESULT:

• In both of the diagram Green color represent that it


propagate and black color indicates that the gate
works as a Generator.

• Half Adder is the combination of 2 input or function


and Full Adder is the combination of 3 bit odd function.

You might also like