TECHNICAL TRAINING REPORT

at

CETPA INFOTECH AND

PVT.LTD.
C-24, Sector 2, Near Nirula‟s Hotel, Noida-201301

Submitted in partial fulfillment of the requirement of the award

of degree in

BACHELOR OF TECHNOLOGY
(Electronics and Instrumentation Engineering)

from

Amrapali Institute of Technology and Sciences, Haldwani

(Affiliated to Uttarakhand Technical University, Dehradun)

Submitted to: Submitted by:

(Signature) (Signature)
Mr. pramod morya Deepak Chand
Seminar Incharge Department of EIE
Department of EIE Roll No.:10030106008

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 ACKNOWLEDGEMENT

Many lives and destinies are destroyed due to the lack of proper guidance,
direction and opportunity. It is in this respect I feel that I am in a much better
position today due to continuous process of motivation and focus provided by
the CETPA team during my 6 weeks training here at CETPA INFOTECH
PVT.LTD.

The process of completion of this training project was a tedious job and required
careful guidance at all stages. I would like to extend my special thanks and heart-
felt gratitude to Mr. Raj Kumar Goyal for supervising. The supervision and
support that he gave truly helped the progression and smoothness of the
summer training program. The co-operation is much indeed appreciated. It is
also my duty to extend my sincere thanks to the highly experienced central
planning team comprising of Miss Ruchi , Mr. Vikas Kalra for helping me and
providing proper guidance. A big contribution and hard work from them during
the six week is very great indeed. All projects during the program would be
nothing without the enthusiasm and support from all of them. Besides, this
summer training program makes me realized the value of working together as a
team and as a new experience in working environment, which challenges us
every minute. I take great pleasure in presenting this work, which was assigned
to me during my industrial training.

Last but not the least, I am also highly thankful to Mr. Mudit Gupta
(Seminar Incharge), Mrs. Pramod Kr Morya (Head of Department, Electronics
and Instrumentation) for providing me the opportunity to complete the training
project.

DEEPAK CHAND
B.Tech 4th year (EIE)

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3
 Table of Contents

1. INTRODUCTION TO EMBEDDED SYSTEM

1.1 Reprogramming system……………………………………………………….06
1.2 Embedded system……………………………………………………………..07
1.3 Learning to embedded system………………………………………………...07
1.4 Difference between microprocessor and micro-controller……………………07

2. 8051 MICROCONTROLLER ARCHITECTURE

2.1 AT89C51……………………………………………………………………..08
2.2 Pin configuration……………………………………………………………...08
2.3 pin description………………………………………………………………...09

3. PROGRAMMING THE AT89C51

3.1 Features………………………………………………………………………12
3.2 Description…………………………………………………………………...12
3.3 Pin diagram…………………………………………………………………..13
3.4 Special function register……………………………………………………..13
3.5 Data memory………………………………………………………………...14
3.6 Timer 2 Registers…………………………………………………………....14
3.7 Interrupt register…………………………………………………………......14

4. PROGRAM STATUS WORD

4.1 The Instruction set…………………………………………………………...16
4.2 Program status word…………………………………………………………16
4.3 Addressing mode…………………………………………………………….17

5. 8051 INSTRUCTION SET

6. INTERFACING 16*2 LCD WITH 8051

6.1 16*2 LCD module…………………………………………………………….21
6.2 16*2 LCD module commands………………………………………………...23
6.3 Lcd initialization……………………………………………………………....23
6.4 Sending data to LCD………………………………………………………….23
6.5 circuit Diagram……………………………………………………………......24
6.3 program……………………………………………………………………......26

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7. INTERFACING SEVEN SEGMENT
7.1 Display to 8051……………………………………………………………….27
7.2 Digit drive pattern…………………………………………………………….27
7.3 Program…………………………………………………………………….....30

8. INTERFACING DC MOTOR WITH 8051

8.1 L293 motor driver……………………………………………………………..31
8.2 Bi-directional DC motor using 8051………………………………………….32
8.3 Program……………………………………………………………………….33

9. INTERFACING HEX KEYPAD WITH 8051

9.1 Hex keypad……………………………………………………………………34
9.2 Interfacing hex keypad………………………………………………………..35
9.3 Program……………………………………………………………………….36

10 CONCLUSION……………………………………………………………….40

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 Introduction To Embedded system

In the daily life we use lots of electronics devices like Calculators, Computers, Automatic
Washing Machines, and Mobile phones etc. The common things in all these devices is that they
all contain Microprocessor (Brain in the Electronic System). So they all are Microprocessor
Based system. Actually Microprocessor based system are divided into two categories:

Microprocessor
based system

Embedded
Reprogrammable
System

1.1 Reprogrammable System

These are the general purpose systems. We can run programs of different type of
language program like C, C++, Java, visual Basic etc. Even we can listen the music, watching
the movies, surfing internet, sending mails etc. That is, these systems can be reprogrammed from
the user‟s side of view and they are general purpose type. Example of the systems are Personal
Computers, Laptops, and Workstations etc.

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1.2 Embedded Systems

These are not general purpose systems but these systems are specially designed
for specific applications .The Examples of Embedded System are Robots, Calculator, Digital
Weighing Machines, PCO Machine, Metro Rails without Drives etc. In such a way we can say
that Embedded system are microprocessor based electronic system which are designed for the
specific task only

1.3 Learning Embedded System

The study of Embedded system means we want to get the knowledge so that we
can design the electronic system in such a way that it will increase intelligence in the system. We
would able to think Programming of the system in assembly and can burn Flash Memories.

So we have to select the microprocessor for which we have to study. Actually

we have to work on microcontroller, its assembly language and interfacing of different input
output devices.

1.4 Difference between Microprocessor and Microcontroller:-

Microprocessor Microcontroller

1) CPU is stand-alone, RAM, 1) CPU, RAM, ROM, I/O and

ROM, I/O, timer are separate timer are all on a single chip
2) Designer can decide on the 2) fix amount of on-chip ROM,
amount of ROM, RAM and I/O RAM, I/O ports
ports. 3) for applications in which cost,
3) expansive power and space are critical
4) versatility 4) single-purpose
5) general-purpose

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 8051 Microcontroller Architecture

2.1 AT89C51

The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K

Bytes of Flash programmable and erasable read only memory (PEROM). The device
Is manufactured using Atmel‟s high-density nonvolatile memory technology and is
Compatible with the industry-standard MCS-51 instruction set and pin out. The on-chip
Flash allows the program memory to be reprogrammed in-system or by a conventional
Nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash
On a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides
A highly-flexible and cost-effective solution to many embedded control applications.

2.2 Pin Configuration

The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM,
32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture,
A full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is
designed with static logic for operation down to zero frequency and supports two software
selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM,
timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode
saves the RAM contents but freezes the oscillator disabling all other chip functions until the next
hardware reset.

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2.3 Pin Description

VCC

Supply voltage.

GND
Ground.

Port 0
Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight
TTL inputs. When is are written to port 0 pins, the pins can be used as high impedance inputs.
Port 0 may also be configured to be the multiplexed low order
Address/data bus during accesses to external program and data memory. In this mode P0 has
internal pull-ups. Port 0 also receives the code bytes during Flash programming,
and outputs the code bytes during program verification. External pull-ups are required during
program verification.

Port 1
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can
sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the
internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled
low will source current (IIL) because of the internal pull-ups. Port 1 also receives the low-order
address bytes during Flash programming and verification.

Port 2

Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can
sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the
internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled
low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address
byte during fetches from external program memory and during accesses to external data memory
that use 16-bit addresses (MOVX @ DPTR). In this application, it uses strong internal pull-ups
when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @
RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-
order address bits and some control signals during Flash programming and verification.

Port 3

Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can
sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the
internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled

9
low will source current (IIL) because of the pull-ups. Port 3 also serves the functions of various
special features of the AT89C51 as listed below: Port 3 also receives some control signals for
Flash programming and verification.

RST

Reset input. A high on this pin for two machine cycles while the oscillator is running resets the
device
.
ALE/PROG

Address Latch Enable output pulse for latching the low byte of the address during accesses to
external memory. This pin is also the program pulse input (PROG) during Flash programming.
In normal operation ALE is emitted at a constant rate of 1/6
The oscillator frequency, and may be used for external timing or clocking purposes. Note,
however, that one ALE

Pulse is skipped during each access to external Data Memory. If desired, ALE operation can be
disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a
MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable
bit has no effect if the microcontroller is in external execution mode.

PSEN

Program Store Enable is the read strobe to external program memory. When the AT89C51 is
executing code from external program memory, PSEN is activated twice each machine cycle,
except that two PSEN activations are skipped during each access to external data memory.

EA/VPP

External Access Enable. EA must be strapped to GND in order to enable the device to fetch code
from external program memory locations starting at 0000H up to FFFFH. Note, however, that if
lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC

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for internal program executions. This pin also receives the 12-volt programming enable voltage
(VPP) during Flash programming, for parts that require 12-volt VPP.

XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.

Oscillator Characters

XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can
be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or
ceramic resonator may be used. To drive the device from an external clock source, XTAL2
should be left unconnected while XTAL1 is driven as shown in Figure 2. There are no
requirements on the duty cycle of the external clock signal, since the input to the internal
clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high
and low time specifications must be observed.

Idle Mode
In idle mode, the CPU puts itself to sleep while all the on chip peripherals remain active. The
mode is invoked by software. The content of the on-chip RAM and all the special functions
registers remain unchanged during this mode. The idle mode can be terminated by any enabled
interrupt or by a hardware reset. It should be noted that when idle is terminated by a hard ware
reset, the device normally resumes program execution, from where it left off, up to two machine
cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to
internal RAM in this event, but access to the port pins is not inhibited. To eliminate the
possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction
following the one that invokes Idle should not be one that writes to a port pin or to external
Memory.

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 Programming the AT89C51

AT89C52:

3.1 Features
• Compatible with MCS-51™ Products
• 8K Bytes of In-System Reprogrammable Flash Memory
• Endurance: 1,000 Write/Erase Cycles
• Fully Static Operation: 0 Hz to 24 MHz
• Three-level Program Memory Lock
• 256 x 8-bit Internal RAM
• 32 Programmable I/O Lines
• Three 16-bit Timer/Counters
• Eight Interrupt Sources
• Programmable Serial Channel
• Low-power Idle and Power-down Modes

3.2 Description

The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8K bytes of

Flash programmable and erasable read only memory (PEROM). The device is manufactured
using Atmel‟s high-density nonvolatile memory technology and is compatible with the industry-
standard 80C51 and 80C52 instruction set and pin out. The on-chip Flash allows the program
memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer.
By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C52 is a

12
powerful microcomputer which provides a highly-flexible and cost-effective solution to many
embedded control applications.

3.3 Pin Diagram

The AT89C52 provides the following standard features

8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, three 16-bit timer/counters, a six-vector two-
level interrupt architecture, a full-duplex serial port, on-chip oscillator, and clock circuitry. In
addition, the AT89C52 is designed with static logic for operation down to zero frequency and
supports two software selectable power saving modes. The Idle Mode stops the CPU while
allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The
Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip
functions until the next hardware reset.

3.4 Special Function Registers

A map of the on-chip memory area called the Special Function Register (SFR) space. Note that
not all of the addresses are occupied, and unoccupied addresses may not be implemented on the
chip. Read accesses to these addresses will in general return random data, and write accesses will
have an indeterminate effect. User software should not write 1s to these unlisted locations, since
they may be used in future products to invoke.

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3.5 Data Memory
The AT89C52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel
address space to the Special Function Registers. That means the upper 128 bytes have the same
addresses as the SFR space but are physically separate from SFR space. When an instruction
accesses an internal location above address 7FH, the address mode used in the instruction
specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions
that use direct addressing access SFR space. New features. In that case, the reset or inactive
values of the new bits will always be 0.

3.6 Timer 2 Registers

Control and status bits are contained in registers T2CON and for Timer 2. The register pair
(RCAP2H, RCAP2L) are the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-
bit auto-reload mode.

3.7 Interrupt Registers

The individual interrupt enable bits are in the IE register. Two priorities can be set for each of the
six interrupt sources in the IP register‟s. Specifies whether the CPU accesses the upper 128 bytes
of RAM or the SFR space. Instructions that use direct addressing access SFR space. For
example, the following direct addressing instruction accesses the SFR at location 0A0H (which
is P2). Instructions that use indirect addressing access the upper 128 bytes of RAM. For example,
the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at
address 0A0H, rather than P2 (whose address is 0A0H).
MOV @R0, #data
Note that stack operations are examples of indirect addressing, so the upper 128 bytes of data
RAM are available as stack space.
Timer 0 and 1
Timer 0 and Timer 1 in the AT89C52 operate the same way as Timer 0 and Timer 1 in the
AT89C51.
Timer 2
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type
of operation is selected by bit C/T2 in the SFR T2CON. Timer 2 has three operating modes:
capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by
bits in T2CON. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the
TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator
periods, the count rate is 1/12 of the oscillator frequency.
In the Counter function, the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin, T2. In this function, the external input is sampled during S5P2
of every machine cycle. When the samples show a high in one cycle and a low in the next cycle,
the count is incremented. The new count value appears in the register during S3P1 of the cycle
following the one in which the transition was detected. Since two machine cycles (24 oscillator
periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the
oscillator frequency. To ensure that a given level is sampled at least once before it changes, the
level should be held for at least one full machine cycle.
Capture Mode
In the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2
is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit can then be

14
used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same operation, but a 1- to-0
transition at external input T2EX also causes the current value in TH2 and TL2 to be captured
into CAP2H and RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in
T2CON to be set. The EXF2 bit, like TF2, can generate an interrupt.
Auto-reload (Up or Down Counter)
Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload
mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR
T2MOD. Upon reset, the DCEN bit is set to 0 so that timer 2 will default to count up. When
DCEN is set, Timer 2 can count up or down, depending on the value of the T2EX pin.
Interrupts
The AT89C52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three
timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. Each of these interrupt sources
can be individually enabled or disabled by setting or clearing a bit in Special Function Register
IE. IE also contains a global disable bit, EA, which disables all interrupts at once. Note that bit
position IE.6 is unimplemented. In the AT89C51, bit position IE.5 is also unimplemented. User
software should not write 1s to these bit positions, since they may be used in future AT89
products. Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register
T2CON. Neither of these flags is cleared by hardware when the service routine is vectored to. In
fact, the service routine may have to determine whether it was TF2 or EXF2 that generated the
interrupt, and that bit will have to be cleared in software. The Timer 0 and Timer 1 flags, TF0
and TF1, are set at S5P2 of the cycle in which the timers overflow. The values are then polled by
the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the
same cycle in which the timer overflows.

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 Programming Status Word

4.1 The Instruction Set

All members of the Atmel microcontroller family execute the same instruction set. This
instruction set is optimized for 8- bit control applications and it provides a variety of fast
addressing modes for accessing the internal RAM to facilitate byte operations on small data
structures. The instruction set provides extensive support for 1-bit variables as a separate data
type, allowing direct bit manipulation in control and logic systems that require Boolean
processing. The following overview of the instruction set gives a brief description of how certain
instructions can be used.

4.2 Program Status Word

The Program Status Word (PSW) contains status bits that reflect the current state of the CPU.
The PSW, shown in Figure 11, resides in SFR space. The PSW contains the Carry bit, the
Auxiliary Carry (for BCD operations), the two register bank select bits, the Overflow flag, a
Parity bit, and two user-definable status flags. The Carry bit, in addition to serving as a Carry bit
in arithmetic operations, also serves as the “Accumulator” for a number of Boolean operations.
The bits RS0 and RS1 select one of the four register banks shown in Figure 8. A number of
instructions refer to these RAM locations as R0 through R7. The status of the RS0 and RS1 bits
at execution time determines which of the four banks is selected. The Parity bit reflects the
number of 1s in the Accumulator: P=1 if the Accumulator contains an odd number of 1s, and
P=0 if the Accumulator contains an even number of 1s. Thus, the number of 1s in the
Accumulator plus P is always even. Two bits in the PSW are uncommitted and can be used as
general purpose status flags.

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4.3 Addressing Modes
The addressing modes in the Flash microcontroller instruction set are as follows.

Direct Addressing
In direct addressing, the operand is specified by an 8-bit address field in the instruction. Only
internal data RAM and SFRs can be directly addressed.

Indirect Addressing
In indirect addressing, the instruction specifies a register that contains the address of the operand.
Both internal and external RAM can be indirectly addressed. The address register for 8-bit
addresses can be either the Stack Pointer or R0 or R1 of the selected register bank. The address
register for 16-bit addresses can be only the 16-bit data pointer register, DPTR.

Register Instructions
The register banks, which contain registers R0 through R7, can be accessed by instructions
whose codes carry a 3- bit register specification. Instructions that access the registers this way
make efficient use of code, since this mode eliminates an address byte. When the instruction is
executed, one of the eight registers in the selected bank is accessed. One of four banks is selected
at execution time by the two bank select bits in the PSW.

Register-Specific Instructions
Some instructions are specific to a certain register. For example, some instructions always
operate on the Accumulator, so no address byte is needed to point to it. In these cases, the
opcode itself points to the correct register. Instructions that refer to the Accumulator as A
assemble as Accumulator-specific opcodes.

Indexed Addressing
Program memory can only be accessed via indexed addressing. This addressing mode is intended
for reading look-up tables in program memory. A 16-bit base register (either DPTR or the
Program Counter) points to the base of the table, and the Accumulator is set up with the table
entry number. The address of the table entry in program memory is formed by adding the
Accumulator data to the base pointer. Another type of indexed addressing is used in the “case
Jump” instruction. In this case the dust ination address of a jump instruction is computed as the
sum of the base pointer and the Accumulator data.

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 8051 INSTRUCTION SET
The instruction set is divided in to 5 categories. They are as follows:

1. Arithmetic instructions.
2. Logic instructions.
3. Data transfer instructions.
4. Boolean variable manipulation instruction.
5. Program and machine control instruction.

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19
20
 Interfacing 16×2 LCD with 8051

LCD display is an inevitable part in almost all embedded projects and this article is about
interfacing 16×2 LCD with 8051 microcontroller. Many guys find it hard to interface LCD
module with the 8051 but the fact is that if you learn it properly, it‟s a very easy job and by
knowing it you can easily design embedded projects like digital voltmeter / ammeter, digital
clock, home automation displays, status indicator display, digital code locks, digital
speedometer/ odometer, display for music players etc. etc. Thoroughly going through this article
will make you able to display any text (including the extended characters) on any part of the
16×2 display screen. In order to understand the interfacing first you have to know about the 16×2
LCD module.

6.1 16×2 LCD module

16×2 LCD module is a very common type of LCD module that is used in 8051 based embedded
projects. It consists of 16 rows and 2 columns of 5×7 or 5×8 LCD dot matrices. The module
were are talking about here is type number JHD162A which is a very popular one. It is available
in a 16 pin package with back light, contrast adjustment function and each dot matrix has 5×8 dot
resolution. The pin numbers, their name and corresponding functions are shown in the table
below.

Pin No: Name Function

1 VSS This pin must be connected to the ground
2 VCC Positive supply voltage pin (5V DC)
3 VEE Contrast adjustment
4 RS Register selection
5 R/W Read or write
6 E Enable
7 DB0 Data
8 DB1 Data
9 DB2 Data
10 DB3 Data
11 DB4 Data
12 DB5 Data
13 DB6 Data
14 DB7 Data
15 LED+ Back light LED+
16 LED- Back light LED-

VEE pin is meant for adjusting the contrast of the LCD display and the contrast can be adjusted
by varying the voltage at this pin. This is done by connecting one end of a POT to the Vcc (5V),

21
other end to the Ground and connecting the center terminal (wiper) of of the POT to the VEE
pin. See the circuit diagram for better understanding.

The JHD162A has two built in registers namely data register and command register. Data
register is for placing the data to be displayed, and the command register is to place the
commands. The 16×2 LCD module has a set of commands each meant for doing a particular job
with the display. We will discuss in detail about the commands later. High logic at the RS pin
will select the data register and Low logic at the RS pin will select the command register. If we
make the RS pin high and the put a data in the 8 bit data line (DB0 to DB7), the LCD module
will recognize it as a data to be displayed. If we make RS pin low and put a data on the data line,
the module will recognize it as a command.

R/W pin is meant for selecting between read and write modes. High level at this pin enables read
mode and low level at this pin enables write mode.

E pin is for enabling the module. A high to low transition at this pin will enable the module.

DB0 to DB7 are the data pins. The data to be displayed and the command instructions are placed
on these pins.

LED+ is the anode of the back light LED and this pin must be connected to Vcc through a
suitable series current limiting resistor. LED- is the cathode of the back light LED and this pin
must be connected to ground.

6.2 16×2 LCD module commands

16×2 LCD module has a set of preset command instructions. Each command will make the
module to do a particular task. The commonly used commands and their function are given in the
table below.

Command Function
0F LCD ON, Cursor ON, Cursor blinking
ON
01 Clear screen
2 Return home
4 Decrement cursor
06 Increment cursor
E Display ON ,Cursor ON
80 Force cursor to the beginning of 1st line
C0 Force cursor to the beginning of 2nd line
38 Use 2 lines and 5×7 matrix
83 Cursor line 1 position 3
3C Activate second line
0C3 Jump to second line, position3
OC1 Jump to second line, position1

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6.3 LCD initialization

The steps that has to be done for initializing the LCD display is given below and these steps are
common for almost all applications.

 Send 38H to the 8 bit data line for initialization

 Send 0FH for making LCD ON, cursor ON and cursor blinking ON.
 Send 06H for incrementing cursor position.
 Send 01H for clearing the display and return the cursor.

6.4Sending data to the LCD

The steps for sending data to the LCD module is given below. I have already said that the LCD
module has pins namely RS, R/W and E. It is the logic state of these pins that make the module
to determine whether a given data input is a command or data to be displayed.

 Make R/W low.

 Make RS=0 if data byte is a command and make RS=1 if the data byte is a data to be
displayed.
 Place data byte on the data register.
 Pulse E from high to low.
 Repeat above steps for sending another data.

23
6.5 Circuit diagram

Interfacing 16x2 LCD module to 8051

The circuit diagram given above shows how to interface a 16×2 LCD module with AT89S1
microcontroller. Capacitor C3, resistor R3 and push button switch S1 forms the reset circuitry.
Ceramic capacitors C1, C2 and crystal X1 is related to the clock circuitry which produces the
system clock frequency. P1.0 to P1.7 pins of the microcontroller is connected to the DB0 to DB7
pins of the module respectively and through this route the data goes to the LCD module. P3.3,
P3.4 and P3.5 are connected to the E, R/W, RS pins of the microcontroller and through this route
the control signals are transferred to the LCD module. Resistor R1 limits the current through the
back light LED and so do the back light intensity. POT R2 is used for adjusting the contrast of
the display.

24
6.6 Program

MOV A,#38H // Use 2 lines and 5x7 matrix

ACALL CMND
MOV A,#0FH // LCD ON, cursor ON, cursor blinking ON
ACALL CMND
MOV A,#01H //Clear screen
ACALL CMND
MOV A,#06H //Increment cursor
ACALL CMND
MOV A,#82H //Cursor line one , position 2
ACALL CMND
MOV A,#3CH //Activate second line
ACALL CMND
MOV A,#49D
ACALL DISP
MOV A,#54D
ACALL DISP
MOV A,#88D
ACALL DISP
MOV A,#50D
ACALL DISP
MOV A,#32D
ACALL DISP
MOV A,#76D
ACALL DISP
MOV A,#67D
ACALL DISP
MOV A,#68D
ACALL DISP

MOV A, #0C1H //Jump to second line, position 1

ACALL CMND

MOV A,#67D
ACALL DISP
MOV A,#73D
ACALL DISP
MOV A,#82D
ACALL DISP
MOV A,#67D
ACALL DISP
MOV A,#85D
ACALL DISP

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MOV A,#73D
ACALL DISP
MOV A,#84D
ACALL DISP
MOV A,#83D
ACALL DISP
MOV A,#84D
ACALL DISP
MOV A,#79D
ACALL DISP
MOV A,#68D
ACALL DISP
MOV A,#65D
ACALL DISP
MOV A,#89D
ACALL DISP

HERE: SJMP HERE

CMND: MOV P1, A

CLR P3.5
CLR P3.4
SETB P3.3
CLR P3.3
ACALL DELY
RET;

DISP: MOV P1, A

SETB P3.5
CLR P3.4
SETB P3.3
CLR P3.3
ACALL DELY
RET;

DELY: CLR P3.3

CLR P3.5
SETB P3.4
MOV P1, #0FFh
SETB P3.3
MOV A, P1
JB ACC.7, DELY

CLR P3.3
CLR P3.4
END

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 Interfacing seven segment display to 8051

This article is about how to interface a seven segment LED display to an 8051 microcontroller. 7
segment LED display is very popular and it can display digits from 0 to 9 and quite a few
characters like A, b, C., H, E, e, F, n, o,t,u,y, etc. Knowledge about how to interface a seven
segment display to a micro controller is very essential in designing embedded systems. A seven
segment display consists of seven LEDs arranged in the form of a squares ’8′ slightly inclined to
the right and a single LED as the dot character. Different characters can be displayed by
selectively glowing the required LED segments. Seven segment displays are of two types,
common cathode and common anode. In common cathode type , the cathode of all LEDs are
tied together to a single terminal which is usually labeled as „com„ and the anode of all LEDs
are left alone as individual pins labeled as a, b, c, d, e, f, g & h (or dot) . In common anode type,
the anode of all LEDs are tied together as a single terminal and cathodes are left alone as
individual pins. The pin out scheme and picture of a typical 7 segment LED display is shown in
the image below.

7 segment LED display

7.1 Digit drive pattern

Digit drive pattern of a seven segment LED display is simply the different logic combinations of
its terminals‘ a’ to ‘h„ in order to display different digits and characters. The common digit
drive patterns (0 to 9) of a seven segment display are shown in the table below.

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Digit A b C d e f g
0 1 1 1 1 1 1 0
1 0 1 1 0 0 0 0
2 1 1 0 1 1 0 1
3 1 1 1 1 0 0 1
4 0 1 1 0 0 1 1
5 1 0 1 1 0 1 1
6 1 0 1 1 1 1 1
7 1 1 1 0 0 0 0
8 1 1 1 1 1 1 1
9 1 1 1 1 0 1 1

Interfacing seven segment display to 8051

28
The circuit diagram shown above is of an AT89S51 microcontroller based 0 to 9 counter which
has a 7 segment LED display interfaced to it in order to display the count. This simple circuit
illustrates two things. How to setup simple 0 to 9 up counter using 8051 and more importantly
how to interface a seven segment LED display to 8051 in order to display a particular result. The
common cathode seven segment display D1 is connected to the Port 1 of the microcontroller
(AT89S51) as shown in the circuit diagram. R3 to R10 are current limiting resistors. S3 is the
reset switch and R2, C3 forms a denouncing circuitry. C1, C2 and X1 are related to the clock
circuit. The software part of the project has to do the following tasks.
1. Form a 0 to 9 counter with a predetermined delay (around 1/2 second here).
2. Convert the current count into digit drive pattern.
3. Put the current digit drive pattern into a port for displaying.
All the above said tasks are accomplished by the program given below.
.
Instruction MOVC A,@A+PC is the instruction that produces the required digit drive pattern for
the display. Execution of this instruction will add the value in the accumulator A with the content
of the program counter (address of the next instruction) and will move the data present in the
resultant address to A. After this the program resumes from the line after MOVC A,@A+PC.
In the program, initial value in A is 00001001B. Execution of MOVC A,@A+PC will add
oooo1001B to the content in PC (address of next instruction). The result will be the address of
command DB 3FH (line15) and the data present in this address ie 3FH (digit drive pattern for 0)
gets moved into the accumulator. Moving this pattern in the accumulator to Port 1 will display 0
which is the first count.
At the next count, value in A will advance to 00001010 and after the execution of MOVC
A,@+PC ,the value in A will be 06H which is the digit drive pattern for 1 and this will display 1
which is the next count and this cycle gets repeated for subsequent counts.
The reason why accumulator is loaded with 00001001B (9 in decimal) initially is that the
instructions from line 9 to line 15 consumes 9 bytes in total.
The lines 15 to 24 in the program which starts with command DB can be called as a Look up
Table (LUT). Command DB is known as Define Byte – which defines a byte. This table defines
the digit drive patterns for 7 segment display as bytes (in hex format). MOVC operator fetches
the byte from this table based on the result of adding PC and contents in the accumulator.
Register B is used as a temporary storage of the initial value of the accumulator and the
subsequent increments made to accumulator to fetch each digit drive pattern one by one from the
look up table (LUT).

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7.2 Program

Org 0000h
back: jnb p1.0,seg0
jnb p1.1,seg1
jnb p1.2,seg2
jnb p1.3,seg3
jnb p1.4,seg4
jnb p1.5,seg5
jnb p1.6,seg6
jnb p1.7,seg7
sjmp back
seg0: mov p2,#0c0h
sjmp back
seg1: mov p2,#0F9h
sjmp back
seg2: mov p2,#0A4h
sjmp back
seg3: mov p2,#0B0h
sjmp back
seg4: mov p2,#099h
sjmp back
seg5: mov p2,#092h
sjmp back
seg6: mov p2,#082h
sjmp back
seg7: mov p2,#0F8h
sjmp back
ret

30
 Interfacing DC motor to 8051

This article shows how to interface a DC motor to an 8051 microcontroller. Interfacing DC

motor to 8051 forms an essential part in designing embedded robotic projects. A well designed
8051-DC motor system has essentially two parts. Firstly an 8051 with the required software to
control the motor and secondly a suitable driver circuit. Most of the DC motors have power
requirements well out of the reach of a microcontroller and more over the voltage spikes
produced while reversing the direction of rotation could easily damage the microcontroller. So it
is not wise to connect a DC motor directly to the microcontroller. The perfect solution is to use a
motor driver circuit in between the microcontroller and the DC motor.

8.1 L293 motor driver

L293 is a dedicated quadruple Half H Bridge motor driver IC available in 16 pin package. To
know more about H Bridge, check this link. H bridge motor driver circuit. L293 has a current
capacity of 600mA/channel and has supply voltage range from 4.5 to 36V DC. They are fitted
with internal high speed clamp diodes for inductive spike protection. Other good features of
L293 are high noise immunity, internal ESD protection, thermal shutdown, separate input supply
for each channel etc. The pin out and truth table of an L293 motor driver is shown in the figure
below.

L293 pinout and function diagram

31
8.2 Bi directional DC motor using 8051.
This project describes a bidirectional DC motor that changes its direction automatically after a
preset amount of time (around 1S). AT89S51 is the microcontroller used here and L293 forms
the motor driver. Circuit diagram is shown below.

Bi directional DC motor using 8051

In the circuit components R1, S1 and C3 forms a denouncing reset circuitry. C1, C2 and X1 are
related to the oscillator. Port pins P1.0 and P1.1 are connected to the corresponding input pins of
the L293 motor driver. The motor is connected across output pins 3 and 6 of the L293. The
software is so written that the logic combinations of P1.0 and P1.1 controls the direction of the
motor. Initially when power is switched ON, P1.0 will be high and P1.1 will be low. This
condition is maintained for a preset amount of time (around 1S) and for this time the motor will
be running in the clockwise direction (refer the function table of L293). Then the logic of P1.0
and P1.1 are swapped and this condition is also maintained for the same duration. This makes the

32
motor to run in the anti-clockwise direction for the same duration and the entire cycle is
repeated.

8.3 Program
ORG 00H // initial starting address

MAIN: MOV P1,#00000001B // motor runs clockwise

ACALL DELAY // calls the 1S DELAY

MOV P1,#00000010B // motor runs anti clockwise

ACALL DELAY // calls the 1S DELAY

SJMP MAIN // jumps to label MAIN for repaeting the cycle

DELAY: MOV R4, #0FH

WAIT1: MOV R3, #00H

WAIT2: MOV R2, #00H

WAIT3: DJNZ R2, WAIT3

DJNZ R3, WAIT2

DJNZ R4,WAIT1

RET

END

33
 Interfacing hex keypad to 8051
This article is about interfacing a hex key pad to 8051 microcontroller. A clear knowledge on
interfacing hex key pad to 8051 is very essential while designing embedded system projects
which requires character or numeric input or both. For example projects like digital code lock,
numeric calculator etc. Before going to the interfacing in detail, let‟s have a look at the hex
keypad.

9.1 Hex keypad

Hex key pad is essentially a collection of 16 keys arranged in the form of a 4×4 matrix. Hex key
pad usually have keys representing numeric 0 to 9 and characters A to F. The simplified diagram
of a typical hex key pad is shown in the figure below.

Hex keypad

The hex keypad has 8 communication lines namely R1, R2, R3, R4, C1, C2, C3 and C4. R1 to
R4 represents the four rows and C1 to C4 represents the four columns. When a particular key is
pressed the corresponding row and column to which the terminals of the key are connected gets
shorted. For example if key 1 is pressed row R1 and column C1 gets shorted and so on. The
program identifies which key is pressed by a method known as column scanning. In this method
a particular row is kept low (other rows are kept high) and the columns are checked for low. If a
particular column is found low then that means that the key connected between that column and
the corresponding row (the row that is kept low) is been pressed. For example if row R1 is
initially kept low and column C1 is found low during scanning, that means key 1 is pressed.

34
9.2 Interfacing hex keypad

The circuit diagram for demonstrating interfacing hex keypad to 8051 is shown below. Like
previous 8051 projects, AT89S51 is the microcontroller used here. The circuit will display the
character/numeric pressed on a seven segment LED display. The circuit is very simple and it
uses only two ports of the microcontroller, one for the hex keypad and the other for the seven
segment LED display.

Interfacing hex keypad to 8051

The hex keypad is interfaced to port 1 and seven segment LED display is interfaced to port 0 of
the microcontroller. Resistors R1 to R8 limits the current through the corresponding segments of
the LED display. Capacitors C1, C2 and crystal X1 completes the clock circuitry for the
microcontroller. Capacitor C3, resistor R9 and push button switch S1 forms a debouncing reset
mechanism.

35
9.3 Program

ORG 00H

MOV DPTR, #LUT // moves starting address of LUT to DPTR

MOV A, #11111111B // loads A with all 1's

MOV P0, #00000000B // initializes P0 as output port

BACK:MOV P1, #11111111B // loads P1 with all 1's

CLR P1.0 // makes row 1 low

JB P1.4, NEXT1 // checks whether column 1 is low and jumps to NEXT1 if not
low

MOV A, #0D // loads a with 0D if column is low (that means key 1 is

pressed)

ACALL DISPLAY // calls DISPLAY subroutine

NEXT1: JB P1.5, NEXT2 // checks whether column 2 is low and so on...

MOV A, #1D

ACALL DISPLAY

NEXT2: JB P1.6, NEXT3

MOV A, #2D

ACALL DISPLAY

NEXT3:JB P1.7,NEXT4

MOV A, #3D

ACALL DISPLAY

NEXT4: SETB P1.0

CLR P1.1

36
 JB P1.4, NEXT5

MOV A, #4D

ACALL DISPLAY

NEXT5:JB P1.5,NEXT6

MOV A, #5D

ACALL DISPLAY

NEXT6:JB P1.6,NEXT7

MOV A,#6D

ACALL DISPLAY

NEXT7: JB P1.7, NEXT8

MOV A,#7D

ACALL DISPLAY

NEXT8: SETB P1.1

CLR P1.2

JB P1.4,NEXT9

MOV A,#8D

ACALL DISPLAY

NEXT9:JB P1.5, NEXT10

MOV A,#9D

ACALL DISPLAY

NEXT10:JB P1.6,NEXT11

MOV A,#10D

ACALL DISPLAY

37
NEXT11: JB P1.7, NEXT12

MOV A,#11D

ACALL DISPLAY

NEXT12: SETB P1.2

CLR P1.3

JB P1.4, NEXT13

MOV A,#12D

ACALL DISPLAY

NEXT13: JB P1.5, NEXT14

MOV A, #13D

ACALL DISPLAY

NEXT14: JB P1.6, NEXT15

MOV A, #14D

ACALL DISPLAY

NEXT15: JB P1.7, BACK

MOV A, #15D

ACALL DISPLAY

LJMP BACK

DISPLAY: MOVC A,@A+DPTR // gets digit drive pattern for the current key from LUT

MOV P0, A // puts corresponding digit drive pattern into P0

RET

38
LUT: DB 01100000B // Look up table starts here

DB 11011010B

DB 11110010B

DB 11101110B

DB 01100110B

DB 10110110B

DB 10111110B

DB 00111110B

DB 11100000B

DB 11111110B

DB 11110110B

DB 10011100B

DB 10011110B

DB 11111100B

DB 10001110B

DB 01111010B

END

Firstly the program initializes port 0 as an output port by writing all 0′s to it and port 1 as an
input port by writing all 1′s to it. Then the program makes row 1 low by clearing P1.0 and scans
the columns one by one for low using JB instruction. If column C1 is found low, that means 1 is
pressed and accumulator is loaded by zero and DISPLAY subroutine is called. The display
subroutine adds the content in A with the starting address of LUT stored in DPTR and loads A
with the data to which the resultant address points (using instruction MOVC A, @A+DPTR).
The present data in A will be the digit drive pattern for the current key press and this pattern is
put to Port 0 for display. This way the program scans for each key one by one and puts it on the
display if it is found to be pressed.

39
 CONCLUSION

The internal hardware configuration of 8051 register and control circuits have been examined at
the functional block diagram level the 8051 may be consider to be collection of RAM ,ROM, and
address registers that have some unique functions

Actually microprocessor is the subset and micro-controller is the super set. Micro-controller is
the complete on the single chip hence embedded system provide a medium through which we
can relate the micro-controller with the input and output devices

40