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Logic and Computer Design Fundamentals: Zahra Sadat Bahri Student No. 98110232 Homework 1 October 9, 2021

This document contains a homework assignment on logic and computer design fundamentals. It includes 7 problems involving proofs of logic expressions using identities like DeMorgan's laws, converting logic functions to different gates, and designing circuits for binary-coded decimal conversion. The key tasks involve simplifying logic expressions, building circuits from functions, and mapping decimal numbers to a binary-coded decimal format.

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Baran Bahri
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37 views9 pages

Logic and Computer Design Fundamentals: Zahra Sadat Bahri Student No. 98110232 Homework 1 October 9, 2021

This document contains a homework assignment on logic and computer design fundamentals. It includes 7 problems involving proofs of logic expressions using identities like DeMorgan's laws, converting logic functions to different gates, and designing circuits for binary-coded decimal conversion. The key tasks involve simplifying logic expressions, building circuits from functions, and mapping decimal numbers to a binary-coded decimal format.

Uploaded by

Baran Bahri
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Logic and Computer Design Fundamentals

Zahra Sadat Bahri


Student No. 98110232
Homework 1
October 9, 2021

Problem 1:
Proof. Since ∀x : x + x′ = 1 ∧ x.1 = x

A′ B ′ + A′ C ′ + B ′ C = A′ B ′ (C + C ′ ) + A′ C ′ + B ′ C =
A′ B ′ C + A′ B ′ C ′ + A′ C ′ + B ′ C = (A′ C ′ + A′ C ′ B ′ ) + (B ′ C + B ′ CA′ )

Now because X + XY = X the latter term will be simplified to

A′ C ′ + B ′ C

Problem 2:
Note that A′ + A′ B = A′
′ DeMorgan’s
AC + A′ B ′ C + (A′ B + C + A′ ) = AC + A′ B ′ C + (A′ + C)′ −−−−−−→ AC + A′ B ′ C + AC ′
X+X ′ Y =X+Y
= A(C + C ′ ) + A′ B ′ C = A + A′ B ′ C −−−−−−−−−→= A + B ′ C
Problem 3:
a)

f (A, B, C) = nor(xnor(B, C ′ ), and(nand(A, B), nor(A′ , C)))


Recall that xnor(X, Y ) = XY + X ′ Y ′ → xnor(B, C ′ ) = BC ′ + B ′ C Hence:

f (A, B, C) = BC ′ + B ′ C + (AB)(A′ + C)

b)
DeMorgan’s
A′ + C −−−−−−→ AC ′
DeMorgan’s dual
AB −−−−−−−−−→ A′ + B ′
f (A, B, C) = BC ′ + B ′ C + AC ′ (A′ + B ′ ) = BC ′ + B ′ C + AA′ C + AC ′ B ′

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B+B ′ A=B+A
= BC ′ + B ′ C + AC ′ B ′ = C ′ (B + B ′ A) + B ′ C −−−−−−−−→ C ′ (B + A) + B ′ C
= (C ′ (B + A))(B ′ C) = (C + (A + B)′ )(B + C ′ ) = (C + A′ B ′ )(B + C ′ )
CB + A′ B ′ B + C ′ C + A′ B ′ C ′ = CB + A′ B ′ C ′

Problem 4:
a)

Cells with the same colour are added up together.

⇒ A′ B ′ C ′ + A′ BD′ + ABC + AC ′ D

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b)

Cells with the same colour are added up together.


⇒ BCD′ + BC ′ DE + B ′ DE
However considering DE(B ′ + BC ′ ) = DE(B ′ + C ′ ) = DEB ′ + DC ′ E then the function
is:
⇒ BCD′ + C ′ DE + B ′ DE

Problem 5: first we list all the conversions of NOT,AND,OR to NOR,NAND:


NOT with NAND: XX = X
AND with NAND: XY = XY

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OR with NAND: X Y = X + Y
NOT with NOR: X = X + X
AND with NOR: XY = X + Y
OR with NOR: X + Y = X + Y

XOR with NAND:

X ⊕ Y = XY ′ + X ′ Y = ((XY ′ )′ (X ′ Y )′ )′ = Nand(Nand(X, Y ′ ), Nand(X ′ , Y ))

= Nand(Nand(X, Nand(Y, Y )), Nand(Nand(X, X), Y ))

XOR with NOR:

X ⊕ Y = XY ′ + X ′ Y = XY ′ + X ′ Y = X ′ + Y + X + Y ′
= Nor(Nor(Nor(X ′ , Y ), Nor(X, Y ′ )), Nor(Nor(X ′ , Y ), Nor(X, Y ′ )))

XNOR with NAND:

X ⊕ Y = XY + X ′ Y ′ = ((XY )′ (X ′ Y ′ )′ )′ = Nand(Nand(X, Y ), Nand(X ′ , Y ′ ))

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= Nand(Nand(X, Y ), Nand(Nand(X, X), Nand(Y, Y )))

XNOR with NOR:

X ⊕ Y = XY + X ′ Y ′ = (XY + X ′ Y ′ = X ′ + Y ′ + X + Y

= Nor(Nor(Nor(X ′ , Y ′ ), Nor(X, Y )), Nor(Nor(X ′ , Y ′ ), Nor(X, Y )))

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Problem 6:
a)
A ⊕ B ⊕ C = (A ⊕ B) ⊕ C therefore:

b) The function is A ⊕ B ⊕ C = (A ⊕ B) ⊕ C so we could just reverse the result of


above circuit.

If we have constant 1 signal then NOT gate can be built by XOR like this:

c)
Assume we connect two inputs to one XNOR gate. then if even number of them are 1 ,
then output will be 1. Now if we connect this output and the third input to another XNOR
gate, the output will be 1 iff even number of 1’s enters the last gate. Now say we have even
number of ones. Two cases can happen:
1- single input is one therefore even number of ones enter the first XNOR , as a result even
number of one’s enter last gate and output is one.
2- single input is zero therefore odd number of ones enter the first XNOR which will give
zero. as a result even number of one’s enter last gate and output is one.

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d)
We may as well reverse the result of the latter circuit.

If we have constant 0 signal then NOT gate can be built by XNOR like this:

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Problem 7:
First we list the numbers in BCD format:

A B C D f (A, B, C, D) mi decimal number


0 0 0 0 1 m0 0
0 0 0 1 1 m1 1
0 0 1 0 1 m2 2
0 0 1 1 1 m3 3
0 1 0 0 0 m4 4
0 1 0 1 1 m5 5
0 1 1 0 0 m6 6
0 1 1 1 0 m7 7
1 0 0 0 1 m8 8
1 0 0 1 0 m9 9
1 0 1 0 × m10 10
1 0 1 1 × m11 11
1 1 0 0 × m12 12
1 1 0 1 × m13 13
1 1 1 0 × m14 14
1 1 1 1 × m15 15

∑
⇒ f (A, B, C, D) = (m0 , m1 , m2 , m3 , m5 , m8 ) + d(10, 11, 12, 13, 14, 15)
The map for the function is:

Cells with the same colour are added up together.

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⇒ A′ B ′ + BC ′ D + AD′

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