EG95 Series

Hardware Design

LTE Standard Module Series

Version: 1.8

Date: 2020-10-21

Status: Released

www.quectel.com
 LTE Standard Module Series
EG95 Series Hardware Design

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About the Document

Revision History

Version Date Author Description

Felix YIN/
1.0 2017-03-22 Yeoman CHEN/ Initial
Jackie WANG
1. Added band B28A.
2. Updated the description of UMTS and GSM
features in Table 2.
3. Updated the functional diagram in Figure 1.
4. Updated module operating frequencies in
Table 21.
5. Updated current consumption in Table 26.
Yeoman CHEN/
1.1 2018-01-04 6. Updated the conducted RF receiving
Rex WANG
sensitivity in Table 28.
7. Updated the GPRS multi-slot classes in
Table 33.
8. Added thermal consideration in Chapter 5.8
9. Added a GND pad in each of the four corners
of the module’s footprint in Chapter 6.2.
10. Added packaging information in Chapter 7.3.
1. Added the description of EG95-NA.
2. Updated the functional diagram in Figure 1.
3. Updated pin assignment in Figure 2.
4. Updated GNSS function in Table 1.
5. Updated GNSS Features in Table 2.
Felix YIN/
1.2 2018-03-14 6. Updated reference circuit of USB interface in
Rex WANG
Figure 21.
7. Added description of GNSS receiver in
Chapter 4.
8. Updated pin definition of RF antenna in Table
21.

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9. Updated module operating frequencies in

Table 22.
10. Added description of GNSS antenna
interface in Chapter 5.2.
11. Updated antenna requirements in Table 25.
12. Updated RF output power in Table 32.
1. Added variant EG95-EX and related
information.
2. Updated functional diagram in Figure 1.
3. Updated pin assignment (top view) in
Figure 2.
4. Updated pin description in Table 4.
5. Updated star structure of power supply in
Figure 8.
6. Updated the reference circuit of turning on
the module using PWRKEY in Figure 10.
7. Updated the power-on scenario in Figure 12.
8. Updated reference circuit of SPI interface
with peripherals in Figure 25.
9. Updated GNSS performance in Table 20.
10. Updated module operating frequencies in
Table 22.
11. Updated GNSS frequency in Table 24.
12. Updated antenna requirements in Table 25.
Ward WANG/
13. Updated EG95-NA current consumption in
1.3 2019-05-24 Nathan LIU/
Table 30.
Rex WANG
14. Adeed EG95-EX current consumption in
Table 31.
15. Updated EG95-E conducted RF receiving
sensitivity in Table 34.
16. Updated EG95-NA conducted RF receiving
sensitivity in Table 35.
17. Added EG95-EX conducted RF receiving
sensitivity in Table 36.Updated GNSS current
consumption of EG95 in Table 32.Updated
related documents in Table 38.Updated
reference circuit of PWRKEY interface in
Figure 10.
18. Updated description of (U)SIM in Chapter
3.9.
19. Updated description of UART in Chapter
3.11.
20. Added description of ADC interface in
Chapter 3.16.

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21. Added description of USB_BOOT interface in

Chapter 3.18.
22. Updated description of manufacturing and
soldering in Chapter 8.2.
1. Updated supported protocols (Table 2).
2. Updated timing of turning on module (Figure
12).
3. DFOTA is developed.
1.4 2019-07-05 Ward WANG
4. Updated description of USB_BOOT interface
and timing sequence for entering emergency
download mode (Chapter 3.18 and Figure
29).
1. Added ThreadX module EG95-NAX and
updated related contents (Table 1 and 4,
Chapter 2.2, 2.3, 3.2 and 5).
2. Updated module operating frequencies
(Table 25).
3. Updated antenna requirements (Table 28).
Fanny CHEN/
1.5 2019-08-09 4. Added current consumption of EG95-NAX
Rex WANG
(Table 35).
5. Updated RF output power (Table 37).
6. Updated EG95-NA conducted RF receiving
sensitivity (Table 39).
7. Added EG95-NAX conducted RF receiving
sensitivity (Table 41).
1. Removed related information of ThreadX OS.
2. Updated the supported USB serial drivers
(Table 2)
1.6 2019-11-07 Ward WANG 3. Updated the notes for GNSS performance
(Chapter 4.2).
4. Updated the AT command be used to disable
the receive diversity (Chapter 5.1.3).
1. Updated description of airplane mode
(Chapter 3.5.2).
2. Updated the functions of main UART
interface (Chapter 3.11).
3. Added the note about the standard that the
1.7 2020-04-15 Ward WANG package warpage level of the module
conforms to (Chapter 7.1).
4. Updated module storage information
(Chapter 8.1).
5. Updated module manufacturing and
soldering information (Chapter 8.2).

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1. Added EG95-AUX and related information

(Table 1, 37 and 45).
2. Added EG95-NAXD and related information
(Table 1, 36 and 44).
3. Updated the AT command for the operation
of ANT_MAIN and ANT_DIV (Chapter 5.1.3).
Power JIN/ 4. Added EG95-NA/-EX/-NAX/-NAXD/-AUX
1.8 2020-10-21
Frank WANG bottom dimensons (Figure 43).
5. Updated top view of the module (Figure 45).
6. Added EG95-NA/-EX/-NAX/-NAXD/-AUX
bottom view (Figure 47).
7. Added a note to clarify the precautions
if a conformal coating is necessary for the
module (Chapter 8.2).

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Contents

About the Document .................................................................................................................................. 3

Contents ...................................................................................................................................................... 7
Table Index .................................................................................................................................................. 9
Figure Index .............................................................................................................................................. 11

1 Introduction ....................................................................................................................................... 13
1.1. Safety Information................................................................................................................... 14

2 Product Concept ............................................................................................................................... 15

2.1. General Description ................................................................................................................ 15
2.2. Key Features .......................................................................................................................... 16
2.3. Functional Diagram ................................................................................................................ 19
2.4. Evaluation Board .................................................................................................................... 20

3 Application Interfaces ...................................................................................................................... 21

3.1. General Description ................................................................................................................ 21
3.2. Pin Assignment ....................................................................................................................... 22
3.3. Pin Description........................................................................................................................ 23
3.4. Operating Modes .................................................................................................................... 30
3.5. Power Saving.......................................................................................................................... 31
3.5.1. Sleep Mode ................................................................................................................... 31
3.5.2. Airplane Mode ............................................................................................................... 33
3.6. Power Supply.......................................................................................................................... 34
3.6.1. Power Supply Pins ........................................................................................................ 34
3.6.2. Decrease Voltage Drop ................................................................................................. 35
3.6.3. Reference Design for Power Supply ............................................................................. 36
3.6.4. Monitor the Power Supply ............................................................................................. 36
3.7. Power-on/off Scenarios .......................................................................................................... 37
3.7.1. Turn on Module Using the PWRKEY ............................................................................ 37
3.7.2. Turn off Module ............................................................................................................. 38
3.8. Reset the Module.................................................................................................................... 39
3.9. (U)SIM Interfaces.................................................................................................................... 41
3.10. USB Interface ......................................................................................................................... 44
3.11. UART Interfaces ..................................................................................................................... 45
3.12. PCM and I2C Interfaces ......................................................................................................... 48
3.13. SPI Interface ........................................................................................................................... 50
3.14. Network Status Indication ....................................................................................................... 51
3.15. STATUS .................................................................................................................................. 52
3.16. ADC Interface ......................................................................................................................... 53
3.17. Behaviors of RI ....................................................................................................................... 54
3.18. USB_BOOT Interface ............................................................................................................. 54

4 GNSS Receiver .................................................................................................................................. 57

4.1. General Description ................................................................................................................ 57

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4.2. GNSS Performance ................................................................................................................ 57

4.3. Layout Guidelines ................................................................................................................... 58

5 Antenna Interfaces............................................................................................................................ 59
5.1. Main/Rx-diversity Antenna Interfaces..................................................................................... 59
5.1.1. Pin Definition ................................................................................................................. 59
5.1.2. Operating Frequency .................................................................................................... 59
5.1.3. Reference Design of RF Antenna Interface .................................................................. 61
5.2. GNSS Antenna Interface ........................................................................................................ 61
5.3. Reference Design of RF Layout ............................................................................................. 62
5.4. Antenna Installation ................................................................................................................ 65
5.4.1. Antenna Requirement ................................................................................................... 65
5.4.2. Recommended RF Connector for Antenna Installation ................................................ 66

6 Electrical, Reliability and Radio Characteristics ........................................................................... 68

6.1. Absolute Maximum Ratings .................................................................................................... 68
6.2. Power Supply Ratings ............................................................................................................ 68
6.3. Operating and Storage Temperatures .................................................................................... 69
6.4. Current Consumption ............................................................................................................. 70
6.5. RF Output Power .................................................................................................................... 81
6.6. RF Receiving Sensitivity ......................................................................................................... 81
6.7. Electrostatic Discharge ........................................................................................................... 85
6.8. Thermal Consideration ........................................................................................................... 85

7 Mechanical Dimensions ................................................................................................................... 88

7.1. Mechanical Dimensions of the Module................................................................................... 88
7.2. Recommended Footprint ........................................................................................................ 91
7.3. Top and Bottom Views of the Module ..................................................................................... 92

8 Storage, Manufacturing and Packaging ......................................................................................... 94

8.1. Storage ................................................................................................................................... 94
8.2. Manufacturing and Soldering ................................................................................................. 95
8.3. Packaging ............................................................................................................................... 96

9 Appendix A References.................................................................................................................... 99
10 Appendix B GPRS Coding Schemes ............................................................................................ 103
11 Appendix C GPRS Multi-slot Classes ........................................................................................... 104
12 Appendix D EDGE Modulation and Coding Schemes ................................................................ 106

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Table Index

Table 1: Frequency Bands of EG95 Series Module ................................................................................... 15

Table 2: Key Features of EG95 Module ..................................................................................................... 16
Table 3: IO Parameters Definition .............................................................................................................. 23
Table 4: Pin Description ............................................................................................................................. 23
Table 5: Overview of Operating Modes ...................................................................................................... 30
Table 6: Pin Definition of VBAT and GND Pins .......................................................................................... 34
Table 7: Pin Definition of PWRKEY............................................................................................................ 37
Table 8: Pin Definition of RESET_N........................................................................................................... 40
Table 9: Pin Definition of (U)SIM Interfaces ............................................................................................... 41
Table 10: Pin Definition of USB Interface ................................................................................................... 44
Table 11: Pin Definition of Main UART Interfaces ...................................................................................... 45
Table 12: Pin Definition of Debug UART Interface..................................................................................... 46
Table 13: Logic Levels of Digital I/O........................................................................................................... 46
Table 14: Pin Definition of PCM and I2C Interfaces .................................................................................. 49
Table 15: Pin Definition of SPI Interface .................................................................................................... 50
Table 16: Pin Definition of Network Status Indicator .................................................................................. 51
Table 17: Working State of Network Status Indicator ................................................................................ 51
Table 18: Pin Definition of STATUS............................................................................................................ 52
Table 19: Pin Definition of ADC Interface ................................................................................................... 53
Table 20: Characteristics of ADC Interface ................................................................................................ 53
Table 21: Default Behaviors of RI .............................................................................................................. 54
Table 22: Pin Definition of USB_BOOT Interface ...................................................................................... 55
Table 23: GNSS Performance .................................................................................................................... 57
Table 24: Pin Definition of RF Antennas .................................................................................................... 59
Table 25: Module Operating Frequencies .................................................................................................. 59
Table 26: Pin Definition of GNSS Antenna Interface ................................................................................. 61
Table 27: GNSS Frequency ....................................................................................................................... 62
Table 28: Antenna Requirements ............................................................................................................... 65
Table 29: Absolute Maximum Ratings ........................................................................................................ 68
Table 30: Power Supply Ratings ................................................................................................................ 68
Table 31: Operating and Storage Temperatures ........................................................................................ 69
Table 32: EG95-E Current Consumption ................................................................................................... 70
Table 33: EG95-NA Current Consumption ................................................................................................. 72
Table 34: EG95-EX Current Consumption ................................................................................................. 73
Table 35: EG95-NAX Current Consumption .............................................................................................. 75
Table 36: EG95-NAXD Current Consumption............................................................................................ 76
Table 37: EG95-AUX Current Consumption .............................................................................................. 77
Table 38: GNSS Current Consumption of EG95 Series Module ............................................................... 80
Table 39: RF Output Power ........................................................................................................................ 81
Table 40: EG95-E Conducted RF Receiving Sensitivity ............................................................................ 81
Table 41: EG95-NA Conducted RF Receiving Sensitivity.......................................................................... 82
Table 42: EG95-EX Conducted RF Receiving Sensitivity.......................................................................... 82

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Table 43: EG95-NAX Conducted RF Receiving Sensitivity ....................................................................... 83

Table 44: EG95-NAXD Conducted RF Receiving Sensitivity .................................................................... 83
Table 45: EG95-AUX Conducted RF Receiving Sensitivity ....................................................................... 84
Table 46: Electrostatic Discharge Characteristics (25 ºC, 45 % Relative Humidity) ................................. 85
Table 47: Recommended Thermal Profile Parameters .............................................................................. 96
Table 48: Related Documents .................................................................................................................... 99
Table 49: Terms and Abbreviations ............................................................................................................ 99
Table 50: Description of Different Coding Schemes ................................................................................ 103
Table 51: GPRS Multi-slot Classes .......................................................................................................... 104
Table 52: EDGE Modulation and Coding Schemes ................................................................................. 106

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Figure Index

Figure 1: Functional Diagram ..................................................................................................................... 19

Figure 2: Pin Assignment (Top View) ......................................................................................................... 22
Figure 3: Sleep Mode Application via UART .............................................................................................. 31
Figure 4: Sleep Mode Application with USB Remote Wakeup .................................................................. 32
Figure 5: Sleep Mode Application with RI .................................................................................................. 32
Figure 6: Sleep Mode Application without Suspend Function ................................................................... 33
Figure 7: Power Supply Limits during Burst Transmission ........................................................................ 35
Figure 8: Star Structure of Power Supply .................................................................................................. 35
Figure 9: Reference Circuit of Power Supply............................................................................................. 36
Figure 10: Turn on the Module by Using Driving Circuit ............................................................................ 37
Figure 11: Turn on the Module by Using Keystroke ................................................................................... 37
Figure 12: Timing of Turning on Module .................................................................................................... 38
Figure 13: Timing of Turning off Module .................................................................................................... 39
Figure 14: Reference Circuit of RESET_N by Using Driving Circuit ......................................................... 40
Figure 15: Reference Circuit of RESET_N by Using Button...................................................................... 40
Figure 16: Timing of Resetting Module ...................................................................................................... 41
Figure 17: Reference Circuit of (U)SIM Interface with an 8-pin (U)SIM Card Connector ......................... 42
Figure 18: Reference Circuit of (U)SIM Interface with a 6-pin (U)SIM Card Connector ........................... 43
Figure 19: Reference Circuit of USB Interface .......................................................................................... 44
Figure 20: Reference Circuit with Translator Chip ..................................................................................... 47
Figure 21: Reference Circuit with Transistor Circuit .................................................................................. 47
Figure 22: Primary Mode Timing ................................................................................................................ 48
Figure 23: Auxiliary Mode Timing ............................................................................................................... 49
Figure 24: Reference Circuit of PCM and I2C Application with Audio Codec ........................................... 50
Figure 25: Reference Circuit of SPI Interface with Peripherals ................................................................. 51
Figure 26: Reference Circuit of Network Status Indicator ......................................................................... 52
Figure 27: Reference Circuit of STATUS ................................................................................................... 53
Figure 28: Reference Circuit of USB_BOOT Interface .............................................................................. 55
Figure 29: Timing Sequence for Entering Emergency Download Mode.................................................... 55
Figure 30: Reference Circuit of RF Antenna Interface ............................................................................... 61
Figure 31: Reference Circuit of GNSS Antenna ........................................................................................ 62
Figure 32: Microstrip Design on a 2-layer PCB ......................................................................................... 63
Figure 33: Coplanar Waveguide Design on a 2-layer PCB ....................................................................... 63
Figure 34: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) .................... 63
Figure 35: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) .................... 64
Figure 36: Dimensions of the U.FL-R-SMT Connector (Unit: mm) ............................................................ 66
Figure 37: Mechanicals of U.FL-LP Connectors ........................................................................................ 66
Figure 38: Space Factor of Mated Connector (Unit: mm).......................................................................... 67
Figure 39: Referenced Heatsink Design (Heatsink at the Top of the Module) .......................................... 86
Figure 40: Referenced Heatsink Design (Heatsink at the Backside of Customers’ PCB)......................... 86
Figure 41: Module Top and Side Dimensions ............................................................................................ 88

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Figure 42: EG95-E Bottom Dimensions (Top View)................................................................................... 89

Figure 43: EG95-NA/-EX/-NAX/-NAXD/-AUX Bottom Dimensions (Top View) ............................................ 90
Figure 44: Recommended Footprint (Top View) ........................................................................................ 91
Figure 45: Top View of the Module............................................................................................................. 92
Figure 46: EG95-E Bottom View ................................................................................................................ 92
Figure 47: EG95-NA/-EX/-NAX/-NAXD/-AUX Bottom View ......................................................................... 93
Figure 48: Recommended Reflow Soldering Thermal Profile ................................................................... 95
Figure 49: Tape Specifications ................................................................................................................... 97
Figure 50: Reel Specifications ................................................................................................................... 97
Figure 51: Tape and Reel Directions .......................................................................................................... 98

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1 Introduction
This document defines EG95 series module, and describes its air interface and hardware interfaces which
are connected with your applications.

This document can help you quickly understand module interface specifications, electrical and mechanical
details as well as other related information of EG95 series module. To facilitate its application in different
fields, relevant reference design is also provided for your reference. With application note and user guide,
you can use EG95 series module to design and set up mobile applications easily.

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1.1. Safety Information

The following safety precautions must be observed during all phases of operation, such as usage, service
or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal
should notify users and operating personnel of the following safety information by incorporating these
guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers’ failure to
comply with these precautions.

Full attention must be paid to driving at all times in order to reduce the risk of an
accident. Using a mobile while driving (even with a handsfree kit) causes distraction
and can lead to an accident. Please comply with laws and regulations restricting the
use of wireless devices while driving.

Switch off the cellular terminal or mobile before boarding an aircraft. The operation
of wireless appliances in an aircraft is forbidden to prevent interference with
communication systems. If there is an Airplane Mode, it should be enabled prior to
boarding an aircraft. Please consult the airline staff for more restrictions on the use
of wireless devices on an aircraft.

Wireless devices may cause interference on sensitive medical equipment, so

please be aware of the restrictions on the use of wireless devices when in hospitals,
clinics or other healthcare facilities.

Cellular terminals or mobiles operating over radio signal and cellular network cannot
be guaranteed to connect in certain conditions, such as when the mobile bill is
unpaid or the (U)SIM card is invalid. When emergent help is needed in such
conditions, use emergency call if the device supports it. In order to make or receive
a call, the cellular terminal or mobile must be switched on in a service area with
adequate cellular signal strength. In an emergency, the device with emergency call
function cannot be used as the only contact method considering network connection
cannot be guaranteed under all circumstances.

The cellular terminal or mobile contains a transceiver. When it is ON, it receives

and transmits radio frequency signals. RF interference can occur if it is used close
to TV sets, radios, computers or other electric equipment.

In locations with explosive or potentially explosive atmospheres, obey all posted

signs and turn off wireless devices such as mobile phone or other cellular terminals.
Areas with explosive or potentially explosive atmospheres include fuelling areas,
below decks on boats, fuel or chemical transfer or storage facilities, and areas
where the air contains chemicals or particles such as grain, dust or metal powders.

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2 Product Concept

2.1. General Description

EG95 series module is an embedded 4G wireless communication module with receive diversity. It supports
LTE-FDD/WCDMA/GSM wireless communication, and provides data connectivity on LTE-FDD, DC-
HSDPA, HSPA+, HSDPA, HSUPA, WCDMA, EDGE and GPRS networks. It can also provide voice
functionality 1) to meet your specific application demands. EG95 series contains 6 variants: EG95-E,
EG95-NA, EG95-EX, EG95-NAX, EG95-NAXD and EG95-AUX.The following table shows the frequency
bands of EG95 series module.

Table 1: Frequency Bands of EG95 Series Module

LTE Bands WCDMA

Module GSM GNSS 2)
(with Rx-diversity) (with Rx-diversity)
FDD:
EG95-E B1/B8 900/1800 MHz Not supported
B1/B3/B7/B8/B20/B28A
GPS, GLONASS,
FDD:
EG95-NA B2/B4/B5 Not supported BeiDou, Galileo,
B2/B4/B5/B12/B13
QZSS
GPS, GLONASS,
FDD:
EG95-EX B1/B8 900/1800 MHz BeiDou, Galileo,
B1/B3/B7/B8/B20/B28
QZSS
FDD: GPS, GLONASS,
EG95-NAX B2/B4/B5/B12/B13/B25/ B2/B4/B5 Not supported BeiDou, Galileo,
B26 QZSS
FDD: GPS, GLONASS,
EG95-NAXD B2/B4/B5/B12/B13/B25/ B2/B4/B5 Not supported BeiDou, Galileo,
B26 QZSS
FDD: GPS, GLONASS,
850/900/1800/
EG95-AUX B1/B2/B3/B4/B5/B7/B8 B1/B2/B5/B8 BeiDou, Galileo,
1900 MHz
B28/B66 QZSS

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NOTES
1)
1. EG95 contains Telematics version and Data-only version. Telematics version supports voice
and data functions, while Data-only version only supports data function.
2)
2. GNSS function is optional.

With a compact profile of 29.0 mm × 25.0 mm × 2.3 mm, EG95 can meet almost all requirements for M2M
applications such as automotive, smart metering, tracking system, security, router, wireless POS, mobile
computing device, PDA phone, tablet PC, etc.

EG95 is an SMD type module which can be embedded into applications through its 106 LGA pads.

EG95 is integrated with internet service protocols like TCP, UDP and PPP. Extended AT commands have
been developed for you to use these internet service protocols easily.

2.2. Key Features

The following table describes the detailed features of EG95 series module.

Table 2: Key Features of EG95 Module

Features Description

 Supply voltage: 3.3–4.3 V

Power Supply
 Typical supply voltage: 3.8 V
 Class 4 (33 dBm ±2 dB) for GSM850
 Class 4 (33 dBm ±2 dB) for EGSM900
 Class 1 (30 dBm ±2 dB) for DCS1800
 Class 1 (30 dBm ±2 dB) for PCS1900
 Class E2 (27 dBm ±3 dB) for GSM850 8-PSK
Transmitting Power
 Class E2 (27 dBm ±3 dB) for EGSM900 8-PSK
 Class E2 (26 dBm ±3 dB) for DCS1800 8-PSK
 Class E2 (26 dBm ±3 dB) for PCS1900 8-PSK
 Class 3 (24 dBm +1/-3 dB) for WCDMA bands
 Class 3 (23 dBm ±2 dB) for LTE-FDD bands
 Support up to non-CA Cat 4 FDD
 Support 1.4/3/5/10/15/20 MHz RF bandwidth
LTE Features
 Support MIMO in DL direction
 FDD: Max. 150 Mbps (DL)/Max. 50 Mbps (UL)
 Support 3GPP R8 DC-HSDPA, HSPA+, HSDPA, HSUPA and WCDMA
UMTS Features
 Support QPSK, 16-QAM and 64-QAM modulation

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 DC-HSDPA: Max. 42 Mbps (DL)

 HSUPA: Max. 5.76 Mbps (UL)
 WCDMA: Max. 384 kbps (DL)/ Max. 384 kbps (UL)
 R99:
CSD: 9.6 kbps
 GPRS:
Support GPRS multi-slot class 33 (33 by default)
Coding scheme: CS-1, CS-2, CS-3 and CS-4
Max. 107 kbps (DL), Max. 85.6 kbps (UL)
GSM Features  EDGE:
Support EDGE multi-slot class 33 (33 by default)
Support GMSK and 8-PSK for different MCS (Modulation and Coding
Scheme)
Downlink coding schemes: MCS 1-9
Uplink coding schemes: MCS 1-9
Max. 296 kbps (DL)/Max. 236.8 kbps (UL)
 Support TCP/UDP/PPP/FTP/FTPS/HTTP/HTTPS/NTP/PING/QMI/
NITZ/SMTP/SSL/MQTT/CMUX/SMTPS/FILE/MMS protocols
Internet Protocol Features  Support PAP (Password Authentication Protocol) and CHAP
(Challenge Handshake Authentication Protocol) protocols which are
usually used for PPP connections
 Text and PDU modes
 Point-to-point MO and MT
SMS
 SMS cell broadcast
 SMS storage: ME by default

(U)SIM Interfaces  Support 1.8 V and 3.0 V (U)SIM cards

 Support one digital audio interface: PCM interface

 GSM: HR/FR/EFR/AMR/AMR-WB
Audio Features  WCDMA: AMR/AMR-WB
 LTE: AMR/AMR-WB
 Support echo cancellation and noise suppression
 Used for audio function with external codec
 Support 16-bit linear data format
PCM Interface  Support long frame synchronization and short frame synchronization
 Support master and slave modes, but must be the master in long frame
synchronization
 Compliant with USB 2.0 specification (slave only); the data transfer rate
can reach up to 480 Mbps
 Used for AT command communication, data transmission, GNSS
USB Interface NMEA sentences output, software debugging, firmware upgrade and
voice over USB
 Support USB serial drivers for: Windows 7/8/8.1/10, Linux 2.6–5.4,
Android 4.x/5.x/6.x/7.x/8.x/9.x, etc.

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 Main UART:
Used for AT command communication and data transmission
Baud rates reach up to 921600 bps, 115200 bps by default
UART Interface Support RTS and CTS hardware flow control
 Debug UART:
Used for Linux console and log output
115200 bps baud rate
 Provides a duplex, synchronous and serial communication link with the
peripheral devices.
SPI Interface
 Dedicated to one-to-one connection, without chip selection.
 1.8 V operation voltage with clock rates up to 50 MHz.

Rx-diversity  Support LTE/WCDMA Rx-diversity

 Gen8C Lite of Qualcomm

GNSS Features  Protocol: NMEA 0183
 Data update rate: 1 Hz by default
 Compliant with 3GPP TS 27.007, 27.005 and Quectel enhanced AT
AT Commands
commands

Network Indication  NETLIGHT pin for network activity status indication

 Including main antenna interface (ANT_MAIN), Rx-diversity antenna

Antenna Interfaces
(ANT_DIV) interface and GNSS antenna interface (ANT_GNSS) 1)
 Size: (29.0 ±0.15) mm × (25.0 ±0.15) mm × (2.3 ±0.2) mm
Physical Characteristics  Package: LGA
 Weight: approx. 3.8 g
 Operating temperature range: -35 °C to +75 °C 2)
Temperature Range  Extended temperature range: -40 °C to +85 °C 3)
 Storage temperature range: -40 °C to +90 °C

Firmware Upgrade  USB interface or DFOTA

RoHS  All hardware components are fully compliant with EU RoHS directive

NOTES
1) GNSS
1. antenna interface is only supported on EG95-NA/-EX/-NAX/-NAXD/-AUX.
2)
2. Within operating temperature range, the module is 3GPP compliant.
3) Within extended temperature range, the module remains the ability to establish and maintain a
3.
voice, SMS, data transmission, etc. There is no unrecoverable malfunction. There are also no
effects on radio spectrum and no harm to radio network. Only one or more parameters like Pout
might reduce in their value and exceed the specified tolerances. When the temperature returns to
normal operating temperature levels, the module will meet 3GPP specifications again.
4. “*” means under development.

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2.3. Functional Diagram

The following figure shows a block diagram of EG95 and illustrates the major functional parts.

 Power management
 Baseband
 DDR + NAND flash
 Radio frequency
 Peripheral interfaces

ANT_MAIN ANT_GNSS 1) ANT_DIV

PAM SAW Switch

Duplexer LNA
SAW
VBAT_RF
PA SAW
PRx DRx
GPS
Tx
NAND
Transceiver DDR2
SDRAM

IQ Control

VBAT_BB
PMIC
Control
PWRKEY

RESET_N
Baseband

STATUS

19.2M
NETLIGHT XO

VDD_EXT USB (U)SIM1 (U)SIM2 PCM I2C SPI UART GPIOs

Figure 1: Functional Diagram

NOTE
1) GNSS
antenna interface is only supported on EG95-NA/-EX/-NAX/-NAXD/-AUX.

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2.4. Evaluation Board

In order to help you develop applications with EG95, Quectel supplies an evaluation board (UMTS&LTE
EVB), USB data cable, earphone, antenna and other peripherals to control or test the module. For more
details, see document [1].

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3 Application Interfaces

3.1. General Description

EG95 series is equipped with 106 LGA pins that can be connected to cellular application platform. The
subsequent chapters will provide detailed descriptions of the following functions/interfaces.

 Power supply
 (U)SIM interfaces
 USB interface
 UART interfaces
 PCM and I2C interfaces
 SPI interface
 Status indication
 ADC interface
 USB_BOOT interface

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3.2. Pin Assignment

The following figure shows the pin assignment of EG95 series module.

ANT_DIV (EG95-NA/-EX/-NAX/-NAXD/-AUX)
RESERVED (Pin 56 on EG95-E)
ANT_MAIN

VBAT_RF

VBAT_RF
GND

GND

GND
GND

GND
GND
GND

NC
NC

103 106
55
62
61
60
59
58

54
53
52
51
50
56
57

ANT_GNSS (EG95-NA/-EX/-NAX/-NAXD/-AUX)
NC 1 49 ANT_DIV (EG95-E)
NC 2 48 GND
82 81 80 79
GND 3 47 USIM_GND

PCM_CLK 4 102 101 100 99 46 USIM1_CLK

PCM_SYNC 5 45 USIM1_DATA
63 83 USIM2_PRESENCE 98 78
PCM_DIN 6 44 USIM1_RST
PCM_DOUT 7 64 84 USIM2_CLK 97 77 43 USIM1_VDD

USB_VBUS 8 42 USIM1_PRESENCE

USB_DP 9 65 85 USIM2_RST 96 76 41 I2C_SDA

USB_DM 10 40 I2C_SCL
66 86 USIM2_DATA 95 75 USB_BOOT

NC 11 39 RI
67 87 USIM2_VDD 94 74
NC 12 38 DCD
NC 13 68 88 93 73 37 RTS

NC 14 36 CTS
1) 89 90 91 92
PWRKEY 15 35 TXD

NC 16 69 70 71 72
34 RXD
RESET_N 17 33 VBAT_BB
RESERVED 18 32 VBAT_BB
19
20
21
22
23
24

26
27
28
29
30
31
25

104 105
RESERVED
DBG_RXD

SPI_MOSI
DBG_TXD
NETLIGHT

SPI_MISO
SPI_CLK
ADC0

DTR
STATUS

GND
VDD_EXT
AP_READY

POWER USB UART (U)SIM PCM SPI ANT GND NC RESERVED OTHERS

Figure 2: Pin Assignment (Top View)

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NOTES
1)
1. PWRKEY output voltage is 0.8 V because of the diode drop in the Qualcomm chipset.
2. Keep all RESERVED pins and unused pins unconnected.
3. GND pads should be connected to ground in the design.
4. Please note that the definition of pin 49 and 56 are different among EG95-E and EG95-NA/-EX/-
NAX/-NAXD/-AUX. For more details, see Table 4.

3.3. Pin Description

The following tables show the pin definition of EG95 series module.

Table 3: IO Parameters Definition

Type Description

AI Analog Input

AO Analog Output

DI Digital Input

DO Digital Output

IO Bidirectional

OD Open Drain

PI Power Input

PO Power Output

Table 4: Pin Description

Power Supply

Pin Name Pin No. I/O Description DC Characteristics Comment

Power supply for Vmax = 4.3 V It must be provided with

VBAT_BB 32, 33 PI module’s Vmin = 3.3 V sufficient current up to
baseband part Vnorm = 3.8 V 0.8 A.
Power supply for Vmax = 4.3 V It must be provided with
VBAT_RF 52, 53 PI
module’s RF part Vmin = 3.3 V sufficient current up to

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Vnorm = 3.8 V 1.8 A in a burst

transmission.
Power supply for
Provide 1.8 V for Vnorm = 1.8 V external GPIO’s pull up
VDD_EXT 29 PO
external circuit IOmax = 50 mA circuits.
If unused, keep it open.
3, 31, 48,
50, 54, 55,
58, 59, 61,
GND 62, 67–74, Ground
79–82,
89–91,
100–106

Power-on/off

Pin Name Pin No. I/O Description DC Characteristics Comment

The output voltage is

Turn on/off the 0.8 V because of the
PWRKEY 15 DI VIH = 0.8 V
module diode drop in the
Qualcomm chipset.
Pull-up to 1.8 V
VIHmax = 2.1 V internally.
Reset signal of the
RESET_N 17 DI VIHmin = 1.3 V Active low.
module
VILmax = 0.5 V If unused, keep it
open.

Status Indication

Pin Name Pin No. I/O Description DC Characteristics Comment

Indicate the 1.8 V power domain.

VOHmin = 1.35 V
STATUS 20 DO module’s operation If unused, keep it
VOLmax = 0.45 V
status open.
Indicate the 1.8 V power domain.
VOHmin = 1.35 V
NETLIGHT 21 DO module’s network If unused, keep it
VOLmax = 0.45 V
activity status open.

USB Interface

Pin Name Pin No. I/O Description DC Characteristics Comment

Vmax = 5.25 V Typical: 5.0 V

USB connection
USB_VBUS 8 PI Vmin = 3.0 V If unused, keep it
detection
Vnorm = 5.0 V open.
USB differential USB 2.0 Compliant.
USB_DP 9 IO
data bus (+) Require differential

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impedance of 90 Ω.

USB 2.0 Compliant.

USB differential
USB_DM 10 IO Require differential
data bus (-)
impedance of 90 Ω.

(U)SIM Interfaces

Pin Name Pin No. I/O Description DC Characteristics Comment

Connect to ground of
Specified ground
USIM_GND 47 (U)SIM card
for (U)SIM card
connector.
IOmax = 50 mA

For 1.8 V (U)SIM:

Vmax = 1.9 V Either 1.8 V or 3.0 V
Power supply for
USIM1_VDD 43 PO Vmin = 1.7 V is supported by the
(U)SIM1 card
module automatically.
For 3.0 V (U)SIM:
Vmax = 3.05 V
Vmin = 2.7 V
For 1.8 V (U)SIM:
VILmax = 0.6 V
VIHmin = 1.2 V
VOLmax = 0.45 V
VOHmin = 1.35 V
Data signal of
USIM1_DATA 45 IO
(U)SIM1 card
For 3.0 V (U)SIM:
VILmax = 1.0 V
VIHmin = 1.95 V
VOLmax = 0.45 V
VOHmin = 2.55 V
For 1.8 V (U)SIM:
VOLmax = 0.45 V
VOHmin = 1.35 V
Clock signal of
USIM1_CLK 46 DO
(U)SIM1 card
For 3.0 V (U)SIM:
VOLmax = 0.45 V
VOHmin = 2.55 V
For 1.8 V (U)SIM:
VOLmax = 0.45 V
Reset signal of
USIM1_RST 44 DO VOHmin = 1.35 V
(U)SIM1 card

For 3.0 V (U)SIM:

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VOLmax = 0.45 V
VOHmin = 2.55 V
VILmin = -0.3 V
1.8 V power domain.
USIM1_ (U)SIM1 card VILmax = 0.6 V
42 DI If unused, keep it
PRESENCE insertion detection VIHmin = 1.2 V
open.
VIHmax = 2.0 V
For 1.8 V (U)SIM:
Vmax = 1.9 V
Vmin = 1.7 V
Either 1.8 V or 3.0 V
Power supply for
USIM2_VDD 87 PO is supported by the
(U)SIM2 card For 3.0 V (U)SIM:
module automatically.
Vmax = 3.05 V
Vmin = 2.7 V
IOmax = 50 mA
For 1.8 V (U)SIM:
VILmax = 0.6 V
VIHmin = 1.2 V
VOLmax = 0.45 V
VOHmin = 1.35 V
Data signal of
USIM2_DATA 86 IO
(U)SIM2 card
For 3.0 V (U)SIM:
VILmax = 1.0 V
VIHmin = 1.95 V
VOLmax = 0.45 V
VOHmin = 2.55 V
For 1.8 V (U)SIM:
VOLmax = 0.45 V
VOHmin = 1.35 V
Clock signal of
USIM2_CLK 84 DO
(U)SIM2 card
For 3.0 V (U)SIM:
VOLmax = 0.45 V
VOHmin = 2.55 V
For 1.8 V (U)SIM:
VOLmax = 0.45 V
VOHmin = 1.35 V
Reset signal of
USIM2_RST 85 DO
(U)SIM2 card
For 3.0 V (U)SIM:
VOLmax = 0.45 V
VOHmin = 2.55 V
VILmin = -0.3 V
1.8 V power domain.
USIM2_ (U)SIM2 card VILmax = 0.6 V
83 DI If unused, keep it
PRESENCE insertion detection VIHmin = 1.2 V
open.
VIHmax = 2.0 V

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Main UART Interface

Pin Name Pin No. I/O Description DC Characteristics Comment

1.8 V power domain.

VOLmax = 0.45 V
RI 39 DO Ring indicator If unused, keep it
VOHmin = 1.35 V
open.
1.8 V power domain.
Data carrier VOLmax = 0.45 V
DCD 38 DO If unused, keep it
detection VOHmin = 1.35 V
open.
1.8 V power domain.
VOLmax = 0.45 V
CTS 36 DO Clear to send If unused, keep it
VOHmin = 1.35 V
open.
VILmin = -0.3 V
1.8 V power domain.
VILmax = 0.6 V
RTS 37 DI Request to send If unused, keep it
VIHmin = 1.2 V
open.
VIHmax = 2.0 V
1.8 V power domain.
Data terminal VILmin = -0.3 V Pull-up by default.
ready. VILmax = 0.6 V Low level wakes up
DTR 30 DI
Sleep mode VIHmin = 1.2 V the module.
control. VIHmax = 2.0 V If unused, keep it
open.
1.8 V power domain.
VOLmax = 0.45 V
TXD 35 DO Transmit data If unused, keep it
VOHmin = 1.35 V
open.
VILmin = -0.3 V
1.8 V power domain.
VILmax = 0.6 V
RXD 34 DI Receive data If unused, keep it
VIHmin = 1.2 V
open.
VIHmax = 2.0 V

Debug UART Interface

Pin Name Pin No. I/O Description DC Characteristics Comment

1.8 V power domain.

VOLmax = 0.45 V
DBG_TXD 23 DO Transmit data If unused, keep it
VOHmin = 1.35 V
open.
VILmin = -0.3 V
1.8 V power domain.
VILmax = 0.6 V
DBG_RXD 22 DI Receive data If unused, keep it
VIHmin = 1.2 V
open.
VIHmax = 2.0V

PCM Interface

Pin Name Pin No. I/O Description DC Characteristics Comment

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VILmin = -0.3 V
1.8 V power domain.
VILmax = 0.6 V
PCM_DIN 6 DI PCM data input If unused, keep it
VIHmin = 1.2 V
open.
VIHmax = 2.0 V
1.8 V power domain.
VOLmax = 0.45 V
PCM_DOUT 7 DO PCM data output If unused, keep it
VOHmin = 1.35 V
open.
1.8 V power domain.
VOLmax = 0.45 V
In master mode, it is
VOHmin = 1.35 V
PCM data frame an output signal. In
VILmin = -0.3 V
PCM_SYNC 5 IO synchronization slave mode, it is an
VILmax = 0.6 V
signal input signal.
VIHmin = 1.2 V
If unused, keep it
VIHmax = 2.0 V
open.
1.8 V power domain.
VOLmax = 0.45 V
In master mode, it is
VOHmin = 1.35 V
an output signal. In
VILmin = -0.3 V
PCM_CLK 4 IO PCM clock slave mode, it is an
VILmax = 0.6 V
input signal.
VIHmin = 1.2 V
If unused, keep it
VIHmax = 2.0 V
open.

I2C Interface

Pin Name Pin No. I/O Description DC Characteristics Comment

An external pull-up to
I2C serial clock
1.8 V is required.
I2C_SCL 40 OD Used for external
If unused, keep it
codec
open.
An external pull-up to
I2C serial data
1.8 V is required.
I2C_SDA 41 OD Used for external
If unused, keep it
codec
open.

ADC Interface

Pin Name Pin No. I/O Description DC Characteristics Comment

General purpose
Voltage range: If unused, keep it
ADC0 24 AI analog to digital
0.3 V to VBAT_BB open.
converter

SPI Interface

Pin Name Pin No. I/O Description DC Characteristics Comment

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 LTE Standard Module Series
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1.8 V power domain.

Clock signal of SPI VOLmax = 0.45 V
SPI_CLK 26 DO If unused, keep it
interface VOHmin = 1.35 V
open.
Master output slave 1.8 V power domain.
VOLmax = 0.45 V
SPI_MOSI 27 DO input of SPI If unused, keep it
VOHmin = 1.35 V
interface open.
VILmin = -0.3 V
Master input slave 1.8 V power domain.
VILmax = 0.6 V
SPI_MISO 28 DI output of SPI If unused, keep it
VIHmin = 1.2 V
interface open.
VIHmax = 2.0 V

RF Interfaces

Pin Name Pin No. I/O Description DC Characteristics Comment

49 50 Ω impedance.
(EG95- If unused, keep it
NA/-EX/ open.
ANT_GNSS AI GNSS antenna pad
-NAX/- The pin is defined as
NAXD/- ANT_DIV on
AUX) EG95-E.
49
(EG95-E)
50 Ω impedance.
56
If unused, keep it
(EG95- Receive diversity
ANT_DIV AI open.
NA/-EX/ antenna
Pin 56 is reserved on
-NAX/-
EG95-E.
NAXD/-
AUX)

ANT_MAIN 60 IO Main antenna 50 Ω impedance.

Other Pins

Pin Name Pin No. I/O Description DC Characteristics Comment

VILmin = -0.3 V
Application 1.8 V power domain.
VILmax = 0.6 V
AP_READY 19 DI processor sleep If unused, keep it
VIHmin = 1.2 V
state detection open.
VIHmax = 2.0 V
VILmin = -0.3 V 1.8 V power domain.
Force the module
VILmax = 0.6 V It is recommended to
USB_BOOT 75 DI to enter emergency
VIHmin = 1.2 V reserve the test
download mode
VIHmax = 2.0 V points.

RESERVED Pins

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Pin Name Pin No. I/O Description DC Characteristics Comment

1,2, 11–14,
16, 51,
Keep these pins
NC 57, 63–66, NC
unconnected.
76–78,
88, 92–99
Keep these pins
unconnected.
RESERVED 18, 25, 56 Reserved
Pin 56 is only
reserved on EG95-E.

NOTE

Keep all RESERVED pins and unused pins unconnected.

3.4. Operating Modes

The following table briefly outlines the operating modes to be mentioned in the following chapters.

Table 5: Overview of Operating Modes

Mode Details

Software is active. The module has registered on the network, and it is

Idle
Normal ready to send and receive data.
Operation Network connection is ongoing. In this mode, the power consumption is
Talk/Data
decided by network setting and data transfer rate.
Minimum
AT+CFUN=0 command can set the module to a minimum functionality mode without
Functionality
removing the power supply. In this case, both RF function and (U)SIM card will be invalid.
Mode
Airplane AT+CFUN=4 command or W_DISABLE# pin can set the module to enter airplane mode.
Mode In this case, RF function will be invalid.
In this mode, the current consumption of the module will be reduced to the minimal level.
Sleep Mode During this mode, the module can still receive paging message, SMS, voice call and
TCP/UDP data from the network normally.
In this mode, the power management unit shuts down the power supply. Software goes
Power Down
inactive. The serial interface is not accessible. Operating voltage (connected to
Mode
VBAT_RF and VBAT_BB) remains applied.

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3.5. Power Saving

3.5.1. Sleep Mode

EG95 series module is able to reduce its current consumption to a minimum value during the sleep mode.
The following sub-chapters describe the power saving procedures of EG95 series module.

3.5.1.1. UART Application

If the host communicates with module via UART interface, the following preconditions can let the module
enter sleep mode.

 Execute AT+QSCLK=1 command to enable sleep mode.

 Drive DTR to high level.

The following figure shows the connection between the module and the host.

Module Host
RXD TXD

TXD RXD

RI EINT

DTR GPIO

AP_READY GPIO

GND GND

Figure 3: Sleep Mode Application via UART

Driving the host DTR to low level will wake up the module.

 When EG95 series module has a URC to report, RI signal will wake up the host. See Chapter 3.17
for details about RI behaviors.
 AP_READY will detect the sleep state of host (can be configured to high level or low level detection).
See AT+QCFG="apready" for details.

3.5.1.2. USB Application with USB Remote Wakeup Function

If the host supports USB suspend/resume and remote wakeup functions, the following three preconditions
must be met to let the module enter sleep mode.

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 Execute AT+QSCLK=1 command to enable sleep mode.

 Ensure the DTR is held at high level or keep it open.
 The host’s USB bus, which is connected with the module’s USB interface, enters suspend state.

The following figure shows the connection between the module and the host.

Module Host
USB_VBUS VDD

USB_DP USB_DP

USB_DM USB_DM

AP_READY GPIO
GND GND

Figure 4: Sleep Mode Application with USB Remote Wakeup

 Sending data to EG95 series module through USB will wake up the module.
 When EG95 series module has a URC to report, the module will send remote wakeup signals via
USB bus so as to wake up the host.

3.5.1.3. USB Application with USB Suspend/Resume and RI Function

If the host supports USB suspend/resume, but does not support remote wake-up function, the RI signal is
needed to wake up the host.

There are three preconditions to let the module enter sleep mode.

 Execute AT+QSCLK=1 command to enable sleep mode.

 Ensure the DTR is held at high level or keep it open.
 The host’s USB bus, which is connected with the module’s USB interface, enters suspended state.

The following figure shows the connection between the module and the host.

Module Host
USB_VBUS VDD

USB_DP USB_DP

USB_DM USB_DM

AP_READY GPIO
RI EINT
GND GND

Figure 5: Sleep Mode Application with RI

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 Sending data to EG95 series module via USB will wake up the module.
 When module has a URC to report, RI signal will wake up the host.

3.5.1.4. USB Application without USB Suspend Function

If the host does not support USB suspend function, USB_VBUS should be disconnected with an external
control circuit to let the module enter sleep mode.

 Execute AT+QSCLK=1 command to enable the sleep mode.

 Ensure the DTR is held at high level or keep it open.
 Disconnect USB_VBUS.

The following figure shows the connection between the module and the host.

Module Host
GPIO

Power
USB_VBUS Switch VDD

USB_DP USB_DP

USB_DM USB_DM

RI EINT

AP_READY GPIO

GND GND

Figure 6: Sleep Mode Application without Suspend Function

Switching on the power switch to supply power to USB_VBUS will wake up the module.

NOTE

Please pay attention to the level match shown in dotted line between the module and the host. See
document [2] for more details about EG95 series module power management application.

3.5.2. Airplane Mode

When the module enters airplane mode, the RF function will be disabled, and all AT commands related to
it will be inaccessible. This mode can be set via the following ways.

Hardware:

The W_DISABLE# pin is pulled up by default. Driving it to low level will let the module enter airplane
mode.

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Software:

AT+CFUN=<fun> command provides the choice of the functionality level through setting <fun> as 0, 1
or 4.

 AT+CFUN=0: Minimum functionality mode. Both (U)SIM and RF functions are disabled.
 AT+CFUN=1: Full functionality mode (by default).
 AT+CFUN=4: Airplane mode. RF function is disabled.

NOTES

1. Airplane mode control via W_DISABLE# is disabled in firmware by default. It can be enabled by
AT+QCFG="airplanecontrol" command.
2. The execution of AT+CFUN will not affect GNSS function.

3.6. Power Supply

3.6.1. Power Supply Pins

EG95 series module provides four VBAT pins for connection with the external power supply. There are two
separate voltage domains for VBAT.

 Two VBAT_RF pins for module’s RF part.

 Two VBAT_BB pins for module’s baseband part.

The following table shows the details of VBAT pins and ground pins.

Table 6: Pin Definition of VBAT and GND Pins

Pin Name Pin No. Description Min. Typ. Max. Unit

Power supply for module’s

VBAT_RF 52, 53 3.3 3.8 4.3 V
RF part.
Power supply for module’s
VBAT_BB 32, 33 3.3 3.8 4.3 V
baseband part.
3, 31, 48, 50,
54, 55, 58, 59,
GND 61, 62, 67–74, Ground - 0 - V
79–82, 89–91,
100–106

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3.6.2. Decrease Voltage Drop

The power supply range of the module is from 3.3 V to 4.3 V. Please make sure that the input voltage will
never drop below 3.3 V. The following figure shows the voltage drop during burst transmission in 2G
network. The voltage drop will be less in 3G and 4G networks.

Burst Burst
Transmission Transmission

VBAT Ripple
Drop
Min.3.3 V

Figure 7: Power Supply Limits during Burst Transmission

To decrease voltage drop, a bypass capacitor of about 100µF with low ESR (ESR = 0.7 Ω) should be used,
and a multi-layer ceramic chip (MLCC) capacitor array should also be reserved due to its ultra-low ESR. It
is recommended to use three ceramic capacitors (100 nF, 33 pF, 10 pF) for composing the MLCC array,
and place these capacitors close to VBAT_BB/VBAT_RF pins. The main power supply from an external
application has to be a single voltage source and can be expanded to two sub paths with star structure.
The width of VBAT_BB trace should be no less than 1 mm, and the width of VBAT_RF trace should be no
less than 2 mm. In principle, the longer the VBAT trace is, the wider it will be.

In addition, in order to avoid the damage caused by electric surge and electrostatics discharge (ESD), it is
suggested that a TVS diode with suggested low reverse stand-off voltage VRWM, low clamping voltage VC
and high reverse peak pulse current IPP should be used. The following figure shows the star structure of
the power supply.

VBAT

VBAT_RF

VBAT_BB
+ +
D1 C1 C2 C3 C4 C5 C6 C7 C8

100 μF 100 nF 33 pF 10 pF 100 μF 100 nF 33 pF 10 pF

WS4.5D3HV

Module

Figure 8: Star Structure of Power Supply

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3.6.3. Reference Design for Power Supply

Power design for the module is very important, as the performance of the module largely depends on the
power source. The power supply should be able to provide sufficient current up to 2 A at least. If the voltage
drop between the input and output is not too high, it is suggested that an LDO should be used to supply
power for the module. If there is a big voltage difference between the input source and the desired output
(VBAT), a buck converter is preferred to be used as the power supply.

The following figure shows a reference design for +5 V input power source. The typical output of the power
supply is about 3.8 V and the maximum load current is 3.0 A.

MIC29302WU

DC_IN VBAT
2 4
IN OUT
GND

ADJ
EN

100K
1%
1

5
51K

4.7K 470R
470 μF 100 nF
470 μF 100 nF
47K
VBAT_EN 47K 1%

Figure 9: Reference Circuit of Power Supply

NOTE

In order to avoid damaging internal flash, please do not switch off the power supply when the module
works normally. Only after the module is shut down by PWRKEY or AT command, then the power supply
can be cut off.

3.6.4. Monitor the Power Supply

AT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, see document
[3].

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3.7. Power-on/off Scenarios

3.7.1. Turn on Module Using the PWRKEY

The following table shows the pin definition of PWRKEY.

Table 7: Pin Definition of PWRKEY

Pin Name Pin No. Description DC Characteristics Comment

The output voltage is 0.8 V

PWRKEY 15 Turn on/off the module VIH = 0.8 V because of the diode drop in
the Qualcomm chipset.

When EG95 series module is in power down mode, it can be turned on to normal mode by driving the
PWRKEY pin to a low level for at least 500ms. It is recommended to use an open drain/collector driver to
control the PWRKEY. After STATUS pin outputting a high level, PWRKEY pin can be released. A simple
reference circuit is illustrated in the following figure.

PWRKEY

≥ 500 ms
4.7K
10 nF
Turn-on pulse

47K

Figure 10: Turn on the Module by Using Driving Circuit

The other way to control the PWRKEY is using a button directly. When pressing the key, electrostatic strike
may generate from the finger. Therefore, a TVS component is indispensable to be placed nearby the button
for ESD protection. A reference circuit is shown in the following figure.

S1
PWRKEY

TVS

Close to S1

Figure 11: Turn on the Module by Using Keystroke

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The power-on scenario is illustrated in the following figure.

NOTE 1

VBAT 500 ms
VIH = 0. 8 V

PWRKEY VIL 0.5 V

About 100 ms
VDD_EXT
100 ms. After this time, the BOOT_CONFIG
pins can be set to high level by external circuit.
BOOT_CONFIG &
USB_BOOT Pins

RESET_N
10 s

STATUS
(DO)

12 s

UART I nactive Active

13 s

USB I nactive Active

Figure 12: Timing of Turning on Module

NOTES

1. Please make sure that VBAT is stable before pulling down PWRKEY pin. It is recommended that
the time between powering up VBAT and pulling down PWRKEY pin is no less than 30ms.
2. PWRKEY can be pulled down directly to GND with a recommended 10 kΩ resistor if module needs
to be powered on automatically and shutdown is not needed.

3.7.2. Turn off Module

The following procedures can be used to turn off the module normally:

 Use the PWRKEY pin.

 Use AT+QPOWD command.

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3.7.2.1. Turn off Module Using the PWRKEY Pin

Driving the PWRKEY pin to a low level voltage for at least 650ms, the module will execute power-off
procedure after the PWRKEY is released. The power-off scenario is illustrated in the following figure.

VBAT

≥ 650 ms ≥ 30 s

PWRKEY

STATUS

Module RUNNING Power-down procedure OFF

Status

Figure 13: Timing of Turning off Module

3.7.2.2. Turn off Module Using AT Command

It is also a safe way to use AT+QPOWD command to turn off the module, which is similar to turning off the
module via PWRKEY pin.

See document [3] for details about the AT+QPOWD command.

NOTES

1. In order to avoid damaging internal flash, please do not switch off the power supply when the
module works normally. Only after the module is shut down by PWRKEY or AT command, then the
power supply can be cut off.
2. When turning off module with the AT command, please keep PWRKEY at high level after the
execution of the command. Otherwise the module will be turned on again after successfully turn-
off.

3.8. Reset the Module

The RESET_N pin can be used to reset the module. The module can be reset by driving RESET_N to a
low level voltage for 150–460 ms.

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Table 8: Pin Definition of RESET_N

Pin Name Pin No. Description DC Characteristics Comment

VIHmax = 2.1 V
RESET_N 17 Reset the module VIHmin = 1.3 V
VILmax = 0.5 V

The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button
can be used to control the RESET_N.

RESET_N

150–460 ms
4.7K

Reset pulse

47K

Figure 14: Reference Circuit of RESET_N by Using Driving Circuit

S2
RESET_N

TVS

Close to S2

Figure 15: Reference Circuit of RESET_N by Using Button

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The reset scenario is illustrated in the following figure.

VBA T
460 ms

150 ms
RESET_N VIH 1.3 V
VIL 0.5 V

Module
Running Resetting Restart
Status

Figure 16: Timing of Resetting Module

NOTES

1. Use RESET_N only when failed to turn off the module by AT+QPOWD command and PWRKEY
pin.
2. Ensure that there is no large capacitance on PWRKEY and RESET_N pins.

3.9. (U)SIM Interfaces

EG95 series module provides two (U)SIM interfaces, and only one (U)SIM card can work at a time. The
(U)SIM 1 and (U)SIM 2 cards can be switched by AT+QDSIM command. For more details, see document
[3].

The (U)SIM interfaces circuitry meet ETSI and IMT-2000 requirements. Both 1.8 V and 3.0 V (U)SIM cards
are supported.

Table 9: Pin Definition of (U)SIM Interfaces

Pin Name Pin No. I/O Description Comment

Either 1.8 V or 3.0 V is

USIM1_VDD 43 PO Power supply for (U)SIM1 card supported by the module
automatically.

USIM1_DATA 45 IO Data signal of (U)SIM1 card

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USIM1_CLK 46 DO Clock signal of (U)SIM1 card

USIM1_RST 44 DO Reset signal of (U)SIM1 card

USIM1_
42 DI (U)SIM1 card insertion detection
PRESENCE

USIM_GND 47 Specified ground for (U)SIM card

Either 1.8 V or 3.0 V is

USIM2_VDD 87 PO Power supply for (U)SIM2 card supported by the module
automatically.

USIM2_DATA 86 IO Data signal of (U)SIM2 card

USIM2_CLK 84 DO Clock signal of (U)SIM2 card

USIM2_RST 85 DO Reset signal of (U)SIM2 card

USIM2_
83 DI (U)SIM2 card insertion detection
PRESENCE

EG95 series module supports (U)SIM card hot-plug via USIM_PRESENCE (USIM1_PRESENCE/USIM2
_PRESENCE) pin, and both high and low level detection are supported. The function is disabled by default,
and see AT+QSIMDET in document [3] for more details.

The following figure shows a reference design for (U)SIM interface with an 8-pin (U)SIM card connector.

VDD_EXT USIM_VDD

51K 15K
USIM_GND 100 nF (U)SIM Card Connector

USIM_VDD
VCC GND
USIM_RST 0R
RST VPP
Module USIM_CLK
CLK IO
USIM_PRESENCE 0R
USIM_DATA 0R

GND
33 pF 33 pF 33 pF

GND GND

Figure 17: Reference Circuit of (U)SIM Interface with an 8-pin (U)SIM Card Connector

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If (U)SIM card detection function is not needed, please keep USIM_PRESENCE unconnected. A reference
circuit of (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure.

USIM_VDD

15K
USIM_GND 100 nF
(U)SIM Card Connector
USIM_VDD
VCC GND
USIM_RST 0R
RST VPP
Module USIM_CLK
CLK IO
0R
USIM_DATA 0R

33 pF 33 pF 33 pF

GND GND

Figure 18: Reference Circuit of (U)SIM Interface with a 6-pin (U)SIM Card Connector

In order to enhance the reliability and availability of the (U)SIM cards in your applications, please follow
the criteria below in the (U)SIM circuit design:

 Keep placement of (U)SIM card connector to the module as close as possible. Keep the trace length
as less than 200mm as possible.
 Keep (U)SIM card signals away from RF and VBAT traces.
 Make sure the bypass capacitor between USIM_VDD and USIM_GND less than 1 μF, and place it as
close to (U)SIM card connector as possible. If the ground is complete on your PCB, USIM_GND can
be connected to PCB ground directly.
 To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield
them with surrounded ground.
 In order to offer good ESD protection, it is recommended to add a TVS diode array whose parasitic
capacitance should not be more than 15 pF. The 0 Ω resistors should be added in series between the
module and the (U)SIM card to facilitate debugging. The 33 pF capacitors are used for filtering
interference of EGSM900. Please note that the (U)SIM peripheral circuit should be close to the (U)SIM
card connector.
 The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace
and sensitive occasion are applied, and should be placed close to the (U)SIM card connector.

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3.10. USB Interface

EG95 series module contains one integrated Universal Serial Bus (USB) interface which complies with the
USB 2.0 specification and supports high-speed (480 Mbps) and full-speed (12 Mbps) modes. The USB
interface can only serves as a slave device and is used for AT command communication, data transmission,
GNSS NMEA sentences output, software debugging, firmware upgrade and voice over USB. The following
table shows the pin definition of USB interface.

Table 10: Pin Definition of USB Interface

Pin Name Pin No. I/O Description Comment

Require differential
USB_DP 9 IO USB differential data bus (+)
impedance of 90 Ω.
Require differential
USB_DM 10 IO USB differential data bus (-)
impedance of 90 Ω.

USB_VBUS 8 PI USB connection detection Typical: 5.0 V

GND 3 Ground

For more details about USB 2.0 specifications, please visit http://www.usb.org/home.

The USB interface is recommended to be reserved for firmware upgrade in your design. The following
figure shows a reference circuit of USB interface.

Test Points
Minimize these stubs

Module MCU
R3 NM_0R
VDD R4 NM_0R

USB_VBUS ESD Array

L1 USB_DM
USB_DM
USB_DP USB_DP

Close to Module GND

GND

Figure 19: Reference Circuit of USB Interface

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A common mode choke L1 is recommended to be added in series between the module and your MCU in
order to suppress EMI spurious transmission. Meanwhile, the 0 Ω resistors (R3 and R4) should be added
in series between the module and the test points so as to facilitate debugging, and the resistors arenot
mounted by default. In order to ensure the integrity of USB data line signal, L1/R3/R4 components must
be placed close to the module, and also these resistors should be placed close to each other. The extra
stubs of trace must be as short as possible.

The following principles should be complied with when design the USB interface, so as to meet USB 2.0
specification.

 It is important to route the USB signal traces as differential pairs with ground surrounded. The
impedance of USB differential trace is 90 Ω.
 Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is
important to route the USB differential traces in inner-layer of the PCB, and surround the traces with
ground on that layer and with ground planes above and below.
 Junction capacitance of the ESD protection device might cause influences on USB data lines, so
please pay attention to the selection of the device. Typically, the stray capacitance should be less than
2 pF.
 Keep the ESD protection devices as close to the USB connector as possible.

3.11. UART Interfaces

The module provides two UART interfaces: the main UART interface and the debug UART interface. The
following shows their features.

 The main UART interface supports 9600 bps, 19200 bps, 38400 bps, 57600 bps, 115200 bps,
230400 bps, 460800 bps and 921600 bps baud rates, and the default is 115200 bps. It supports RTS
and CTS hardware flow control, and is used for AT command communication and data transmission.
 The debug UART interface supports 115200 bps baud rate. It is used for Linux console and log output.

The following tables show the pin definition of the UART interfaces.

Table 11: Pin Definition of Main UART Interfaces

Pin Name Pin No. I/O Description Comment

RI 39 DO Ring indicator

DCD 38 DO Data carrier detection 1.8 V power domain

CTS 36 DO Clear to send

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RTS 37 DI Request to send

Data terminal ready

DTR 30 DI
Sleep mode control

TXD 35 DO Transmit data

RXD 34 DI Receive data

Table 12: Pin Definition of Debug UART Interface

Pin Name Pin No. I/O Description Comment

DBG_TXD 23 DO Transmit data 1.8 V power domain

DBG_RXD 22 DI Receive data 1.8 V power domain

The logic levels are described in the following table.

Table 13: Logic Levels of Digital I/O

Parameter Min. Max. Unit

VIL -0.3 0.6 V

VIH 1.2 2.0 V

VOL 0 0.45 V

VOH 1.35 1.8 V

The module provides 1.8 V UART interfaces. A level translator should be used if your application is
equipped with a 3.3 V UART interface. A level translator TXS0108EPWR provided by Texas Instruments
is recommended. The following figure shows a reference design.

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VDD_EXT VCCA VCCB VDD_MCU

0.1 μF 0.1 μF

10K
OE GND
120K
RI A1 B1 RI_MCU
DCD A2 B2 DCD_MCU
CTS A3 Translator B3 CTS_MCU
RTS A4 B4 RTS_MCU
DTR A5 B5 DTR_MCU
TXD A6 B6 RXD_MCU
RXD A7 B7 TXD_MCU
51K 51K
A8 B8

Figure 20: Reference Circuit with Translator Chip

Please visit http://www.ti.com for more information.

Another example with transistor translation circuit is shown as below. For the design of circuits in dotted
lines, see that of circuits in solid lines, but please pay attention to the direction of connection.
4.7K
VDD_EXT VDD_EXT
1 nF
MCU/ARM Module
10K

TXD RXD
RXD TXD
1 nF
10K
VDD_EXT
VCC_MCU 4.7K
RTS RTS
CTS CTS
GPIO DTR
EINT RI
GPIO DCD
GND GND

Figure 21: Reference Circuit with Transistor Circuit

NOTES

1. Transistor circuit solution is not suitable for applications with high baud rates exceeding 460 kbps.
2. Please note that the CTS and RTS pins of the hardware flow control for the UART port are directly
connected, and pay attention to the input and output directions.

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3.12. PCM and I2C Interfaces

EG95 series module provides one Pulse Code Modulation (PCM) digital interface for audio design, which
supports the following modes and one I2C interface:

 Primary mode (short frame synchronization, works as both master and slave)
 Auxiliary mode (long frame synchronization, works as master only)

In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports
256 kHz, 512 kHz, 1024 kHz or 2048 kHz PCM_CLK at 8 kHz PCM_SYNC, and also supports 4096 kHz
PCM_CLK at 16 kHz PCM_SYNC.

In auxiliary mode, the data is also sampled on the falling edge of the PCM_CLK and transmitted on the
rising edge. The PCM_SYNC rising edge represents the MSB. In this mode, the PCM interface operates
with a 256 kHz, 512 kHz, 1024 kHz or 2048 kHz PCM_CLK and an 8 kHz, 50 % duty cycle PCM_SYNC.

EG95 series module supports 16-bit linear data format. The following figures show the primary mode’s
timing relationship with 8 kHz PCM_SYNC and 2048 kHz PCM_CLK, as well as the auxiliary mode’s timing
relationship with 8 kHz PCM_SYNC and 256 kHz PCM_CLK.

125 μs

PCM_CLK 1 2 255 256

PCM_SYNC

MSB LSB MSB

PCM_DOUT

MSB LSB MSB

PCM_DIN

Figure 22: Primary Mode Timing

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125 μs

PCM_CLK 1 2 31 32

PCM_SYNC

MSB LSB
PCM_DOUT

MSB LSB

PCM_DIN

Figure 23: Auxiliary Mode Timing

The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio
codec design.

Table 14: Pin Definition of PCM and I2C Interfaces

Pin Name Pin No. I/O Description Comment

PCM_DIN 6 DI PCM data input 1.8 V power domain

PCM_DOUT 7 DO PCM data output 1.8 V power domain

PCM data frame

PCM_SYNC 5 IO 1.8 V power domain
synchronization signal

PCM_CLK 4 IO PCM data bit clock 1.8 V power domain

An external pull-up to 1.8 V is

I2C_SCL 40 OD I2C serial clock
required.
An external pull-up to 1.8 V is
I2C_SDA 41 OD I2C serial data
required.

Clock and mode can be configured by AT command, and the default configuration is master mode using
short frame synchronization format with 2048 kHz PCM_CLK and 8 kHz PCM_SYNC. See document [3]
about AT+QDAI for details.

The following figure shows a reference design of PCM and I2C interfaces with external codec IC.

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MICBIAS

INP

BIAS
PCM_CLK BCLK
INN
PCM_SYNC LRCK
PCM_DOUT DAC
PCM_DIN ADC

LOUTP
I2C_SCL SCL
I2C_SDA SDA LOUTN
4.7K

4.7K

Module Codec

1.8 V

Figure 24: Reference Circuit of PCM and I2C Application with Audio Codec

NOTES

1. It is recommended to reserve an RC (R = 22 Ω, C = 22 pF) circuit on the PCM lines, especially for

PCM_CLK.
2. EG95 series module works as a master device pertaining to I2C interface.

3.13. SPI Interface

SPI interface of EG95 series module acts as the master only. It provides a duplex, synchronous and serial
communication link with the peripheral devices. It is dedicated to one-to-one connection, without chip
select. Its operation voltage is 1.8 V with clock rates up to 50 MHz.

The following table shows the pin definition of SPI interface.

Table 15: Pin Definition of SPI Interface

Pin Name Pin No. I/O Description Comment

SPI_CLK 26 DO Clock signal of SPI interface 1.8 V power domain

Master output slave input of SPI

SPI_MOSI 27 DO 1.8 V power domain
interface

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Master input slave output of SPI

SPI_MISO 28 DI 1.8 V power domain
interface

The following figure shows a reference design of SPI interface with peripherals.

SPI_CLK SPI_CLK
SPI_MOSI SPI_MOSI
SPI_MISO SPI_MISO

Module Peripherals

Figure 25: Reference Circuit of SPI Interface with Peripherals

NOTE

The module provides 1.8 V SPI interface. A level translator should be used between the module and
the host if your application is equipped with a 3.3V processor or device interface.

3.14. Network Status Indication

The module provides one network indication pin: NETLIGHT. The pin is used to drive a network status
indication LED.

The following tables describe the pin definition and logic level changes of NETLIGHT in different network
status.

Table 16: Pin Definition of Network Status Indicator

Pin Name Pin No. I/O Description Comment

NETLIGHT 21 DO Indicate the module’s network activity status 1.8 V power domain

Table 17: Working State of Network Status Indicator

Pin Name Logic Level Changes Network Status

NETLIGHT Flicker slowly (200 ms High/1800 ms Low) Network searching

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Flicker slowly (1800 ms High/200 ms Low) Idle

Flicker quickly (125 ms High/125 ms Low) Data transfer is ongoing

Always High Voice calling

A reference circuit is shown in the following figure.

VBAT

Module

2.2K

4.7K
NETLIGHT
47K

Figure 26: Reference Circuit of Network Status Indicator

3.15. STATUS

The STATUS pin is set as the module’s operation status indicator. It will output high level when the module
is powered on. The following table describes the pin definition of STATUS.

Table 18: Pin Definition of STATUS

Pin Name Pin No. I/O Description Comment

1.8 V power domain.

STATUS 20 DO Indicate the module’s operation status
If unused, keep it open.

The following figure shows the reference circuit of STATUS.

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VBAT
Module

2.2K

4.7K
STATUS
47K

Figure 27: Reference Circuit of STATUS

3.16. ADC Interface

The module provides one analog-to-digital converter (ADC) interface. AT+QADC=0 can be used to read
the voltage value on ADC0 pin. For more details about the command, see document [3].

In order to improve the accuracy of ADC voltage values, the traces of ADC should be surrounded by
ground.

Table 19: Pin Definition of ADC Interface

Pin Name Pin No. I/O Description Comment

General purpose analog to digital If unused, keep this pin

ADC0 24 AI
converter open.

The following table describes the characteristics of ADC interface.

Table 20: Characteristics of ADC Interface

Parameter Min. Typ. Max. Unit

ADC0 Voltage Range 0.3 VBAT_BB V

ADC Resolution 15 bits

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NOTES

1. It is prohibited to supply any voltage to ADC pins when ADC pins are not powered by VBAT.
2. It is recommended to use resistor divider circuit for ADC application.

3.17. Behaviors of RI

AT+QCFG="risignaltype","physical" command can be used to configure RI behaviors. See document

[3] for details.

No matter on which port URC is presented, URC will trigger the behavior of RI pin.

NOTE

URC can be outputted from UART port, USB AT port and USB modem port through configuration via
AT+QURCCFG command. The default port is USB AT port.

The default behaviors of the RI are shown as below, and can be changed by AT+QCFG="urc/ri/ring"
command. See document [3] for details.

Table 21: Default Behaviors of RI

State Response

Idle RI keeps at high level

URC RI outputs 120ms low pulse when a new URC returns

3.18. USB_BOOT Interface

EG95 series module provides a USB_BOOT pin. You can pull up USB_BOOT to VDD_EXT before
VDD_EXT is powered up, and the module will enter emergency download mode when it is powered on. In
this mode, the module supports firmware upgrade over USB interface.

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Table 22: Pin Definition of USB_BOOT Interface

Pin Name Pin No. I/O Description Comment

1.8 V power domain.

Force the module to enter Active high.
USB_BOOT 75 DI
emergency download mode It is recommended to
reserve test points.

The following figures show the reference circuit of USB_BOOT interface and timing sequence of entering
emergency download mode.

Module

VDD_EXT

Test points
4.7K
USB_BOOT
Close to test points

TVS

Figure 28: Reference Circuit of USB_BOOT Interface

NOTE 1

VBAT 500 ms
VH = 0.8 V

PWRKEY VIL 0.5 V

About 100 ms

VDD_EXT USB_BOOT can be pulled up to 1.8 V before

VDD_EXT Is powered up, and the module will
enter emerge ncy download mode wh en i t is
powered on.
USB_BOOT

RESET_N

Figure 29: Timing Sequence for Entering Emergency Download Mode

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NOTES

1. Please make sure that VBAT is stable before pulling down PWRKEY pin. It is recommended that the
time between powering up VBAT and pulling down PWRKEY pin is no less than 30 ms.
2. When using MCU to control module to enter the emergency download mode, please follow the above
timing sequence. It is not recommended to pull up USB_BOOT to 1.8 V before powering up VBAT.
Connect the test points as shown in Figure 28 can manually force the module to enter download
mode.

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4 GNSS Receiver

4.1. General Description

EG95 series module includes a fully integrated global navigation satellite system solution that supports
Gen8C-Lite of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS).

EG95 series module supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1 Hz data
update rate via USB interface by default.

By default, EG95 series module GNSS engine is switched off. It has to be switched on via AT command.
For more details about GNSS engine technology and configurations, see document [4].

4.2. GNSS Performance

The following table shows GNSS performance of EG95 series module.

Table 23: GNSS Performance

Parameter Description Conditions Typ. Unit

Cold start Autonomous -146 dBm

Sensitivity
Reacquisition Autonomous -157 dBm
(GNSS)
Tracking Autonomous -157 dBm

Autonomous 34.6 s
Cold start
@ open sky
XTRA enabled 11.57 s
TTFF
(GNSS)
Autonomous 26.09 s
Warm start
@ open sky
XTRA enabled 3.7 s

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Autonomous 1.8 s
Hot start
@ open sky
XTRA enabled 3.4 s

Accuracy Autonomous
CEP-50 <2.5 m
(GNSS) @ open sky

NOTES

1. Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep
positioning for at least 3 minutes continuously).
2. Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain lock
within 3 minutes after loss of lock.
3. Cold start sensitivity: the minimum GNSS signal power at which the module can fix position
successfully within 3 minutes after executing cold start command.

4.3. Layout Guidelines

The following layout guidelines should be taken into account in your design.

 Maximize the distance among GNSS antenna, main antenna and Rx-diversity antenna.
 Digital circuits such as (U)SIM card, USB interface, camera module and display connector should be
kept away from the antennas.
 Use ground vias around the GNSS trace and sensitive analog signal traces to provide coplanar
isolation and protection.
 Keep 50 Ω characteristic impedance for the ANT_GNSS trace.

See Chapter 5 for GNSS antenna reference design and antenna installation information.

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5 Antenna Interfaces
EG95 series module antenna interfaces include a main antenna interface and an Rx-diversity antenna
interface which is used to resist the fall of signals caused by high speed movement and multipath effect,
and a GNSS antenna interface which is only supported on EG95-NA/-EX/-NAX/-NAXD/-AUX. The
impedance of the antenna ports is 50 Ω.

5.1. Main/Rx-diversity Antenna Interfaces

5.1.1. Pin Definition

The pin definition of main antenna and Rx-diversity antenna interfaces is shown below.

Table 24: Pin Definition of RF Antennas

Pin Name Pin No. I/O Description Comment

ANT_MAIN 60 IO Main antenna pad 50 Ω impedance

ANT_DIV (EG95-E) 49 AI Receive diversity antenna pad 50 Ω impedance

ANT_DIV (EG95-NA/
-EX/-NAX/-NAXD/ 56 AI Receive diversity antenna pad 50 Ω impedance
-AUX)

5.1.2. Operating Frequency

Table 25: Module Operating Frequencies

3GPP Band Transmit Receive Unit

GSM850 824–849 869–894 MHz

EGSM900 880–915 925–960 MHz

DCS1800 1710–1785 1805–1880 MHz

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PCS1900 1850–1910 1930–1990 MHz

WCDMA B1 1920–1980 2110–2170 MHz

WCDMA B2 1850–1910 1930–1990 MHz

WCDMA B4 1710–1755 2110–2155 MHz

WCDMA B5 824–849 869–894 MHz

WCDMA B8 880–915 925–960 MHz

LTE-FDD B1 1920–1980 2110–2170 MHz

LTE-FDD B2 1850–1910 1930–1990 MHz

LTE-FDD B3 1710–1785 1805–1880 MHz

LTE-FDD B4 1710–1755 2110–2155 MHz

LTE-FDD B5 824–849 869–894 MHz

LTE-FDD B7 2500–2570 2620–2690 MHz

LTE-FDD B8 880–915 925–960 MHz

LTE-FDD B12 699–716 729–746 MHz

LTE-FDD B13 777–787 746–756 MHz

LTE-FDD B20 832–862 791–821 MHz

LTE-FDD B25 1850–1915 1930–1995 MHz

LTE-FDD B26 814–849 859–894 MHz

LTE-FDD B28 703–748 758–803 MHz

LTE-FDD B66 1710–1780 2100–2200 MHz

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5.1.3. Reference Design of RF Antenna Interface

A reference design of ANT_MAIN and ANT_DIV antenna pads is shown as below. A π-type matching circuit
should be reserved for better RF performance. The capacitors are not mounted by default.

Main
Module antenna
R1 0R
ANT_MAIN

C1 C2

NM NM

Diversity
antenna
R2 0R
ANT_DIV

C3 C4

NM NM

Figure 30: Reference Circuit of RF Antenna Interface

NOTES

1. Keep a proper distance between the main antenna and the Rx-diversity antenna to improve the
receiving sensitivity.
2. For the operation of ANT_MAIN and ANT_DIV, see AT+QCFG="divctl" in document [5] for details.
3. Place the π-type matching components (R1&C1&C2, R2&C3&C4) as close to the antenna as
possible.

5.2. GNSS Antenna Interface

The GNSS antenna interface is only supported on EG95-NA/-EX/-NAX/-NAXD/-AUX.The following tables

show pin definition and frequency specification of GNSS antenna interface.

Table 26: Pin Definition of GNSS Antenna Interface

Pin Name Pin No. I/O Description Comment

ANT_GNSS (EG95-NA/-EX/
49 AI GNSS antenna 50 Ω impedance
-NAX/-NAXD/-AUX)

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Table 27: GNSS Frequency

Type Frequency Unit

GPS 1575.42 ±1.023 MHz

GLONASS 1597.5–1605.8 MHz

Galileo 1575.42 ±2.046 MHz

BeiDou 1561.098 ±2.046 MHz

QZSS 1575.42 MHz

A reference design of GNSS antenna is shown as below.

VDD

0.1 μF GNSS
10R
Antenna
Module
47 nH

0R 100 pF
ANT_GNSS

NM NM

Figure 31: Reference Circuit of GNSS Antenna

NOTES

1. An external LDO can be selected to supply power according to the active antenna requirement.
2. If the module is designed with a passive antenna, then the VDD circuit is not needed.

5.3. Reference Design of RF Layout

For user’s PCB, the characteristic impedance of all RF traces should be controlled to 50 Ω. The impedance
of the RF traces is usually determined by the trace width (W), the materials’ dielectric constant, the height
from the reference ground to the signal layer (H), and the spacing between RF traces and grounds (S).
Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance. The
following are reference designs of microstrip or coplanar waveguide with different PCB structures.

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Figure 32: Microstrip Design on a 2-layer PCB

Figure 33: Coplanar Waveguide Design on a 2-layer PCB

Figure 34: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground)

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Figure 35: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground)

In order to ensure RF performance and reliability, the following principles should be complied with in RF
layout design:

 Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to
50 Ω.
 The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully
connected to ground.
 The distance between the RF pins and the RF connector should be as short as possible, and all the
right-angle traces should be changed to curved ones. The recommended trace angle is 135°.
 There should be clearance under the signal pin of the antenna connector or solder joint.
 The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around
RF traces and the reference ground could help to improve RF performance. The distance between
the ground vias and RF traces should be no less than two times the width of RF signal traces (2 × W).
 Keep RF traces away from interference sources, and avoid intersection and paralleling between traces
on adjacent layers.

For more details about RF layout, see document [6].

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5.4. Antenna Installation

5.4.1. Antenna Requirement

The following table shows the requirements on main antenna, Rx-diversity antenna and GNSS antenna.

Table 28: Antenna Requirements

Type Requirements

Frequency range: 1559–1609 MHz

Polarization: RHCP or linear
VSWR: < 2 (Typ.)
GNSS 2) Passive antenna gain: > 0 dBi
Active antenna noise figure: < 1.5 dB
Active antenna gain: > 0 dBi
Active antenna embedded LNA gain: < 17 dB
VSWR: ≤ 2
Efficiency: > 30 %
Max. input power: 50 W
Input impedance: 50 Ω
Cable insertion loss: < 1 dB
(GSM850, EGSM900, WCDMA B5/B8,
GSM/WCDMA/LTE
LTE-FDD B5/B8/B12/B13/B20/B26/B28)
Cable insertion loss: < 1.5 dB
(DCS1800, PCS1900, WCDMA B1/B2/B4,
LTE-FDD B1/B2/B3/B4/B25/B66)
Cable insertion loss: < 2 dB
(LTE-FDD B7)

NOTE

It is recommended to use a passive GNSS antenna when LTE B13 or B14 is supported, as the use of
active antenna may generate harmonics which will affect the GNSS performance.

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5.4.2. Recommended RF Connector for Antenna Installation

If RF connector is used for antenna connection, it is recommended to use U.FL-R-SMT connector provided
by Hirose.

Figure 36: Dimensions of the U.FL-R-SMT Connector (Unit: mm)

U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT.

Figure 37: Mechanicals of U.FL-LP Connectors

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The following figure describes the space factor of mated connector.

Figure 38: Space Factor of Mated Connector (Unit: mm)

For more details, please visit http://www.hirose.com.

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6 Electrical, Reliability and Radio

Characteristics

6.1. Absolute Maximum Ratings

Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed
in the following table.

Table 29: Absolute Maximum Ratings

Parameter Min. Max. Unit

VBAT_RF/VBAT_BB -0.3 4.7 V

USB_VBUS -0.3 5.5 V

Peak Current of VBAT_BB 0 0.8 A

Peak Current of VBAT_RF 0 1.8 A

Voltage at Digital Pins -0.3 2.3 V

6.2. Power Supply Ratings

Table 30: Power Supply Ratings

Parameter Description Conditions Min. Typ. Max. Unit

The actual input voltages

VBAT_BB and must be kept between the
VBAT 3.3 3.8 4.3 V
VBAT_RF minimum and maximum
values.

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Voltage drop during Maximum power control

400 mV
burst transmission level on EGSM900
Peak supply current
Maximum power control
IVBAT (during transmission 1.8 2.0 A
level on EGSM900
slot)
USB connection
USB_VBUS 3.0 5.0 5.25 V
detection

6.3. Operating and Storage Temperatures

The operating and storage temperatures are listed in the following table.

Table 31: Operating and Storage Temperatures

Parameter Min. Typ. Max. Unit

Operating Temperature Range 1) -35 +25 +75 ºC

Extended Temperature Range 2) -40 +85 ºC

Storage Temperature Range -40 +90 ºC

NOTES
1) Within
1. operating temperature range, the module is 3GPP compliant.
2)
2. Within extended temperature range, the module remains the ability to establish and maintain a
voice, SMS, data transmission, etc. There is no unrecoverable malfunction. There are also no effects
on radio spectrum and no harm to radio network. Only one or more parameters like Pout might
reduce in their value and exceed the specified tolerances. When the temperature returns to the
normal operating temperature levels, the module will meet 3GPP specifications again.

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6.4. Current Consumption

The values of current consumption are shown below.

Table 32: EG95-E Current Consumption

Parameter Description Conditions Typ. Unit

OFF state Power down 15 μA

AT+CFUN=0 (USB disconnected) 1.3 mA

GSM DRX = 2 (USB disconnected) 2.3 mA

GSM DRX = 5 (USB suspended) 2.0 mA

GSM DRX = 9 (USB disconnected) 1.6 mA

WCDMA PF = 64 (USB disconnected) 1.8 mA

Sleep state
WCDMA PF = 64 (USB suspended) 2.1 mA

WCDMA PF = 512 (USB disconnected) 1.3 mA

LTE-FDD PF = 64 (USB disconnected) 2.3 mA

LTE-FDD PF = 64 (USB suspended) 2.6 mA

IVBAT
LTE-FDD PF = 256 (USB disconnected) 1.5 mA

GSM DRX = 5 (USB disconnected) 21.0 mA

GSM DRX = 5 (USB connected) 31.0 mA

WCDMA PF = 64 (USB disconnected) 21.0 mA

Idle state
WCDMA PF = 64 (USB connected) 31.0 mA

LTE-FDD PF = 64 (USB disconnected) 21.0 mA

LTE-FDD PF = 64 (USB connected) 31.0 mA

EGSM900 4DL/1UL @ 32.35 dBm 268 mA

GPRS data
EGSM900 3DL/2UL @ 32.16 dBm 459 mA
transfer
EGSM900 2DL/3UL @ 30.57 dBm 547 mA

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EGSM900 1DL/4UL @ 29.45 dBm 631 mA

DCS1800 4DL/1UL @ 29.14 dBm 177 mA

DCS1800 3DL/2UL @ 29.07 dBm 290 mA

DCS1800 2DL/3UL @ 28.97 dBm 406 mA

DCS1800 1DL/4UL @ 28.88 dBm 517 mA

EGSM900 4DL/1UL PCL = 8 @ 26.88 dBm 167 mA

EGSM900 3DL/2UL PCL = 8 @ 26.84 dBm 278 mA

EGSM900 2DL/3UL PCL = 8 @ 26.76 dBm 385 mA

EGSM900 1DL/4UL PCL = 8 @ 26.54 dBm 492 mA

EDGE data
transfer
DCS1800 4DL/1UL PCL = 2 @ 25.66 dBm 169 mA

DCS1800 3DL/2UL PCL = 2 @ 25.59 dBm 256 mA

DCS1800 2DL/3UL PCL = 2 @ 25.51 dBm 341 mA

DCS1800 1DL/4UL PCL = 2 @ 25.38 dBm 432 mA

WCDMA B1 HSDPA @ 22.48 dBm 586 mA

WCDMA B1 HSUPA @ 22.29 dBm 591 mA

WCDMA data
transfer
WCDMA B8 HSDPA @ 22.24 dBm 498 mA

WCDMA B8 HSUPA @ 21.99 dBm 511 mA

LTE-FDD B1 @ 23.37 dBm 736 mA

LTE-FDD B3 @ 22.97 dBm 710 mA

LTE-FDD B7 @ 23.17 dBm 775 mA

LTE data
transfer
LTE-FDD B8 @ 23.04 dBm 651 mA

LTE-FDD B20 @ 23.21 dBm 699 mA

LTE-FDD B28A @ 22.76 dBm 714 mA

EGSM900 PCL = 5 @ 32.36 dBm 271 mA

GSM
voice call
DCS1800 PCL = 0 @ 29.19 dBm 181 mA

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WCDMA B1 @ 22.91 dBm 632 mA

WCDMA
voice call
WCDMA B8 @ 23.14 dBm 546 mA

Table 33: EG95-NA Current Consumption

Parameter Description Conditions Typ. Unit

OFF state Power down 13 μA

AT+CFUN=0 (USB disconnected) 1.0 mA

WCDMA PF = 64 (USB disconnected) 2.2 mA

WCDMA PF = 64 (USB suspended) 2.5 mA

Sleep state WCDMA PF = 512 (USB disconnected) 1.4 mA

LTE-FDD PF = 64 (USB disconnected) 2.6 mA

LTE-FDD PF = 64 (USB suspended) 2.9 mA

LTE-FDD PF = 256 (USB disconnected) 1.7 mA

WCDMA PF = 64 (USB disconnected) 14.0 mA

WCDMA PF = 64 (USB connected) 26.0 mA

IVBAT Idle state
LTE-FDD PF = 64 (USB disconnected) 15.0 mA

LTE-FDD PF = 64 (USB connected) 26.0 mA

WCDMA B2 HSDPA CH9938 @ 22.45 dBm 569 mA

WCDMA B2 HSUPA CH9938 @ 21.73 dBm 559 mA

WCDMA B4 HSDPA CH1537 @ 23.05 dBm 572 mA

WCDMA data
transfer
WCDMA B4 HSUPA CH1537 @ 22.86 dBm 586 mA

WCDMA B5 HSDPA CH4407 @ 23 dBm 518 mA

WCDMA B5 HSUPA CH4407 @ 22.88 dBm 514 mA

LTE-FDD B2 CH1100 @ 23.29 dBm 705 mA

LTE data
transfer
LTE-FDD B4 CH2175 @ 23.19 dBm 693 mA

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LTE-FDD B5 CH2525 @ 23.39 dBm 601 mA

LTE-FDD B12 CH5060 @ 23.16 dBm 650 mA

LTE-FDD B13 CH5230 @ 23.36 dBm 602 mA

WCDMA B2 CH9938 @ 23.34 dBm 627 mA

WCDMA
WCDMA B4 CH1537 @ 23.47 dBm 591 mA
voice call
WCDMA B5 CH4357 @ 23.37 dBm 536 mA

Table 34: EG95-EX Current Consumption

Parameter Description Conditions Typ. Unit

OFF state Power down 15 μA

AT+CFUN=0 (USB disconnected) 1.3 mA

GSM DRX = 2 (USB disconnected) 2.3 mA

GSM DRX = 5 (USB suspend) 2.0 mA

GSM DRX = 9 (USB disconnected) 1.6 mA

WCDMA PF = 64 (USB disconnected) 1.8 mA

Sleep state
WCDMA PF = 64 (USB suspend) 2.1 mA

WCDMA PF = 512 (USB disconnected) 1.3 mA

IVBAT
LTE-FDD PF = 64 (USB disconnected) 2.3 mA

LTE-FDD PF = 64 (USB suspend) 2.6 mA

LTE-FDD PF = 256 (USB disconnected) 1.5 mA

GSM DRX = 5 (USB disconnected) 21.0 mA

GSM DRX = 5 (USB connected) 31.0 mA

Idle state WCDMA PF = 64 (USB disconnected) 21.0 mA

WCDMA PF = 64 (USB connected) 31.0 mA

LTE-FDD PF = 64 (USB disconnected) 21.0 mA

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LTE-FDD PF = 64 (USB connected) 31.0 mA

EGSM900 4DL/1UL @ 33.06 dBm 247.9 mA

EGSM900 3DL/2UL @ 32.93 dBm 450.8 mA

EGSM900 2DL/3UL @ 31.1 dBm 536.4 mA

EGSM900 1DL/4UL @ 29.78 dBm 618 mA

GPRS data
transfer
DCS1800 4DL/1UL @ 29.3 dBm 144 mA

DCS1800 3DL/2UL @ 29.3 dBm 253.4 mA

DCS1800 2DL/3UL @ 29.21 dBm 355.4 mA

DCS1800 1DL/4UL @ 29.07 dBm 455.7 mA

EGSM900 4DL/1UL PCL = 8 @ 27.29 dBm 169.5 mA

EGSM900 3DL/2UL PCL = 8 @ 27.01 dBm 305.06 mA

EGSM900 2DL/3UL PCL = 8 @ 26.86 dBm 434 mA

EGSM900 1DL/4UL PCL = 8 @ 25.95 dBm 548 mA

EDGE data
transfer
DCS1800 4DL/1UL PCL = 2 @ 26.11 dBm 135 mA

DCS1800 3DL/2UL PCL = 2 @ 25.8 dBm 244 mA

DCS1800 2DL/3UL PCL = 2 @ 25.7 dBm 349 mA

DCS1800 1DL/4UL PCL = 2 @ 25.6 dBm 455 mA

WCDMA B1 HSDPA @ 22.48 dBm 485 mA

WCDMA B1 HSUPA @ 21.9 dBm 458 mA

WCDMA data
transfer
WCDMA B8 HSDPA @ 22.6 dBm 556 mA

WCDMA B8 HSUPA @ 22.02 dBm 520 mA

LTE-FDD B1 @ 23.37 dBm 605 mA

LTE-FDD B3 @ 23.3 dBm 667 mA

LTE data
transfer
LTE-FDD B7 @ 23.2 dBm 783 mA

LTE-FDD B8 @ 23.09 dBm 637 mA

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LTE-FDD B20 @ 23.21 dBm 646 mA

LTE-FDD B28 @ 22.76 dBm 661 mA

EGSM900 PCL = 5 @ 32.36 dBm 259 mA

GSM
voice call
DCS1800 PCL = 0 @ 29.5 dBm 149 mA

WCDMA B1 @ 23.4 dBm 494 mA

WCDMA
voice call
WCDMA B8 @ 23.6 dBm 608 mA

Table 35: EG95-NAX Current Consumption

Parameter Description Conditions Typ. Unit

OFF state Power down 11 μA

AT+CFUN=0 (USB disconnected) 1.1 mA

WCDMA PF = 64 (USB disconnected) 2.0 mA

WCDMA PF = 64 (USB suspend) 2.4 mA

Sleep state WCDMA PF = 512 (USB disconnected) 1.5 mA

LTE-FDD PF = 64 (USB disconnected) 2.6 mA

LTE-FDD PF = 64 (USB suspend) 2.8 mA

LTE-FDD PF = 256 (USB disconnected) 1.8 mA

IVBAT
WCDMA PF = 64 (USB disconnected) 17.4 mA

WCDMA PF = 64 (USB connected) 34.3 mA

Idle state
LTE-FDD PF = 64 (USB disconnected) 17.8 mA

LTE-FDD PF = 64 (USB connected) 34.7 mA

WCDMA B2 HSDPA @ 21.64 dBm 547 mA

WCDMA B2 HSUPA @ 21.13 dBm 543 mA

WCDMA data
transfer
WCDMA B4 HSDPA @ 22.15 dBm 554 mA

WCDMA B4 HSUPA @ 22.21 dBm 541 mA

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WCDMA B5 HSDPA @ 22.39 dBm 502 mA

WCDMA B5 HSUPA @ 22.12 dBm 509 mA

LTE-FDD B2 @ 23.07 dBm 691 mA

LTE-FDD B4 @ 23.09 dBm 713 mA

LTE-FDD B5 @ 23.31 dBm 580 mA

LTE data
LTE-FDD B12 @ 23.30 dBm 627 mA
transfer
LTE-FDD B13 @ 23.32 dBm 619 mA

LTE-FDD B25 @ 23.03 dBm 693 mA

LTE-FDD B26 @ 22.97 dBm 628 mA

WCDMA B2 @ 22.89 dBm 591 mA

WCDMA
WCDMA B4 @ 22.76 dBm 577 mA
voice call
WCDMA B5 @ 23.03 dBm 516 mA

Table 36: EG95-NAXD Current Consumption

Parameter Description Conditions Typ. Unit

OFF state Power down 11 μA

AT+CFUN=0 (USB disconnected) 1.1 mA

WCDMA PF = 64 (USB disconnected) 2.0 mA

WCDMA PF = 64 (USB suspend) 2.4 mA

Sleep state WCDMA PF = 512 (USB disconnected) 1.5 mA

IVBAT
LTE-FDD PF = 64 (USB disconnected) 2.6 mA

LTE-FDD PF = 64 (USB suspend) 2.8 mA

LTE-FDD PF = 256 (USB disconnected) 1.8 mA

WCDMA PF = 64 (USB disconnected) 18 mA

Idle state
WCDMA PF = 64 (USB connected) 35 mA

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LTE-FDD PF = 64 (USB disconnected) 18 mA

LTE-FDD PF = 64 (USB connected) 35 mA

WCDMA B2 HSDPA @ 21.64 dBm 547 mA

WCDMA B2 HSUPA @ 21.13 dBm 543 mA

WCDMA B4 HSDPA @ 22.15 dBm 554 mA

WCDMA data
transfer
WCDMA B4 HSUPA @ 22.21 dBm 541 mA

WCDMA B5 HSDPA @ 22.39 dBm 502 mA

WCDMA B5 HSUPA @ 22.12 dBm 509 mA

LTE-FDD B2 @ 23.07 dBm 691 mA

LTE-FDD B4 @ 23.09 dBm 713 mA

LTE-FDD B5 @ 23.31 dBm 580 mA

LTE data
LTE-FDD B12 @ 23.30 dBm 627 mA
transfer
LTE-FDD B13 @ 23.32 dBm 619 mA

LTE-FDD B25 @ 23.03 dBm 693 mA

LTE-FDD B26 @ 22.97 dBm 628 mA

Table 37: EG95-AUX Current Consumption

Parameter Description Conditions Typ. Unit

OFF state Power down 10 μA

AT+CFUN=0 (USB disconnected) 1.0 mA

GSM DRX = 2 (USB disconnected) 1.9 mA

IVBAT GSM DRX = 5 (USB suspend) 1.4 mA

Sleep state
GSM DRX = 9 (USB disconnected) 1.3 mA

WCDMA PF = 64 (USB disconnected) 1.7 mA

WCDMA PF = 64 (USB suspend) 1.9 mA

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WCDMA PF = 512 (USB disconnected) 1.1 mA

LTE-FDD PF = 64 (USB disconnected) 2.2 mA

LTE-FDD PF = 64 (USB suspend) 2.4 mA

LTE-FDD PF = 256 (USB disconnected) 1.5 mA

GSM DRX = 5 (USB disconnected) 15 mA

GSM DRX = 5 (USB connected) 25 mA

WCDMA PF = 64 (USB disconnected) 15 mA

Idle state
WCDMA PF = 64 (USB connected) 25 mA

LTE-FDD PF = 64 (USB disconnected) 16 mA

LTE-FDD PF = 64 (USB connected) 26 mA

GSM850 4DL/1UL @ 32.48 dBm 217.9 mA

GSM850 3DL/2UL @ 31.89dBm 372.3 mA

GSM850 2DL/3UL @ 29.45 dBm 432.9 mA

GSM850 1DL/4UL @ 28.31 dBm 513.9 mA

EGSM900 4DL/1UL @ 33.17 dBm 235.1 mA

EGSM900 3DL/2UL @ 32.16 dBm 387.7 mA

EGSM900 2DL/3UL @ 29.77 dBm 446.5 mA

GPRS data
EGSM900 1DL/4UL @ 28.59 dBm 540.0 mA
transfer
DCS1800 4DL/1UL @ 30.19 dBm 154.4 mA

DCS1800 3DL/2UL @ 29.23 dBm 258.0 mA

DCS1800 2DL/3UL @ 27.19 dBm 332.4 mA

DCS1800 1DL/4UL @ 26.14 dBm 419.1 mA

PCS1900 4DL/1UL @ 30.22 dBm 155.0 mA

PCS1900 3DL/2UL @ 29.48 dBm 259.5 mA

PCS1900 2DL/3UL @ 27.50 dBm 333.1 mA

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PCS1900 1DL/4UL @ 26.44 dBm 416.8 mA

GSM850 4DL/1UL PCL = 8 @ 25.75 dBm 161.8 mA

GSM850 3DL/2UL PCL = 8 @ 25.49 dBm 291.8 mA

GSM850 2DL/3UL PCL = 8 @ 23.26 dBm 410.2 mA

GSM850 1DL/4UL PCL = 8 @ 22.01 dBm 520.5 mA

EGSM900 4DL/1UL PCL = 8 @ 26.04 dBm 161.5 mA

EGSM900 3DL/2UL PCL = 8 @ 25.86 dBm 294.6 mA

EGSM900 2DL/3UL PCL = 8 @ 23.62 dBm 411.4 mA

EGSM900 1DL/4UL PCL = 8 @ 22.27 dBm 520.8 mA

EDGE data
transfer
DCS1800 4DL/1UL PCL = 2 @ 26.12 dBm 139.4 mA

DCS1800 3DL/2UL PCL = 2 @ 25.02 dBm 250.7 mA

DCS1800 2DL/3UL PCL = 2 @ 22.75 dBm 355.3 mA

DCS1800 1DL/4UL PCL = 2 @ 21.47 dBm 452.1 mA

PCS1900 4DL/1UL PCL = 2 @ 26.36 dBm 138.3 mA

PCS1900 3DL/2UL PCL = 2 @ 25.2 dBm 248.2 mA

PCS1900 2DL/3UL PCL = 2 @ 22.94 dBm 351.5 mA

PCS1900 1DL/4UL PCL = 2 @ 21.67 dBm 448.8 mA

WCDMA B1 HSDPA @ 22.30 dBm 609.6 mA

WCDMA B1 HSUPA @ 21.50 dBm 640.5 mA

WCDMA B2 HSDPA @ 22.14 dBm 557.4 mA

WCDMA B2 HSUPA @ 21.18 dBm 539.4 mA

WCDMA data
transfer
WCDMA B5 HSDPA @ 22.6 dBm 588.2 mA

WCDMA B5 HSUPA @ 21.45 dBm 545.2 mA

WCDMA B8 HSDPA @ 21.92 dBm 578.1 mA

WCDMA B8 HSUPA @ 21.93 dBm 592.5 mA

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LTE-FDD B1 @ 22.96 dBm 777.4 mA

LTE-FDD B2 @ 22.79 dBm 634.4 mA

LTE-FDD B3 @ 23.09 dBm 697.9 mA

LTE-FDD B4 @ 22.83 dBm 704.6 mA

LTE data
LTE-FDD B5 @ 23.05 dBm 657.1 mA
transfer
LTE-FDD B7 @ 22.71 dBm 765.3 mA

LTE-FDD B8 @ 22.80 dBm 635.3 mA

LTE-FDD B28 @ 22.84 dBm 670.0 mA

LTE-FDD B66 @ 22.73 dBm 725.9 mA

GSM850 PCL5 @32.57dBm 227.8 mA

EGSM900 PCL5 @33.21dBm 253.8 mA

GSM
voice call
DCS1800 PCL0 @30.24dBm 168.0 mA

PCS1900 PCL0 @30.33dBm 166.8 mA

WCDMA B1 @22.93dBm 656.2 mA

WCDMA B2 @22.95dBm 579.8 mA

WCDMA
voice call
WCDMA B5 @22.54dBm 589.8 mA

WCDMA B8 @22.47dBm 627.8 mA

Table 38: GNSS Current Consumption of EG95 Series Module

Parameter Description Conditions Typ. Unit

Cold start @ Passive Antenna 54 mA

Searching
Hot Start @ Passive Antenna 54 mA
IVBAT (AT+CFUN=0)
(GNSS) Lost state @ Passive Antenna 53 mA

Tracking
Open Sky @ Passive Antenna 32 mA
(AT+CFUN=0)

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6.5. RF Output Power

The following table shows the RF output power of EG95 series module.

Table 39: RF Output Power

Frequency Max. Output Power Min. Output Power

GSM850/EGSM900 33 dBm ±2 dB 5 dBm ±5 dB

DCS1800/PCS1900 30 dBm ±2 dB 0 dBm ±5 dB

GSM850/EGSM900 (8-PSK) 27 dBm ±3 dB 5 dBm ±5 dB

DCS1800/PCS1900 (8-PSK) 26 dBm ±3 dB 0 dBm ±5 dB

WCDMA B1/B2/B4/B5/B8 24 dBm +1/-3 dB < -49 dBm

LTE-FDD B1/B2/B3/B4/B5/B7/
23 dBm ±2 dB < -39 dBm
B8/B12/B13/B20/B25/B26/B28/B66

NOTE

In GPRS 4 slots TX mode, the maximum output power is reduced by 3.0dB. The design conforms to the
GSM specification as described in Chapter 13.16 of 3GPP TS 51.010-1.

6.6. RF Receiving Sensitivity

The following tables show the conducted RF receiving sensitivity of EG95 series module.

Table 40: EG95-E Conducted RF Receiving Sensitivity

Frequency Primary Diversity SIMO 3GPP

EGSM900 -108.6 dBm NA NA -102 dBm

DCS1800 -109.4 dBm NA NA -102 dBm

WCDMA B1 -109.5 dBm -110 dBm -112.5 dBm -106.7 dBm

WCDMA B8 -109.5 dBm -110 dBm -112.5 dBm -103.7 dBm

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LTE-FDD B1 (10 MHz) -97.5 dBm -98.3 dBm -101.4 dBm -96.3 dBm

LTE-FDD B3 (10 MHz) -98.3 dBm -98.5 dBm -101.5 dBm -93.3 dBm

LTE-FDD B7 (10 MHz) -96.3 dBm -98.4 dBm -101.3 dBm -94.3 dBm

LTE-FDD B8 (10 MHz) -97.1 dBm -99.1 dBm -101.2 dBm -93.3 dBm

LTE-FDD B20 (10 MHz) -97 dBm -99 dBm -101.3 dBm -93.3 dBm

LTE-FDD B28A (10 MHz) -98.3 dBm -99 dBm -101.4 dBm -94.8 dBm

Table 41: EG95-NA Conducted RF Receiving Sensitivity

Frequency Primary Diversity SIMO 3GPP

WCDMA B2 -110 dBm -110 dBm -112.5 dBm -104.7 dBm

WCDMA B4 -110 dBm -110 dBm -112.5 dBm -106.7 dBm

WCDMA B5 -111 dBm -111 dBm -113 dBm -104.7 dBm

LTE-FDD B2 (10 MHz) -98 dBm -99 dBm -102.2 dBm -94.3 dBm

LTE-FDD B4 (10 MHz) -97.8 dBm -99.5 dBm -102.2 dBm -96.3 dBm

LTE-FDD B5 (10 MHz) -99.6 dBm -100.3 dBm -103 dBm -94.3 dBm

LTE-FDD B12 (10 MHz) -99.5 dBm -100 dBm -102.5 dBm -93.3 dBm

LTE-FDD B13 (10 MHz) -99.2 dBm -100 dBm -102.5 dBm -93.3 dBm

Table 42: EG95-EX Conducted RF Receiving Sensitivity

Frequency Primary Diversity SIMO 3GPP

EGSM900 -109.8 dBm NA NA -102 dBm

DCS1800 -109.8 dBm NA NA -102dbm

WCDMA B1 -110 dBm -111 dBm -112.5 dBm -106.7 dBm

WCDMA B8 -110 dBm -111 dBm -112.5 dBm -103.7 dBm

LTE-FDD B1 (10 MHz) -98.7 dBm -98.8 dBm -102.4 dBm -96.3 dBm

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LTE-FDD B3 (10 MHz) -98.3 dBm -99.5 dBm -102.5 dBm -93.3 dBm

LTE-FDD B7 (10 MHz) -97.5 dBm -98.4 dBm -100.3 dBm -94.3 dBm

LTE-FDD B8 (10 MHz) -98.7 dBm -99.6 dBm -102.2 dBm -93.3 dBm

LTE-FDD B20 (10 MHz) -97 dBm -97.5 dBm -102.2 dBm -93.3 dBm

LTE-FDD B28 (10 MHz) -98.2 dBm -99.5 dBm -102 dBm -94.8 dBm

Table 43: EG95-NAX Conducted RF Receiving Sensitivity

Frequency Primary Diversity SIMO 3GPP

WCDMA B2 -110 dBm -110 dBm -112.5 dBm -104.7 dBm

WCDMA B4 -110 dBm -110 dBm -112.5 dBm -106.7 dBm

WCDMA B5 -111 dBm -111 dBm -113 dBm -104.7 dBm

LTE-FDD B2 (10 MHz) -98 dBm -99 dBm -102.2 dBm -94.3 dBm

LTE-FDD B4 (10 MHz) -97.8 dBm -99.5 dBm -102.2 dBm -96.3 dBm

LTE-FDD B5 (10 MHz) -99.4 dBm -100 dBm -102.7 dBm -94.3 dBm

LTE-FDD B12 (10 MHz) -99.5 dBm -100 dBm -102.5 dBm -93.3 dBm

LTE-FDD B13 (10 MHz) -99.2 dBm -100 dBm -102.5 dBm -93.3 dBm

LTE-FDD B25 (10 MHz) -97.6 dBm -99 dBm -102.2 dBm -92.8 dBm

LTE-FDD B26 (10 MHz) -99.1 dBm -99.9 dBm -102.7 dBm -93.8 dBm

Table 44: EG95-NAXD Conducted RF Receiving Sensitivity

Frequency Primary Diversity SIMO 3GPP

WCDMA B2 -110 dBm -110 dBm -112.5 dBm -104.7 dBm

WCDMA B4 -110 dBm -110 dBm -112.5 dBm -106.7 dBm

WCDMA B5 -111 dBm -111 dBm -113 dBm -104.7 dBm

LTE-FDD B2 (10 MHz) -98 dBm -99 dBm -102.2 dBm -94.3 dBm

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LTE-FDD B4 (10 MHz) -97.8 dBm -99.5 dBm -102.2 dBm -96.3 dBm

LTE-FDD B5 (10 MHz) -99.4 dBm -100 dBm -102.7 dBm -94.3 dBm

LTE-FDD B12 (10 MHz) -99.5 dBm -100 dBm -102.5 dBm -93.3 dBm

LTE-FDD B13 (10 MHz) -99.2 dBm -100 dBm -102.5 dBm -93.3 dBm

LTE-FDD B25 (10 MHz) -97.6 dBm -99 dBm -102.2 dBm -92.8 dBm

LTE-FDD B26 (10 MHz) -99.1 dBm -99.9 dBm -102.7 dBm -93.8 dBm

Table 45: EG95-AUX Conducted RF Receiving Sensitivity

Frequency Primary Diversity SIMO 3GPP

GSM850 -109.1 dBm NA NA -102 dBm

EGSM900 -109.7 dBm NA NA -102 dBm

DCS1800 -110.0 dBm NA NA -102 dBm

PCS1900 -109.4 dBm NA NA -102 dBm

WCDMA B1 -109.2 dBm -109.5 dBm NA -106.7 dBm

WCDMA B2 -109.8 dBm -111 dBm NA -104.7 dBm

WCDMA B5 -110 dBm -111 dBm NA -104.7 dBm

WCDMA B8 -110 dBm -111 dBm NA -103.7 dBm

LTE-FDD B1 (10 MHz) -97.2 dBm -98.9 dBm -101.2 dBm -96.3 dBm

LTE-FDD B2 (10 MHz) -97.7 dBm -98.9 dBm -101.7 dBm -94.3 dBm

LTE-FDD B3 (10 MHz) -98.2 dBm -99.1 dBm -102.2 dBm -93.3 dBm

LTE-FDD B4 (10 MHz) -97.7 dBm -98.7 dBm -101.2 dBm -96.3 dBm

LTE-FDD B5 (10 MHz) -99.2 dBm -99.7 dBm -102.7 dBm -94.3 dBm

LTE-FDD B7 (10 MHz) -96.7 dBm -97.1 dBm -99.7 dBm -94.3 dBm

LTE-FDD B8 (10 MHz) -98.0 dBm -98.4 dBm -102.2 dBm -93.3 dBm

LTE-FDD B28 (10 MHz) -98.7 dBm -98.5 dBm -101.7 dBm -94.8 dBm

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LTE-FDD B66 (10 MHz) -97.7 dBm -98.8 dBm -101.2 dBm -95.8 dBm

6.7. Electrostatic Discharge

The module is not protected against electrostatic discharge (ESD) in general. Consequently, it is subject
to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and
packaging procedures must be applied throughout the processing, handling and operation of any
application that incorporates the module.

The following table shows the module’s electrostatic discharge characteristics.

Table 46: Electrostatic Discharge Characteristics (25 ºC, 45 % Relative Humidity)

Tested Interfaces Contact Discharge Air Discharge Unit

VBAT, GND ±5 ±10 kV

All Antenna Interfaces ±4 ±8 kV

Other Interfaces ±0.5 ±1 kV

6.8. Thermal Consideration

In order to achieve better performance of the module, it is recommended to comply with the following
principles for thermal consideration:

 On your PCB design, please keep placement of the module away from heating sources, especially
high power components such as ARM processor, audio power amplifier, power supply, etc.
 Do not place components on the opposite side of the PCB area where the module is mounted, in order
to facilitate adding of heatsink when necessary.
 Do not apply solder mask on the opposite side of the PCB area where the module is mounted, so as
to ensure better heat dissipation performance.
 The reference ground of the area where the module is mounted should be complete, and add ground
vias as many as possible for better heat dissipation.
 Make sure the ground pads of the module and PCB are fully connected.
 According to your application demands, the heatsink can be mounted on the top of the module, or the
opposite side of the PCB area where the module is mounted, or both of them.

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 The heatsink should be designed with as many fins as possible to increase heat dissipation area.
Meanwhile, a thermal pad with high thermal conductivity should be used between the heatsink and
module/PCB.

The following shows two kinds of heatsink designs for reference and you can choose one or both of them
according to their application structure.

Module Heatsink Heatsink

Thermal Pad
Shielding Cover
Application Board Application Board

Figure 39: Referenced Heatsink Design (Heatsink at the Top of the Module)

Thermal Pad
Thermal Pad
Module
Heatsink

Heatsink
Application Board
Shielding Cover Application Board

Figure 40: Referenced Heatsink Design (Heatsink at the Backside of Customers’ PCB)

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NOTE

The module offers the best performance when the internal BB chip stays below 105°C. When the
maximum temperature of the BB chip reaches or exceeds 105°C, the module works normal but provides
reduced performance (such as RF output power, data rate, etc.). When the maximum BB chip
temperature reaches or exceeds 115°C, the module will disconnect from the network, and it will recover
to network connected state after the maximum temperature falls below 115°C. Therefore, the thermal
design should be maximally optimized to make sure the maximum BB chip temperature always maintains
below 105 °C. You can execute AT+QTEMP and get the maximum BB chip temperature from the first
returned value.

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7 Mechanical Dimensions
This chapter describes the mechanical dimensions of the module. All dimensions are measured in
millimeter (mm), and the dimensional tolerances are ±0.05 mm unless otherwise specified.

7.1. Mechanical Dimensions of the Module

25±0.15 2.30±0.2
Pin 1
29±0.15

Figure 41: Module Top and Side Dimensions

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Figure 42: EG95-E Bottom Dimensions (Top View)

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Figure 43: EG95-NA/-EX/-NAX/-NAXD/-AUX Bottom Dimensions (Top View)

NOTE

The package warpage level of the module conforms to JEITA ED-7306 standard.

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7.2. Recommended Footprint

Figure 44: Recommended Footprint (Top View)

NOTE

For easy maintenance of this module, please keep about 3 mm between the module and other
components on the motherboard.

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7.3. Top and Bottom Views of the Module

Figure 45: Top View of the Module

Figure 46: EG95-E Bottom View

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Figure 47: EG95-NA/-EX/-NAX/-NAXD/-AUX Bottom View

NOTE

Images above are for illustration purpose only and may differ from the actual module. For authentic
appearance and label, please refer to the module received from Quectel.

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8 Storage, Manufacturing and

Packaging

8.1. Storage

The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage
requirements are shown below.

1. Recommended Storage Condition: The temperature should be 23 ±5 °C and the relative humidity
should be 35–60 %.

2. The storage life (in vacuum-sealed packaging) is 12 months in Recommended Storage Condition.

3. The floor life of the module is 168 hours 1) in a plant where the temperature is 23 ±5 °C and relative
humidity is below 60 %. After the vacuum-sealed packaging is removed, the module must be
processed in reflow soldering or other high-temperature operations within 168 hours. Otherwise, the
module should be stored in an environment where the relative humidity is less than 10 % (e.g. a
drying cabinet).

4. The module should be pre-baked to avoid blistering, cracks and inner-layer separation in PCB under
the following circumstances:

 The module is not stored in Recommended Storage Condition;

 Violation of the third requirement above occurs;
 Vacuum-sealed packaging is broken, or the packaging has been removed for over 24 hours;
 Before module repairing.

5. If needed, the pre-baking should follow the requirements below:

 The module should be baked for 8 hours at 120 ±5 °C;

 All modules must be soldered to PCB within 24 hours after the baking, otherwise they should be
put in a dry environment such as in a drying oven.

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NOTES

1. 1) This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033.
2. To avoid blistering, layer separation and other soldering issues, it is forbidden to expose the modules
to the air for a long time. If the temperature and moisture do not conform to IPC/JEDEC J-STD-033 or
the relative moisture is over 60 %, It is recommended to start the solder reflow process within 24 hours
after the package is removed. And do not remove the packages of tremendous modules if they are not
ready for soldering.
3. Please take the module out of the packaging and put it on high-temperature resistant fixtures before
the baking. If shorter baking time is desired, see IPC/JEDEC J-STD-033 for baking procedure.

8.2. Manufacturing and Soldering

Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil
openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to
produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of
stencil for the module is recommended to be 0.13–0.15 mm. For more details, see document [8].

It is suggested that the peak reflow temperature is 238–246 ºC, and the absolute maximum reflow
temperature is 246 ºC. To avoid damage to the module caused by repeated heating, it is strongly
recommended that the module should be mounted after reflow soldering for the other side of PCB has
been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and
related parameters are shown below.

Temp. (°C)
Reflow Zone
Max slope: Cooling down slope:
2 to 3°C/s C -1.5 to -3°C/s
246
238
220
B D
200
Soak Zone

150 A

100
Max slope: 1 to 3°C/s

Figure 48: Recommended Reflow Soldering Thermal Profile

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Table 47: Recommended Thermal Profile Parameters

Factor Recommendation

Soak Zone

Max. slope 1–3 °C/s

Soak time (between A and B: 150 °C and 200 °C) 70–120 s

Reflow Zone

Max. slope 2–3 °C/s

Reflow time (D: over 220°C) 45–70 s

Max. temperature 238 °C to 246 °C

Cooling down slope -1.5 to -3 °C/s

Reflow Cycle

Max. reflow cycle 1

NOTE

If a conformal coating is necessary for the module, do NOT use any coating material that may chemically
react with the PCB or shielding cover, and prevent the coating material from flowing into the module.

8.3. Packaging

EG95 series module is packaged in a vacuum-sealed bag which is ESD protected. The bag should not be
opened until the devices are ready to be soldered onto the application.

The reel is 330 mm in diameter and each reel contains 250 pcs modules. The following figures show the
packaging details, measured in mm.

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Figure 49: Tape Specifications

48.5

Cover tape

13

Direction of feed
100

44.5+0.20
-0.00

Figure 50: Reel Specifications

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1083

Carrier tape Carrier tape

packing module unfolding

Figure 51: Tape and Reel Directions

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9 Appendix A References

Table 48: Related Documents

SN Document Name Remark

UMTS&LTE EVB user guide for

[1] Quectel_UMTS&LTE_EVB_User_Guide
UMTS&LTE modules
Power management application note for
Quectel_EC2x&EG9x_Power_Management_
[2] EC25 series, EC21 series, EC20 R2.1,
Application_Note
EG95 series and EG91 series
AT commands manual for EG95 series
[3] Quectel_EG9x_AT_Commands_Manual
and EG91 series
GNSS application note for EC25 series,
Quectel_EC2x&EG9x&EG2x-G&EM05_Series_ EC21 series, EC20 R2.1, EG95 series,
[4]
GNSS_Application_Note EG91 series, EG21-G, EG25-G and
EM05 series
Quectel_LTE_Standrad_QCFG_AT_Commands_
[5] QCFG AT commands manual
Manual

[6] Quectel_RF_Layout_Application_Note RF layout application note

Thermal design guide for LTE standard,

[7] Quectel_LTE_Module_Thermal_Design_Guide
LTE-A and Automotive modules

[8] Quectel_Module_Secondary_SMT_User_Guide Module secondary SMT user guide

Table 49: Terms and Abbreviations

Abbreviation Description

AMR Adaptive Multi-rate

bps Bits Per Second

CHAP Challenge Handshake Authentication Protocol

CS Coding Scheme

CSD Circuit Switched Data

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CTS Clear To Send

DC-HSPA+ Dual-carrier High Speed Packet Access

DFOTA Delta Firmware Upgrade Over The Air

DL Downlink

DTR Data Terminal Ready

DTX Discontinuous Transmission

EFR Enhanced Full Rate

ESD Electrostatic Discharge

FDD Frequency Division Duplex

FR Full Rate

GLObalnaya NAvigatsionnaya Sputnikovaya Sistema, the Russian Global

GLONASS
Navigation Satellite System

GMSK Gaussian Minimum Shift Keying

GNSS Global Navigation Satellite System

GPS Global Positioning System

GSM Global System for Mobile Communications

HR Half Rate

HSPA High Speed Packet Access

HSDPA High Speed Downlink Packet Access

HSUPA High Speed Uplink Packet Access

I/O Input/Output

Inorm Normal Current

LED Light Emitting Diode

LNA Low Noise Amplifier

LTE Long Term Evolution

MIMO Multiple Input Multiple Output

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MO Mobile Originated

MS Mobile Station (GSM engine)

MSL Moisture Sensitivity Level

MT Mobile Terminated

PAP Password Authentication Protocol

PCB Printed Circuit Board

PDU Protocol Data Unit

PPP Point-to-Point Protocol

QAM Quadrature Amplitude Modulation

QPSK Quadrature Phase Shift Keying

RF Radio Frequency

RHCP Right Hand Circularly Polarized

Rx Receive

SMS Short Message Service

TDD Time Division Duplexing

TX Transmitting Direction

UL Uplink

UMTS Universal Mobile Telecommunications System

URC Unsolicited Result Code

(U)SIM (Universal) Subscriber Identity Module

Vmax Maximum Voltage Value

Vnorm Normal Voltage Value

Vmin Minimum Voltage Value

VIHmax Maximum Input High Level Voltage Value

VIHmin Minimum Input High Level Voltage Value

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VILmax Maximum Input Low Level Voltage Value

VILmin Minimum Input Low Level Voltage Value

VImax Absolute Maximum Input Voltage Value

VImin Absolute Minimum Input Voltage Value

VOHin Minimum Output High Level Voltage Value

VOLmax Maximum Output Low Level Voltage Value

VOLmin Minimum Output Low Level Voltage Value

VSWR Voltage Standing Wave Ratio

WCDMA Wideband Code Division Multiple Access

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10 Appendix B GPRS Coding Schemes

Table 50: Description of Different Coding Schemes

Scheme CS-1 CS-2 CS-3 CS-4

Code Rate 1/2 2/3 3/4 1

USF 3 3 3 3

Pre-coded USF 3 6 6 12

Radio Block excl. USF and BCS 181 268 312 428

BCS 40 16 16 16

Tail 4 4 4 -

Coded Bits 456 588 676 456

Punctured Bits 0 132 220 -

Data Rate kbit/s 9.05 13.4 15.6 21.4

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11 Appendix C GPRS Multi-slot Classes

Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot
classes are product dependent, and determine the maximum achievable data rates in both the uplink and
downlink directions. Written as 3 + 1 or 2 + 2, the first number indicates the amount of downlink timeslots,
while the second number indicates the amount of uplink timeslots. The active slots determine the total
number of slots the GPRS device can use simultaneously for both uplink and downlink communications.

The description of different multi-slot classes is shown in the following table.

Table 51: GPRS Multi-slot Classes

Multi-slot Class Downlink Slots Uplink Slots Active Slots

1 1 1 2

2 2 1 3

3 2 2 3

4 3 1 4

5 2 2 4

6 3 2 4

7 3 3 4

8 4 1 5

9 3 2 5

10 4 2 5

11 4 3 5

12 4 4 5

13 3 3 NA

14 4 4 NA

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15 5 5 NA

16 6 6 NA

17 7 7 NA

18 8 8 NA

19 6 2 NA

20 6 3 NA

21 6 4 NA

22 6 4 NA

23 6 6 NA

24 8 2 NA

25 8 3 NA

26 8 4 NA

27 8 4 NA

28 8 6 NA

29 8 8 NA

30 5 1 6

31 5 2 6

32 5 3 6

33 5 4 6

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12 Appendix D EDGE Modulation and

Coding Schemes

Table 52: EDGE Modulation and Coding Schemes

Coding Scheme Modulation Coding Family 1 Timeslot 2 Timeslots 4 Timeslots

MCS-1 GMSK C 8.80 kbps 17.60 kbps 35.20 kbps

MCS-2 GMSK B 11.2 kbps 22.4 kbps 44.8 kbps

MCS-3 GMSK A 14.8 kbps 29.6 kbps 59.2 kbps

MCS-4 GMSK C 17.6 kbps 35.2 kbps 70.4 kbps

MCS-5 8-PSK B 22.4 kbps 44.8 kbps 89.6 kbps

MCS-6 8-PSK A 29.6 kbps 59.2 kbps 118.4 kbps

MCS-7 8-PSK B 44.8 kbps 89.6 kbps 179.2 kbps

MCS-8 8-PSK A 54.4 kbps 108.8 kbps 217.6 kbps

MCS-9 8-PSK A 59.2 kbps 118.4 kbps 236.8 kbps

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