ERROR DETECTION AND

ERROR CORRECTION

PARITY

 Parity Bit
 The Parity Generating Technique Is One Of The Most Widely Used Error Detection Techniques
For The Data Transmission. In Digital Systems, When Binary Data Is Transmitted And Processed,
Data May Be Subjected To Noise So That Such Noise Can Alter 0s (Of Data Bits) To 1s And
1s To 0s.

 The message, including the parity bit, is transmitted and then checked at the receiving end
for errors.

 An error is detected if the checked parity does not correspond to the one transmitted.

 At The Receiving End, The Number Of 1s In The Message Is Counted And If It Doesn’t Match
With The Transmitted One, Then It Means There Is An Error In The Data.

 Parity systems are defined as either odd parity or even parity.

 The parity system adds an extra bit to the digital information being transmitted.
E.g.: 4-bit system requires a 5-th bit,
8-bit system will require a 9-th bit, …

 The parity bit will be a 1 or 0, depending on what the other bits are. E.g. (4-bit system)

 Odd-parity system - the parity bit that is added must make the sum of all 5 bits odd
(OR the total number of 1s in the entire message bit with parity bit will be odd)
 Even-parity system - the parity bit makes the sum of all 5 bits even
(OR the total number of 1s in the entire message bit with parity bit will be odd)

NOTE: Final Message = Message Bit + Parity Bit

 Parity Generator And Parity Checker

 PARITY GENERATOR

 It is combinational circuit that accepts an n-1 bit stream data and

generates the additional bit that is to be transmitted with the bit stream.
This additional or extra bit is termed as a parity bit.

 In even parity bit scheme, the parity bit is ‘0’ if there are even number of
1s in the data stream and the parity bit is ‘1’ if there are odd number of
1s in the data stream.

 In odd parity bit scheme, the parity bit is ‘1’ if there are even number of
1s in the data stream and the parity bit is ‘0’ if there are odd number of
1s in the data stream.
Let us discuss both even and odd parity generators:

 PARITY CHECKER

 It is a logic circuit that checks for possible errors in the transmission. This
circuit can be an even parity checker or odd parity checker depending
on the type of parity generated at the transmission end. When this circuit
is used as even parity checker, the number of input bits must always be
even.

 When a parity error occurs, the ‘sum even’ output goes low and ‘sum odd’
output goes high. If this logic circuit is used as an odd parity checker, the
number of input bits should be odd, but if an error occurs the ‘sum odd’
output goes low and ‘sum even’ output goes high

1.1 ODD PARITY ( GENERATOR)

Let us consider that the 3-bit data is to be transmitted with an odd parity bit. The three
inputs are A, B and C and P is the output parity bit.

The total number of bits must be odd in order to generate the odd parity bit.

In the given truth table below, 1 is placed in the parity bit in order to make the total
number of bits odd when the total number of 1s in the truth table is even.

3-Bit Message Odd Parity Bit

Generator(P)
A B C P

0 0 0 1

0 0 1 0

0 1 0 0

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 0
On simplification using K-Map it can be seen

BC
00 01 11 10
A

0 1 0 1 0

1 0 1 0 1

The output parity bit expression for this generator circuit is obtained as

P= (A ⨁ B)⨀C

THE LOGIC CIRCUIT FOR ODD PARITY GENERATOR IS::

 1.2 ODD PARITY ( CHECKER)
Consider that a three bit message along with odd parity bit is transmitted at the transmitting end.
Odd parity checker circuit receives these 4 bits and checks whether any error are present in the data.

If the total number of 1s in the data is odd, then it indicates no error,

whereas if the total number of 1s is even then it indicates the error since the data is transmitted
with odd parity at transmitting end.
The below figure shows the truth table for odd parity generator where Parity Error Check(PEC) =1 if
the 4-bit message received consists of even number of 1s (hence the error occurred) and PEC= 0 if
the message contains odd number of 1s (that means no error).

4 Bit Received Message Parity Error

A B C P Check
Ce
0 0 0 0 1
0 0 0 1 0
0 0 1 0 0
0 0 1 1 1
0 1 0 0 0
0 1 0 1 1
0 1 1 0 1
0 1 1 1 0
1 0 0 0 0
1 0 0 1 1
1 0 1 0 1
1 0 1 1 0
1 1 0 0 1
1 1 0 1 0
1 1 1 0 0
1 1 1 1 1
 The expression for the Parity Error Checker in the above truth table can be
simplified by K-map as shown below.

CP
AB 00 01 11 10

00 1 0 1 0

01 0 1 0 1

11 1 0 1 0

10 0 1 0 1

After simplification, the final expression for the PEC (Cp) is obtained as

Ce = (A ⨁ B) ⨀ (C ⨁ D)

OR

Ce = (A ⨀ B) ⨀ (C ⨀ D)
THE LOGIC CIRCUIT FOR ODD PARITY CHECKER ARE::

OR
 2.1 EVEN PARITY ( GENERATOR)
Let us assume that a 3-bit message is to be transmitted with an even parity bit. Let
the three inputs A, B and C are applied to the circuits and output bit is the parity bit P.
The total number of 1s must be even, to generate the even parity bit P.

The table below shows the truth table of even parity generator in which 1 is placed as
parity bit in order to make all 1s as even when the number of 1s in the truth table is
odd.

3-Bit Message Even Parity Bit

Generator(P)
A B C P

0 0 0 0

0 0 1 1

0 1 0 1

0 1 1 0

1 0 0 1

1 0 1 0

1 1 0 0

1 1 1 1
On simplification using K-Map it can be seen

BC
00 01 11 10
A

0 0 1 0 1

1 1 0 1 0

The output parity bit expression for this generator circuit is obtained as

P= (A ⨁ B) ⨁ C

THE LOGIC CIRCUIT FOR EVEN PARITY GENERATOR IS::

 2.2 EVEN PARITY ( CHECKER)
Consider that a three bit message along with even parity bit is transmitted at the transmitting end.
Even parity checker circuit receives these 4 bits and checks whether any error are present in the data.

If the total number of 1s in the data is even, then it indicates no error,

Where as if the total number of 1s is odd then it indicates the error since the data is transmitted
with even parity at transmitting end.
The below figure shows the truth table for even parity generator where Parity Error Check(PEC) =0 if
the 4-bit message received consists of even number of 1s (hence no error occurred) and PEC= 1 if
the message contains odd number of 1s (that means error).

4 Bit Received Message Parity Error

A B C P Check
Ce
0 0 0 0 0
0 0 0 1 1
0 0 1 0 1
0 0 1 1 0
0 1 0 0 1
0 1 0 1 0
0 1 1 0 0
0 1 1 1 1
1 0 0 0 1
1 0 0 1 0
1 0 1 0 0
1 0 1 1 1
1 1 0 0 0
1 1 0 1 1
1 1 1 0 1
1 1 1 1 0
The expression for the Parity Error Checker in the above truth table can be
simplified by K-map as shown below.

CP
AB 00 01 11 10

00 0 1 0 1

01 1 0 1 0

11 0 1 0 1

10 1 0 1 0

After simplification, the final expression for the PEC (Cp) is obtained as

Ce = (A ⨁ B) ⨁ (C ⨁ D)
THE LOGIC CIRCUIT FOR EVEN PARITY CHECKER IS::

After the parity checker has detected that the received message
was erroneous, it asks the sender to resend the message, and
the process repeats till the receiver gets the correct message
 HAMMING CODE
What is Hamming Code?

Hamming code is a set of error-correction codes that can be used to detect and
correct the errors that can occur when the data is moved or stored from the
sender to the receiver. It is technique developed by R.W. Hamming for error
correction.

In a Hamming code, To a given length of message bits a certain number of parity

bits are added at 2n positions according to the relation:

2k ≥ m+k+1 ----------- 1

Where,

m  no. of message bits

k  no. of parity bits

E.g. 1

Let us assume a 4-bit message.

So , according to eqn 1:
m=4.
Therefore, m+1 =5.
So, by trial and error method, if k=3, then,
23=8 (L.H.S) and
m+3+1= 8 (R.H.S) ,
which satisfies the equation.
So , a 4-bit message will have 3 parity bits and so, a 7-bit hamming code.
E.g. 2

Let us assume a 8-bit message.

So , according to eqn 1:
m=8.
Therefore, m+1 =9.
So, by trial and error method, if k=4, then,
24=16 (L.H.S) and
m+3+1= 13 (R.H.S) ,
which satisfies the equation.
So , a 8-bit message will have 4 parity bits and so, a 12-bit hamming code.

ALGORITHM TO GENERATE A HAMMING CODE:

Let us demonstrate the algorithm with an example.

Suppose the sender sends a message bit of 8-bit length as follows:
01001101

STEP1: Find the number of parity bits using the formula 2k ≥ m+k+1
STEP2: Write the bits in form of P( parity bits) and m (message bits). The parity bits
occupy positions at 2n (i.e. 0,1,2,4,8,16………..). The message bits occupy all other
postions except 2n.
P1 P2 M3 P4 M5 M6 M7 P8 M9 M10 M11 M12
0 1 0 0 1 1 0 1

STEP3: Finding the parity bits:

First. We create a reference chart that corresponds to the number of bits required to
represent the hamming code. ( 12 bit code requires 4-bit representation)
1 2 3 4 5 6 7 8 9 10 11 12
P8 0 0 0 0 0 0 0 1 1 1 1 1
P4 0 0 0 1 1 1 1 0 0 0 0 1
P2 0 1 1 0 0 1 1 0 0 1 1 0
P1 1 0 1 0 1 0 1 0 1 0 1 0
Then,
We proceed to find the parity bit P1 .
For P1, we start our approach from the 2nd position (i.e. M2).
We take in consideration the positions that have high (1) on that particular row.

1 2 3 4 5 6 7 8 9 10 11 12
P8 0 0 0 0 0 0 0 1 1 1 1 1
P4 0 0 0 1 1 1 1 0 0 0 0 1
P2 0 1 1 0 0 1 1 0 0 1 1 0
P1 1 0 1 0 1 0 1 0 1 0 1 0

The concerned parity bit and positions are highlighted in the table above for
better understanding.

Now, We apply XOR function on the selected positions

P1 = M3 ⨁ M5 ⨁ M7 ⨁ M9 ⨁ M11
The Values of M3 , M5 , M7 , M9 , M11 are obtained from the message bit
originally given to us.

P1 P2 M3 P4 M5 M6 M7 P8 M9 M10 M11 M12

0 1 0 0 1 1 0 1

So, accordingly,
P1 = 0 ⨁ 1 ⨁0 ⨁ 1 ⨁ 0

P1=0

Similarly we find the other parity bits,

For P2, we start our approach from the 3rd position (i.e. M3).
We take in consideration the positions that have high (1) on that particular row.

1 2 3 4 5 6 7 8 9 10 11 12
P8 0 0 0 0 0 0 0 1 1 1 1 1
P4 0 0 0 1 1 1 1 0 0 0 0 1
P2 0 1 1 0 0 1 1 0 0 1 1 0
P1 1 0 1 0 1 0 1 0 1 0 1 0

Now, We apply XOR function on the selected positions

P2 = M3 ⨁ M6 ⨁ M7 ⨁ M10 ⨁ M11
The Values of M3 , M6 , M7 , M10 , M11 are obtained from the message bit
originally given to us.

P1 P2 M3 P4 M5 M6 M7 P8 M9 M10 M11 M12

0 0 1 0 0 1 1 0 1

So, accordingly,
P2 = 0 ⨁ 0 ⨁0 ⨁ 1 ⨁ 0

P2=1
For P4, we start our approach from the 5rd position (i.e. M3).
We take in consideration the positions that have high (1) on that particular row.

1 2 3 4 5 6 7 8 9 10 11 12
P8 0 0 0 0 0 0 0 1 1 1 1 1
P4 0 0 0 1 1 1 1 0 0 0 0 1
P2 0 1 1 0 0 1 1 0 0 1 1 0
P1 1 0 1 0 1 0 1 0 1 0 1 0

Now, We apply XOR function on the selected positions

P4 = M5 ⨁ M6 ⨁ M7 ⨁ M12
The Values of M3 , M5 , M7 , M9 , M11 are obtained from the message bit
originally given to us.

P1 P2 M3 P4 M5 M6 M7 P8 M9 M10 M11 M12

0 1 0 1 0 0 1 1 0 1

So, accordingly,
P4 = 1 ⨁ 0 ⨁0 ⨁ 1

P4=0
For P8, we start our approach from the 9th position (i.e. M9).
We take in consideration the positions that have high (1) on that particular row.

1 2 3 4 5 6 7 8 9 10 11 12
P8 0 0 0 0 0 0 0 1 1 1 1 1
P4 0 0 0 1 1 1 1 0 0 0 0 1
P2 0 1 1 0 0 1 1 0 0 1 1 0
P1 1 0 1 0 1 0 1 0 1 0 1 0

Now, We apply XOR function on the selected positions

P8 = M9 ⨁ M10 ⨁ M11 ⨁ M12

The Values of M3 , M5 , M7 , M9 , M11 are obtained from the message bit
originally given to us.

P1 P2 M3 P4 M5 M6 M7 P8 M9 M10 M11 M12

0 1 0 0 1 0 0 1 1 0 1

So, accordingly,
P8 = 1 ⨁ 1 ⨁0 ⨁ 1

P8=1

So, therefore the generated 12-bit Hamming code is now:

P1 P2 M3 P4 M5 M6 M7 P8 M9 M10 M11 M12

0 1 0 0 1 0 0 1 1 1 0 1
DETERMINING ERRORS IN A RECEIVED HAMMING CODE:

Taking the previous example of the 8-bit message, Let us see how errors are
detected.

The Given 8-bit Message was 01001101

The Generated 12-bit Hamming Code was 010010011101

Suppose, due to some noise, the receiver received an erroneous message of

010010111101.
Notice anything different? The seventh bit is erroneous. Great!.
Now how will the receiver machine understand that there is an error?
Let us see.

The receiver machine uses checker variables at 2n positions to determine the error.

These are generally referred to as C8,C4,C2,C1 .

Each individual position yields a single-bit output and the combined output gives the
position of the erroneous bit.

The checker implements a similar algorithm that is used to generate the parity bits in the
sender’s end.

THE DIFFERENCE?
Remember how we used to ignore a few previous positions corresponding to the P n .
We don’t do that here. Let us see how it works.

The Hamming code was:

P1 P2 M3 P4 M5 M6 M7 P8 M9 M10 M11 M12
0 1 0 0 1 0 0 1 1 1 0 1

As usual we draw up the reference chart. (NOTE: If you already have the chart in handy,
no need to write again).
 1 2 3 4 5 6 7 8 9 10 11 12
P8 0 0 0 0 0 0 0 1 1 1 1 1
P4 0 0 0 1 1 1 1 0 0 0 0 1
P2 0 1 1 0 0 1 1 0 0 1 1 0
P1 1 0 1 0 1 0 1 0 1 0 1 0

FOR C1

We take in consideration the positions that have high (1) on that particular row.

1 2 3 4 5 6 7 8 9 10 11 12
P8 0 0 0 0 0 0 0 1 1 1 1 1
P4 0 0 0 1 1 1 1 0 0 0 0 1
P2 0 1 1 0 0 1 1 0 0 1 1 0
P1 1 0 1 0 1 0 1 0 1 0 1 0

Therefore,

C1 = P1 ⨁ M3 ⨁ M5 ⨁ M7 ⨁ M9 ⨁ M11
C1 = 0 ⨁ 0 ⨁ 1 ⨁ 1 ⨁ 1 ⨁ 0

C1= 1

NOTE:: Remember. The values are taken from the code given in the question

Similarly,

FOR C2
We take in consideration the positions that have high (1) on that particular row.

1 2 3 4 5 6 7 8 9 10 11 12
P8 0 0 0 0 0 0 0 1 1 1 1 1
P4 0 0 0 1 1 1 1 0 0 0 0 1
P2 0 1 1 0 0 1 1 0 0 1 1 0
P1 1 0 1 0 1 0 1 0 1 0 1 0

Therefore,

C2 = P2 ⨁ M3 ⨁ M6 ⨁ M7 ⨁ M10 ⨁ M11
C2 = 1 ⨁ 0 ⨁ 0 ⨁ 1 ⨁ 1 ⨁ 0

C2= 1

FOR C4
We take in consideration the positions that have high (1) on that particular row.

1 2 3 4 5 6 7 8 9 10 11 12
P8 0 0 0 0 0 0 0 1 1 1 1 1
P4 0 0 0 1 1 1 1 0 0 0 0 1
P2 0 1 1 0 0 1 1 0 0 1 1 0
P1 1 0 1 0 1 0 1 0 1 0 1 0

Therefore,

C4 = P4 ⨁ M5 ⨁ M6 ⨁ M7 ⨁ M12
C4 = 0 ⨁ 1 ⨁ 0 ⨁ 1 ⨁ 1

C4= 1

FOR C8
 We take in consideration the positions that have high (1) on that particular row.

1 2 3 4 5 6 7 8 9 10 11 12
P8 0 0 0 0 0 0 0 1 1 1 1 1
P4 0 0 0 1 1 1 1 0 0 0 0 1
P2 0 1 1 0 0 1 1 0 0 1 1 0
P1 1 0 1 0 1 0 1 0 1 0 1 0

Therefore,

C8 = P8 ⨁ M9 ⨁ M10 ⨁ M11 ⨁ M12

C8 = 1 ⨁ 1 ⨁ 1 ⨁ 0 ⨁ 1

C8= 0

So, if we see the outputs of C8,C4,C2,C1,

C8 C4 C2 C1
0 1 1 1
As we can see, the receiver machine gave an output of 0111. On conversion to
decimal number system we find
(0111)2  (7)10

Thus it indicates that the 7th bit is erroneous. The receiver then automatically
corrects the erroneous bit (i.e. converts the erroneous bit to the inverted correct bit)

THE END