5/31/2019 Bài Thi Cuối Kỳ Môn Kiến Trúc Máy Tính và Hợp Ngữ
Thi Online KTMT&HN nhóm lẻ
Started on Friday, 31 May 2019, 1:11 PM
State Finished
Completed on Friday, 31 May 2019, 2:21 PM
Time taken 1 hour 9 mins
Question 1 In multiplication instruction, the upper half of the result is nonzero implies which state of Carry flag and
Complete Overflow flag?
Marked out of
Select one or more:
0.50
OF=1
CF=1
OF=0
CF=0
Question 2 Which is correct about dual-layer DVD?
Complete
Select one:
Marked out of
1.00 the same as double-sided DVD
contains layers on both sides of the disk for writing data to
contains two layers on a single side for writing data to
DVD drives has double laser head for reading from or writing to this disk
Question 3 For better speed, in CPU design, engineers make use of the following techniques:
Complete
Select one or more:
Marked out of
1.00 Pipelining
Branch prediction
Faster CPU internal bus
Speculative execution
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Question 4 Consider the following assembly instruction sequence
Complete XOR BX, BX
Marked out of CMP DL, 5
1.00 JLE a_label
CMP DL,17h
JGE a_label
MOV BX, 10h
a_label:
INC BX
watch point:
...
Choose correct value of BX register at watch point for different value of DL?
DL=0Ah 01h
DL=0FFh 11h
DL=10 01h
DL=17h 11h
Question 5 Consider a 16-bit microprocessor, with a 16-bit external data bus, driven by an 10-MHz input clock.
Complete Assume that this microprocessor has a bus cycle whose minimum duration equals four input clock cycles.
What is the maximum data transfer rate across the bus that this microprocessor can sustain?
Marked out of
1.00
Select one:
4 MB/s
1 MB/s
5 MB/s
10 MB/s
Question 6 Select correct definition of seek time, rotational delay, access time, transfer time for hard drives with
Complete moveable-head system:
Marked out of
1.00 rotational delay time for the sector in the request track to reach the head
seek time time for the head to settle at the request track
access time access time + settle time
Question 7 Which are the correct actions for LODSW string operation if DF is reset (=0)
Complete
Select one or more:
Marked out of
0.50 decrease DI by 2
Load 16-bit value at memory location pointed by ES:[DI] into AX
Load 16-bit value at memory location pointed by DS:[SI] into AX
increase SI by 2
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Question 8 In computer organization, the CPU transfer rate is much higher than that of memory. It is easy to match
Complete performance of these components by:
Marked out of
Select one:
1.00
increase the bus speed
producing faster memory module
Introducing cache memory
increase I/O speed
Question 9 For memory hierarchy below, which relationship hold when moving downward
Complete
Marked out of
1.00
Select one or more:
Decreasing cost per bit
the processor accesses more often
Increasing access time
Decreasing frequency of access by the processor
Increasing capacity
Question 10 Which of the following instructions are not valid?
Complete
Select one or more:
Marked out of
0.50 MOV DS, B800h
MOV AX, SI
MOV AX, [BP+2]
MOV SP, SS:[SI+2]
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Question 11 Sign-extend number 1011 0101 (8-bit binary) to 16-bit
Complete
Marked out of Answer: 1111 1111 1011 0101
0.50
Question 12 The principle of cache memory relies on key features: locality of reference which involves spatial and
Complete temporal locality. Match the definition to keywords on the left
Marked out of
Temporal
1.00 the tendency for a processor to access memory locations that have been used recently
locality
Spatial the tendency of execution to involve a number of memory locations that are clustered
locality
tendency to use large cache and prefetch mechanism
Question 13 Which ones are not correct for static RAM?
Complete
Select one or more:
Marked out of
1.00 faster than dynamic RAM because they are made from capacitor
Cheaper than dynamic RAM because simpler chip controller
Cost per bit is higher than dynamic RAM
Cost per bit is lower than dynamic RAM
Question 14 Which of the following instructions are not legal addressing?
Complete
Select one or more:
Marked out of
1.00 MOV AX, [DI]
MOV CX, [SI]
MOV AX, [BX+SP]
MOV AX, [SP+1]
Question 15 Structural components of computer include:
Complete
Select one or more:
Marked out of
1.00 I/O
DMA
System interconnection
Interrupt
Central processing unit
Memory
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Question 16 A memory chip has 12 address pins, determine the maximum memory words of this chip?
Complete
Select one:
Marked out of
1.00 4096
2048
2048K
4000
Question 17 Consider a magnetic disk drive with 8 surfaces, 512 tracks per surface, and 64 sectors per track. Sector
Complete size is 1 kB. What is the disk capacity
Marked out of
1.00 Answer: 262144 KB
Question 18 Choose correct features for SRAM and DRAM
Complete
Marked out of SRAM Faster access time, cost more per bit, smaller size
1.00
DRAM Slower access time, cheaper cost per bit, can manufacture with larger size
Question 19 The following sequence of instructions are executed. What is the correct value of AX, CX, DX at watch
Complete point?
Marked out of MOV AX,0020
1.00 MOV CX,0010
MUL CL
watch point:
DX 0000
AX = 0200
CX = 0010
Question 20 Which statements are correct for HDDs?
Complete
Select one or more:
Marked out of
1.00 a. Bits are store randomly on disk surfaces
b. Head, Track, Cylinder are key parameters for access data on hard disk
c. Bits are stored on tracks
d. Head, Track, Sector are key parameters for access data on hard disk
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Question 21 Which are the correct inputs for XLAT instruction
Complete
Select one or more:
Marked out of
0.50 look-up index must be loaded into DL
DS:[BX] pointed to look-up table
look-up index must be loaded into AL
DS:[SI] pointed to look-up table
Question 22 What is the correct value of SI, AL (in hex) at watch point:
Complete 01: MOV SI, 300h
Marked out of 02: MOV AL, 10h
1.00 03: MOV CX, 7
04: Loop_label:
05: MOV [SI], AL
06: ADD AL,10h
07: INC SI
08: LOOP Loop_label
watch point:
SI 307h
AL = 80h
Question 23 To evaluate processor performance, the following indicators and formulas are used:
Complete
Marked out of
1.00
Which of the following system attributes affects cycle time t
Select one or more:
Instruction set architecture
Cache and memory hierarchy
Compiler technology
Processor implementation
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Question 24 To encrypt a byte value, use __________ instruction.
Complete
Select one:
Marked out of
0.50 XOR
AND
NOT
OR
Question 25 In multiplication instruction, when the source operand is 8 bit, _________ will be multiplied with source.
Complete
Select one:
Marked out of
0.50 AX
AL
Whatever general purpose register
BX
Question 26 A system programmer needs to compute 449/2+358/4 (decimal). Instruct him to code in debug (number
Complete must be in hex) with the least number of instruction counts.
Marked out of
1.50
Step 1: MOV AX,166
Step 2: MOV CL,2
Step 3: SHR AX,CL
Step 4: MOV BX,AX
Step 5:
MOV AX,01BC
Step 6: ADD AX,BX
Question 27 Convert 0.1015625 to IEEE 32-bit floating point format (1 sign+ 8 exponent + 23 mantissa)
Complete
Marked out of Answer: 3DD00000
1.00
Question 28 The instruction that loads the AH register with the lower byte of the flag register is
Complete
Select one:
Marked out of
0.50 LAHF
PUSHF
AH
SAHF
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Question 29 The following sequence of instructions are executed. What is the correct value of flag bits at watch point?
Complete MOV AL, 0F
Marked out of ADD AL, F1
1.00
watch point:
Zero flag (OF) = set
Carry flag (CF) = set
Question 30 Which are correct about 32 bit index registers of IA-32 processors:
Complete
Select one or more:
Marked out of
1.50 ESI: 32 bit pointer to source memory in data movement instructions
ESH,EDH: 16 bit pointers to higher memory above 1M
SI: 16 bit pointer to source memory in data movement instructions
EDI: 32 bit pointer to destination memory in data movement instructions
DI: 16 bit pointer to destination memory in data movement instructions
Question 31 Select the correct sequence of instructions to compute -1024/128 (all values are in hex).
Complete
Marked out of Step 1: MOV AX,FC00
1.00
Step 2: MOV CX,80
Step 3: CWD
Step 4: IDIV CX
Question 32
Complete
Marked out of
1.50
Calculate MIPS rate for this program
Given:
Answer: 25.80645161
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Question 33 What is the correct sequence of instruction cycle?
Complete
Marked out of Step 6 Store result
1.20
Step 4 Fetch operand
Step 1 Execution
Step 5 Calculate operand address
Step 2 Fetch opcode
Step 3 Decode
Question 34 Convert the 32-bit floating point number C4361000 (in hex) to decimal.
Complete
Marked out of Answer: -728.25
1.00
Question 35 Write mask byte (in hex) to clear bit 2nd, 3rd, 5th of a byte value with AND instruction (LSB is
Complete 1st bit).
Marked out of
0.50 Answer: E9
Question 36 8088 is 16 bit processor, the maximum addressable memory is:
Complete
Select one:
Marked out of
0.50 640M
640K
1024K
64M
Question 37 Write mask byte (in hex) to set bit 6th, 4th of a byte value with OR instruction (LSB is the 1st
Complete bit).
Marked out of
0.50 Answer: 28
Question 38 the instruction, CMP to compare source and destination operands by __________
Complete
Select one:
Marked out of
0.50 subtracting
adding
dividing
comparing
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Question 39
Complete
Marked out of
1.00
Calculate the execution time for this program.
Given:
Answer: 0.003875
Question 40 Part of computer memory is shown in figure
Complete
Marked out of
1.00
What is the value of AX register after instruction MOV AX, [1D4B] executed
Answer: 5A2D
Question 41 Select correct level for contemporary computer multilevel machine
Complete
Marked out of Level 3 Operating system level
1.00
Level 5 High level programming language
Level 6 Applications
Level 1 Microarchitecture level
Layer 4 Assembly Language level
Level 2 Instruction set level
Level 0 Digital logic level
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Question 42 the memory stack area of a program shown in figure
Complete
Marked out of
1.00
The value of SP register is 1D50. What is the value of SP follows the execution of PUSH SI
Answer: 1D48
Question 43 Choose the correct structure of memory chip as shown below
Complete
Marked out of
1.00
Note:
DQ: Data pinout
Select one:
DRAM 2Kx8-bit
SRAM 1Kx16-bit
SRAM 2Kx8-bit
DRAM 1Kx16-bit
Question 44 Given 8-bit floating-point binary format:
Complete 1 (sign) + 3 (exponent) + 4 (mantissa)
Marked out of Convert the 8-bit floating point number 68 (in hex) to decimal.
1.00
Answer: 12.0
Question 45 Choose correct RAID volume definitions for a request 2T storage.
Complete
RAID 0 -
Marked out of
Striped 2 x 1T HDDs are needed, enhance data transfer, no fault tolerance, data lost when one HDD fails
2.00
volume
RAID5
At least 3 x 2T HDDs, fault-tolerance, no data lost, no down-time
Volume
RAID 1 -
Mirror 2 x 2T HDDs are needed, no data lost when the primary storage fails
volume
Spanned
2T HDD + more HDDs to extend storage, no fault tolerance, data lost when one HDD fails
Volume
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