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4.trends in HDL

This document discusses the importance of HDLs (hardware description languages) for designing digital circuits. It notes that HDLs allow designs to be developed at a high level of abstraction independent of technology, and logic synthesis tools can later optimize the design for a specific technology. HDLs also allow functional verification to be done early in the design cycle before implementation. Designing in HDLs is analogous to computer programming with a textual representation. Verilog HDL is highlighted as a popular language due to its C-like syntax, support from CAD tools, and ability to customize with PLI. The trend is moving to higher levels of abstraction in HDLs to handle increasing circuit speeds and complexities.

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Ramesh Nair
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0% found this document useful (0 votes)
239 views

4.trends in HDL

This document discusses the importance of HDLs (hardware description languages) for designing digital circuits. It notes that HDLs allow designs to be developed at a high level of abstraction independent of technology, and logic synthesis tools can later optimize the design for a specific technology. HDLs also allow functional verification to be done early in the design cycle before implementation. Designing in HDLs is analogous to computer programming with a textual representation. Verilog HDL is highlighted as a popular language due to its C-like syntax, support from CAD tools, and ability to customize with PLI. The trend is moving to higher levels of abstraction in HDLs to handle increasing circuit speeds and complexities.

Uploaded by

Ramesh Nair
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Importance of HDLs

Course Instructor : Mr. Ramesh S R


Dept of ECE
ASE
Email: [email protected]
1.Designs at Abstract Level
• Designs – RTL description without choosing a
specific technology.
• Technology independent.

• Logic synthesis tool performs conversion of


design.
• New technology emerging – Designers do not
redesign the circuit.
Designs at Abstract Level…
• Input – Register Transfer Level (RTL)
description.
• Output – Gate Level Netlist (GLN)
Designs at Abstract Level…

• Logic synthesis tools optimize the circuit.


• Parameters - Area and timing.
• Target – New technology.
2.Functional Verification
• Describing designs in HDLs, functional
verification can be done early in the design
cycle.
• Designers works at RTL – optimization and
modification of design can be done
• Until desired functionality is met.
• Most design bugs are eliminated.
Functional Verification…
• Design cycle time is reduced.

• Probability of detection of functional bug.


• Later stage at GLN or physical layout is
minimized.
3.Analogous to Computer
programming
• Designing with HDLs is analogous to
computer programming.
• A textual description with comments is an
easier way to develop and debug circuits.
• Provides a concise representation of design.
• Gate level schematics are incomprehensible
for very complex designs
Why HDLs??
• Increasing complexities of digital circuits.
• Increasing Sophisticated CAD tools.
• Only method for large digital design.
• No digital circuit designer will ignore HDL.
Popularity of Verilog HDL
• It is a general purpose HDL easy to learn and easy
to use.
• Similar in syntax to C programming language.
• Designers with C programming experience will
find it easy to learn verilog HDL.
• Allows different level of abstraction to be mixed
in the same model.
• Designer can define a hardware model in terms
of switches, gates, RTL or behavioral code.
Popularity of Verilog HDL…
• Designer needs to learn only one language for
stimulus and hierarchical design.
• Most popular logic synthesis tools support
verilog HDL.
• Language of choice for designers.
• All fabrication vendors provide verilog HDL
libraries for post logic synthesis simulation.
• Designing a chip in verilog HDL allows the
widest choice of vendors.
Popularity of Verilog HDL…
• Programming Language Interface (PLI)
• – a powerful feature that allows the user to
write custom C code.
• It interacts with internal data structures of
verilog.
• Designers can customize a verilog HDL
simulator to their needs with the PLI.
Trends in HDLs
• Speed and complexity of digital circuits has
increased rapidly.
• Designers have to shift designs to higher level
of abstraction.
• Designers main focus - functionality.
• CAD tools take care of implementation
details.
• Close to optimum implementation.

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