8-1

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THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D Table of Contents D
CANTERBURY
Page. 1 COVER
Page. 2 OPERATION BLOCK DIAGRAM
Page. 3 POWER SEQUENCE
g
SPRINGFIELD
Page. 4 CLOCK DISTRIBUTION
Page. 5 BOARD INFORMATION
un al
Page. 6 CLOCK GENERATOR (CK-505M)
Page. 7~8 DIAMONDVILLE (N270)
Page. 9 THERMAL MONITOR
Page. 10~13 CALISTOGA (INTEL945GSE)
Page. 14~15 DDR2 ON BOARD
ms nti
CPU : INTEL DIAMONDVILLE Page. 16 DDR2 TERMINATION
C Page. 17 DDR2 SODIMM C
Chip Set : INTEL 945GSE Page. 18~21 ICH7-M
8. Block Diagram and Schematic

Page. 22 BIOS CODE

Remarks : Page. 23 LCD(LVDS) CONN.
Sa de
Page. 24 CRT CONN.
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- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

Page. 25 HDD CONNECTOR (SATA)

Model Name : CANTERBURY Page. 26 MICOM
Page. 27~29 LAN (GIGABIT)
SPRINGFIELD
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Page. 30 USB
PCB Part No : BA41-01122A (GCE) Page. 31
Page. 32~33
MINI-CARD (Wireless)
CARDBUS CONTROLLER (AU6371)
BA41-01123A (NY) Page. 34 3IN1 SUB
Page. 35 AUDIO CODEC (ALC262-GR)
BA41-01124A (HST) Page. 36 AMP & SPEAKER & MIC
Co
B BA41-01125A (TRI) Page. 37 KBD CONN & DEBUG PORT B
Page. 38 CHARGER
Dev. Step : PR1 Page. 39 P3.3V_AUX & P5V_AUX
Page. 40 DDR2 POWER
: 1.0 Page. 41 CHIPSET POWER (P 1.05V & P 1.5V)
Revision Page. 42 CPU VRM POWER (VCC_CORE)
: 2009.07.13 Page. 43 SWITCHED POWER
T.R. Date Page. 44 POWER DISCHARGER
Page. 45 LED FPC CONNECTOR POWER S/W
Page. 46 TRANSMITTER
DRAW CHECK APPROVAL Page. 47 MOUNT HOLE
Page. 49~50 TEST POINTS
A A
SAMSUNG
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2 1

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4 3
 N130
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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
OPERATION BLOCK DIAGRAM
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
437 uFCBGA Type
THERMAL
CPU MONITOR
CLOCK DIAMONDVILLE
CPU2_THERMDA/DC EMC2102
GENERATOR TFT_LCD Page8(block)
Page11~12
CK-505 10.1" WIDE
g
Page26
Page8(block)
533MHz FSB
LVDS option
un al
998 uFCBGA Type
VGA P3 Bluetooth
GMCH 533 MHz
200P
DDR2-SODIMM
Module
CRT MAX 1 GB
Page8(block) 945GSE Page9(block)
P0 USB (1):debug port
ms nti
Page 13~16
P4
C USB (2) C
8. Block Diagram and Schematic

P5
652 FCBGA Type
USB (3)
HDD SATA P7
Sa de
1.3M Camera
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

2.5inch
ICH USB2.0 P1
ICH7-M CardBus
nfi
3in1 B’d
AU6371
82801 GBM
Page 17~20 P2
MINI CARD1
HDAUDIO PCI_ EXP PCI_ EXP1
High Definition Audio Wireless LAN
Co
Page9(block)
B Aud. Audio SPI B
AMP
ALC272 RTC P6
Batt. PCI_ EXP2
MINI CARD2
Page 22~25 option HSDPA/Wibro
SIMM Card
SPI ROM
Page9(block)
2P
Page 21
HP Page
PCI_ EXP3

RJ45
MIC-IN 2P 2P Power S/W LAN CONTROLLER LAN
LPC 88E8040 Transformer
MICOM SYNAPTICS
SPKR R
H8S-2110B P/S2 TOUCHPAD
A SPKR L A
Space bar
SAMSUNG
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KEYBOARD
4 3 2 1

8-2
 8-3
4 3 2 1
SAMSUNG PROPRIETARY
BOARD INFORMATION
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION D
PCI Devices
Voltage Rails
Devices IDSEL# REQ/GNT# Interrupts
Power Rail Descriptions
PRTC_BAT 3.3V (can drop to 2.0V min. in G3 state) supply for the RTC well.
g
USB AD29(internal) VDC Primary DC system power supply (9 to 19V)
Hub to PCI AD30(internal) P1.05V(VCCP) VTT for CPU, Calistoga & ICH7-M
LPC Bridge/IDE/AC97/SMBUS AD31(internal) Programable P3.3V_MICOM 3.3V always power rail(for Micom)
Internal MAC AD24(internal) P1.5V 1.5V switched power rail (off in S3-S5)
un al
P1.8V_AUX 1.8V power rail for DDR (off in S4-S5)
P0.9V 0.9V power rail for DDR (off in S4-S5)
P5V_AUX 5.0V power rail (off in S4-S5)
P3.3V_AUX 3.3V power rail (off in S4-S5)
P5V 5.0V switched power rail (off in S3-S5)
P3.3V 3.3V switched power rail (off in S3-S5)
CPU_CORE Core voltage for Atom CPU
I2C / SMB Address
ms nti
Devices Address Hex Bus
ICH7M Master SMBUS Master
C CK-505M (Clock Generator) 1101 001X D2h Clock, Unused Clock Output Disable
C
8. Block Diagram and Schematic

SODIMM0 1010 000X A0h -

CPU Thermal Sensor 0111 101X 7Ah Thermal Sensor
Sa de
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

USB PORT Assign

nfi
Port Number ASSIGNED TO Port Number ASSIGNED TO
0 USB PORT 4 USB PORT
UHCI_0 UHCI_2
1 3-IN-1 5 USB PORT
2 Wireless LAN 6 HSDPA
UHCI_1 3 BLUETOOTH UHCI_3 7 CAMERA
Co
B B
PCI Express Assign
Port Number ASSIGNED TO
1 Mini Card 1(Wireless LAN)
2 Mini Card 2 (HSDPA/Wibro)
3 LOM
A A
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THIS DOCUMENT CONTAINS CONFIDENTIAL
POWER DIAGRAM
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. Rev 0.1
D
KBC3_SUSPWR KBC3_PWRON D
(CHP3_S4_STATE*) (CHP3_SLPS3*) VCCP3_PWRGD
AC Adapter DIAMONDVILLE
P1.05V CALISTOGA CPU_CORE DIAMONDVILLE
ICH7-M
g
Battery DC VDC
un al
P1.8V_AUX SODIMM (DDR III)
CALISTOGA
DDR II-Termination
ms nti
P0.9V
C C
ICH7-M HDD
8. Block Diagram and Schematic

USB M_PCI
P3.3V_MICOM P5.0V CRT FAN CIRCUIT
P5V_AUX MICOM AUX DISPLAY
MICOM
Sa de
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

nfi
CRESTLINE
P1.5V ICH8-M
P3.3V_AUX
ICH7-M LAN
MDC BT Thermal Sensor MICOM
Co
ICH7-M SODIMM
B P5.0V_ALW P3.3V SPI PCMCIA B
LCD LEDs
M_PCI
ICH7-M
P1.2V_LAN P2.5V
P12.0V_ALW
LAN
Power On/Off Table by S-state P1.8V_LAN
Rail P2.5V_LAN
State S0 S3 S4 S5 LAN
+V*A(LWS)
ON ON ON ON
+V*LAN ON ON S5-S4 S3 S0
+1.8V_AUX ON ON
+0.9V
A +V*AUX
A
ON ON
+V ON
SAMSUNG
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+V* (CORE) ON
4 3 2 1

8-4
 8-5
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
POWER RAILS ANALYSIS
EXCEPT AS AUTHORIZED BY SAMSUNG.
220V
Rev. 0.6 (060920)
D D
Adapter Battery
5.0V_AUX ( TBD A )
3.3V_AUX ( TBD A )

MICOM 3V ( TBD A )
g
1.05V
0.1 A (TBD) ITP
un al
CPU CORE MICOM 3V
CPU CORE ( TBD A )
1.05V (VCCP)
2.2 A Diamondville 3.3V
0.75 A (TBD)
Thermal
3.3V
0.08 A (TBD)
0.08 A (TBD)
KBC
1.05V ( TBD A ) 2.5 A Sensor
1.5V ( TBD A )
1.5V
0.13 A ( 2.5 W )
2.5V ( TBD A )
3.3V ( TBD A ) MICOM 3V
5.0V ( TBD A )
0.1 A (TBD) PWR LED
1.05V (MCH CORE)
1.8V_AUX ( TBD A ) 3.72 A
ms nti
2.5V
0.9V( TBD A )
1.5V
0.14 A Calistoga
0.78 A
GMCH 3.3V
0.25 A (TBD) CLOCK
VGA CORE (TBD A)
VDC INV ( TBD A )

C 3.3V 0.16 A C
1.8V_AUX (4 W )
PEX IO (TBD A)
8. Block Diagram and Schematic

RTC_Battery

3.3V
0.2 A (TBD) KeyBoard 3.3V_AUX
0.6 A (TBD) LAN
1.05V
0.95 A
Sa de
1.5V
3.3V
1.6A ICH7-M 3.3V KBD LED
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

0.421 A 0.01 A (TBD) 3.3V_AUX

3.3V_AUX
5V
0.209 A (TBD) 0.1 A (TBD) SD Card
5V_AUX 0.001 A (TBD)
0.001 A (TBD) ( 1.5 W )
RTC_Battery
0.006 A (TBD)
3.3V 0.015 A (TBD) SPI
nfi
1.8V_AUX 1.5A
3.3V
5V
0.06 A (TBD)
0.07 A (TBD)
HD Audio 3.3V
1.5 A (TBD)
3.3V_AUX
1.5V
0.5 A (TBD) Mini Card X 2
0.75A (TBD)
Co
1.8V_AUX
B 0.9V
3.1 A (TBD) DDR-2 5V
0.22 A (TBD) SATA HDD B
1 A (TBD)
( ~ 5.0 W )
5V
0.16 A (TBD) FAN
3.3V (LCD 3V)
P5.0V_LED (VDC INV)
0.35 A LCD 5V
1.5 A (TBD) Audio AMP
0.6 A
P3.3V_AUX 5V
0.08 A (TBD) 2 A (TBD) USB (x 3)
P1.2V_LAN
P1.8V/2.5V_LAN
0.29 A (TBD) LAN (88E8057)
0.15 A (TBD)
5V 0.2 A (TBD) Touch Pad
A A
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THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
POWER SEQUENCE BLOCK DIAGRAM
EXCEPT AS AUTHORIZED BY SAMSUNG.
PAGE 18
CLOCK 18-0) VRM3_CPU_PWRGD
1-0) PRTC_BAT RTC
Battery CHIP PAGE 6
D D
19-0) VRM3_CPU_PWRGD
2-1) MICOM_P3V 2-0) VDC
P5V_AUX & P3V_AUX VDC
4-0) KBC3_SUSPWR 11.1V
POWER
4-2) P3.3_AUX
TPS51120 Battery Mode
1-1) CHP3_RTCRST 15-0) KBC3_VRON 18-0) VRM3_CPU_PWRGD
(1) 5-0) AUX5_PWRGD
S/W 16-0) VCCP_PWRGD
CPU VRM
17-1) VCC_CORE
g
PAGE 39
PAGE 44
SC454
un al
PAGE 43
20-0) KBC3_CPUPWRGD_D
3-0) KBC3_CHKPWRSW*

19-0) VRM3_CPU_PWRGD VRMPWRGD 25-0) INIT# 25-0) INIT#

24-0) A20M#/IGNNE#/INTR/NMI 24-0) A20M#/IGNNE#/INTR/NMI
LAN_RESET*
22-0) PLT3_RST* 21-0) CPU1_PWRGDCPU 21-0) CPU1_PWRGDCPU CPU
ms nti
23-0) KBC3_CPURST* 22-0) PLT3_RST* 14-2) P1.5V
RCIN* 26-0) CPU BIST
12-1) CHP3_SLPS5*/S3* 15-2) VCCP
C 12-0) KBC3_PWRBTN*
ICH7-M C
8. Block Diagram and Schematic

23-0) CPU1_CPURST*
KBC 8-1) P3.3V_AUX 14-1) P3.3V
15-1) P2.5V 15-1) P2.5V
15-0) KBC3_PWRON 14-2) P1.5V 14-2) P1.5V
Sa de
23-0) PLT3_RST*
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

15-0) KBC3_VRON
GMCH
8-3) P1.5V 14-3) P0.9V
nfi
P1.5V_AUX & VCCP
PAGE 26
Thermal 15-2) VCCP 15-2) VCCP
Monitor SC415 16-0) VCCP_PWRGD
PAGE 9
PAGE 41
P5V_AUX & P3V_AUX
4-0) KBC3_SUSPWR 5-1)P5V_AUX
4-1) P3.3V_LAN TPS51120 2-1) P5.0V_ALW
DDR2 POWER 8-2) P1.8V_AUX 8-2) P1.8V_AUX
DDR2
Co
(2) SC486
13-1) P0.9V 14-3) P0.9V
B
PAGE 40
13-1) MEM_VREF 13-1) MEM_VREF Memory B
PAGE 40
22-0) PLT3_RST#
6-1) P5V_AUX 14-2) P3.3V MINI PCIE
14-1)P5V
14-0) KBC3_PWRON SI3433 14-2) P1.5V Devices
PAGE 44
4-1) P3.3V_AUX 5-1) P3.3V_AUX
14-2) P3.3V
14-0) KBC3_PWRON SI3433 14-1)P5V AUDIO
PAGE 44
4-3) P1.2V_LAN
BCP69-16
5-1) P3.3V_AUX AMP
88E8057 PAGE 28 15-0) KBC3_PWRON
MIC5219 15-1) P2.5V
GIGABIT TRANSFORMER 15-2) 1.5V_PWRGD
LFE9261 PAGE 44
14-2) P5.0V
PAGE 27 4-2) P1.8V_P2.5V_LAN
PAGE 29 HDD
A A
SAMSUNG
ELECTRONICS
4 3 2 1

8-6
 8-7
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
CLOCK DISTRIBUTION
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CLK0_HCLK0
CPU
1205-002574

D CLK0_HCLK0# D
133 MHz
CLK0_HCLK1
CLK1_MCLK0/0#
133 MHz CLK0_HCLK1#
CLK1_MCH3GPLL CLK1_MCLK1/1# SODIMM
g
133 MHz CLK1_MCH3GPLL#
CLK1_DREFSSCLK GMCH 533 MHz
un al
133 MHz CLK1_DREFSSCLK#
CLK1_DREFCLK
96 MHz CLK1_DREFCLK#
CLK1_PCIEICH
ms nti
CLOCK GENERATOR

HDA3_AUD_BCLK
133 MHz CLK1_PCIEICH# AUDIO CODEC
C
12.288 MHz C
33 MHz CLK3_PCLKICH
8. Block Diagram and Schematic

IDTCV179BNLG

14.318 MHz CLK3_ICH14

ICH
RTC Clock
CLK3_SMBCLK SMB3_CLK 32.786KHz
Sa de
RTC Clock
- This Document can not be used without Samsung's authorization -

CLK3_USB48
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

12 MHz AU6371
CK-505M

CLK1_SATA
100 MHz CLK1_SATA#
nfi
CLK1_MINIPCIE
100 MHz CLK1_MINIPCIE# MINI PCIE(WLAN)
CLK1_MIN3PCIE
100 MHz CLK1_MIN3PCIE#
MINI PCIE(HSDPA)
Co
B B
33 MHz CLK3_PCLKMICOM KBC5_TCLK TOUCHPAD
KBC
32.768KHz KBC3_SMCLK
BATTERY
100 MHz CLK1_PCIELOM
100 MHz CLK1_PCIELOM# 88E8057
33 MHz CLK3_PCLKCB CARDBUS
CONTROLLER
A A
33 MHz CLK3_PCLKMIN
MINIPCI
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PROPRIETARY INFORMATION THAT IS
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DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D THERMAL SENSOR & FAN CONTROL D
g
P5.0V P3.3V_AUX P3.3V P3.3V_AUX
un al
R80

10K 1%
10K 1%
10K 1%

10K 1%
49.9
1% Check if PU is doubled to Micom Side.
C74 THM3_VDD_3V_MN
C53 C56
ms nti
10000nF-X5R
100nF 100nF
6.3V
10V 10V

R73
R74
R72

R75
U8
C EMC2112-BP-TR C
1 14
8. Block Diagram and Schematic

VDD_3V SMDATA KBC3_THERM_SMDATA

16 15
VDD_5V_1 SMCLK KBC3_THERM_SMCLK
19
VDD_5V_2
12
ALERT#
8
THM3_ALERT#
9
SYS_SHDN# THM3_STP#
RESET#
2
Sa de
DN1 CPU2_THERMDC 10mil width and 10mil spacing.
DP1
3 C54
P3.3V_AUX
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

17 2.2nF 50V For Intel 45nm(From penryn)

FAN5_VDD 18
FAN_1
4 THM3_THERMDN_MN
CPU2_THERMDA
FAN_2 DP3_DN2
20 5 THM3_THERMDP_MN
FAN3_FDBACK# TACH DN3_DP2
R78 10
1%

10K ADDR_SEL 2
nfi
THM3_SHDN_SEL_MN 6
SHDN_SEL
C55 MMBT3904
THM3_TRIP_SET_MN 7 11 2.2nF 1 Q8
TRIP_SET CLK 50V
3
13
GND Opposite side of CPU.
R76 21
R77 THERMAL_PAD
0 2.49K
1% 1209-001887
nostuff TRIP_SET 1500 : 95 degree
SMBUS Address 7Ah
Co
B B
P3.3V
R79
Line Width = 20 mil 10K
SHDN_SEL MODE 1% M1 M2
J505 HEAD HEAD
INTEL TR MODE HDR-4P-1R-SMD DIA DIA
0 LENGTH LENGTH
FAN5_VDD 1 BA61-01090A BA61-01090A
HIGH Z AMD CPU/DIODE MODE 8-C3
2
8-C3
1 EXT.DIODE 2 MODE FAN3_FDBACK# 3
4
5
MNT1
6
C73 MNT2
10000nF-X5R
6.3V
3711-000456
ADDRESSS_SEL MODE To support heatsink
0 0101 111xb
HIGH Z 0111 101xb (7A)
A 1 0101 110xb
A
SAMSUNG
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8-8
 8-9
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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
DIAMONDVILLE (N270)
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D D
P1.05V P1.05V
U505-1 R153 R137
CPU1_A#(16:3) N270 1/4 56.2
1%
nostuff
330
3 P21 V19
A3# ADS# CPU1_ADS#
4 H20
A4# BNR#
Y19
CPU1_BNR# U505-2
5 N20 U21
2/4
g
6 R20
A5#
A6#
BPRI# CPU1_BPRI# CPU1_D#(15:0) N270 CPU1_D#(47:32)
7 J19 T21 0 Y11 R3 32
8 N19
A7# DEFER#
T19 CPU1_DEFER# 1 W10
D0# D32#
R2 33
9 G20
A8# DRDY#
Y18
CPU1_DRDY# 2 Y12
D1# D33#
P1 34
M19
A9# DBSY# CPU1_DBSY# AA14
D2# D34#
N1
un al
10 3 35
A10# TP18068 D3# D35#
ADDR GROUP0

11 H21 T20 4 AA11 M2 36

12 L20
A11# BR0# CPU1_BREQ# 5 W12
D4# D36#
P2 37
A12# D5# D37#
13 M20 F16 6 AA16 J3 38
CONTROL

A13# IERR# D6# D38#

14 K19 V16 R136 1K 1% 7 Y10 N3 39
15 J20
A14# INIT# CPU1_INIT# 8 Y9
D7# D39#
G3 40

DATA GRP0

DATA GRP2
A15# D8# D40#
16 L21 W20 9 Y13 H2 41
CPU1_ADSTB0# K20
A16# LOCK# CPU1_LOCK# 10 W15
D9# D41#
N2 42
ADSTB0# D10# D42#
D17 D15 11 AA13 L2 43
CPU1_REQ#(4:0) 0 N21
AP#0 RESET#
W18
CPU1_CPURST# 12 Y16
D11# D43#
M3 44
ms nti
1 J21
REQ0# RS0#
Y17 CPU1_RS0# 13 W13
D12# D44#
J2 45
2 G19
REQ1# RS1#
U20
CPU1_RS1# 14 AA9
D13# D45#
H1 46
3 P20
REQ2# RS2#
W19 CPU1_RS2# 15 W9
D14# D46#
J1 47
4 R19
REQ3# TRDY# CPU1_TRDY# Y14
D15# D47#
K2
C REQ4#
AA17
CPU1_DSTBN0# Y15
DSTBN0# DSTBN2#
K3
CPU1_DSTBN2# C
CPU1_A#(31:17) HIT# CPU1_HIT# CPU1_DSTBP0# DSTBP0# DSTBP2# CPU1_DSTBP2#
8. Block Diagram and Schematic

17 C19 V20 W16 L1

18 F19
A17# HITM# CPU1_HITM# CPU1_DBI0# V9
DINV0# DINV2#
M4
CPU1_DBI2#
19 E21
A18#
K17
DP#0 DP#2 CPU1_D#(63:48)
20 A16
A19# BPM0#
J18
CPU1_D#(31:16) 16 AA5 C2 48
A20# BPM1# D16# D48#
21 D19 H15 17 Y8 G2 49
A21# BPM2# D17# D49#
XDP/ITP SIGNALS

P1.05V P1.05V 22 C14 J15 P1.05V 18 W3 F1 50

Sa de
A22# BPM3# Near the CPU D18# D50#
23 C18 K18 19 U1 D3 51
A23# PRDY# D19# D51#
- This Document can not be used without Samsung's authorization -

24 C20 J16 R152 54.9 1% 20 W7 B4 52

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

A24# PREQ# D20# D52#

ADDR GROUP1

25 E20 M17 R157 54.9 1% 21 W6 E1 53

26 D20
A25# TCK
N16 R151 54.9 1% 22 Y7
D21# D53#
A5 54 COMP0/2 (COMP1/3) should be
A26# TDI P1.05V D22# D54# connected with Zo=27.4ohm(55ohm)
27 B18 M16 23 AA6 C3 55
A27# TDO D23# D55#
28 C15 L17 R154 54.9 1% 24 Y3 A6 56 trace shorter than 0.5" to their

DATA GRP1

DATA GRP3
A28# TMS D24# D56#
29 B16
A29# TRST#
K16 R156 54.9 1% 25 W2
D25# D57#
F2 57 respective Banias socket pins.
nfi
30 B17 V15 R155 26 V3 C6 58
31 C16
A30# BR1#
R173 0 USE PROCHOT* 27 U2
D26# D58#
B6 59 COMP0/2 : Stripline=14mils / Microstrip=18mils
R138R150 A31# ITP3_DBRRESET# 56.2 D27# D59#
1K 1K R177 1K A17 G17 1% 56ohm --> 68ohm 28 T3 B3 60 COMP1/3 : Stripline=4mils / Microstrip=5mils
A32# PROCHOT# D28# D60#
R175 1K B14 E4 nostuff 29 AA8 C4 61
A33# THRMDA CPU2_THERMDA D29# D61#
THERM

nostuff R176 1K B15 E5 30 V2 C7 62

nostuff A34# THRMDC CPU2_THERMDC D30# D62#
R174 1K A14
A35#
P1.05V 31 W4
D31# D63#
D2 63
B19 H17 Y4 E2
CPU1_ADSTB1# M18
ADSTB1# THERMTRIP# CPU1_THRMTRIP# CPU1_DSTBN1# Y5
DSTBN1# DSTBN3#
F3 TP18106
CPU1_DSTBN3#
AP#1 CPU1_DSTBP1# Y6
DSTBP1# DSTBP3#
C5 TP18105 CPU1_DSTBP3#
R170CPU1_DBI1# DINV1# DINV3# CPU1_DBI3#
U18 V11 1K R4 D4 TP18104
HCLK
CPU1_A20M# T16
A20M# BCLK0
V12 CLK0_HCLK0 1%
DP#1 DP#3
CPU1_FERR# FERR# BCLK1 CLK0_HCLK0# TP18103
J4 A7 T1
CPU1_IGNNE# IGNNE# GTLREF COMP0
Co
R16 R134 1K 1%
U5 MISC T2 1% 27.4 R130
CPU1_STPCLK# STPCLK# ACLKPH COMP1
CPU1_INTR T15
LINT0 R169 R133 1K V5
1%
DCLKPH COMP2
F20 1% 54.9 R132
B CPU1_NMI
R15
LINT1
P1.05V 2K C157 T17
BINIT# COMP3
F21 1% 27.4 R158 B
U17 1% 100nF nostuff R6 1% 54.9 R159
CPU1_SMI# SMI# 10V nostuff M6
EDM
R18
D6 C21 N15
EXTBGREF DPRSTP#
R17 CPU1_DPRSTP#
NC1 RSVD3 R148 FORCEPR# DPSLP# CPU1_DPSLP#
G6 NC C1 1K N6 U4
H6
NC2 RSVD2
A3 1% P17
HPPLL DPWR#
V17
CPU1_DPWR#
K4
NC3 RSVD1
T6
MCERR# PWRGOOD
N18
CPU1_PWRGDCPU
K5
NC4
J6
RSP# SLP#
A13
CPU1_SLP#
M15
NC5 CPU1_BSEL0 H5
BSEL0 CORE_DET
B7
NC6 R149 CPU1_BSEL1 BSEL1 CMREF
L16 2K C127 G5 P1.05V
NC7 1% 100nF
CPU1_BSEL2 BSEL2
0902-002366 10V 0902-002366
R168
GTLREF : Keep the Voltage divider within 0.5" 1K
of the First GTLREF0 with Z0= 55 ohm trace 1%
Minimize coupling of any switching signals to this net
C154 R167
GTLREF : Keep the Voltage divider within 0.5" 100nF 2K
of the First EXTBGREF with Z0= 55 ohm trace 10V 1%
Minimize coupling of any switching signals to this net
GTLREF : Keep the Voltage divider within 0.5"
of the First CMREF with Z0= 55 ohm trace
Minimize coupling of any switching signals to this net
A A
SAMSUNG
ELECTRONICS

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
DIAMONDVILLE (N270)
EXCEPT AS AUTHORIZED BY SAMSUNG.
U505-4
N270 4/4
A2 AA20
D A4
VSS1 VSS145
AA19
D
VSS2 VSS144
A8 AA18
VSS3 VSS143
A15 AA15
VSS4 VSS142
A18 AA12
VSS5 VSS141
A19 AA10
VSS6 VSS140
P1.05V
U505-3 A20
VSS7 VSS139
AA7
N270 3/4 B1
B2
VSS8
VSS9
VSS138
VSS137
AA4
AA3
V10 C9 B5 AA2
VCCF VTT1 VSS10 VSS136
D9 B8 Y21
g
C109 A9
VTT2
E9 B13
VSS11 VSS135
Y20
100nF B9
VCCQ1 VTT3
F8 B20
VSS12 VSS134
Y2
10V
CPU_CORE VCCQ2 VTT4 VSS13 VSS133
F9 B21 Y1
VTT5 VSS14 VSS132
A10 G8 C8 W21
VCCP1 VTT6 VSS15 VSS131
A11 G14 C17 W17
un al
VCCP2 VTT7 P1.05V VSS16 VSS130
A12 H8 D1 W14
VCCP3 VTT8 VSS17 VSS129
B10 H14 D5 W11
VCCP4 VTT9 VSS18 VSS128
B11 J8 D8 W8
VCCP5 VTT10 VSS19 VSS127
B12 J14 D14 W5
C10
VCCP6 VTT11
K8 C144 C128 C129 C145 D18
VSS20 VSS126
W1
C11
VCCP7 VTT12
K14
100nF 100nF
1000nF 1000nF
D21
VSS21 VSS125
V21
VCCP8 VTT13 10V 6.3V 6.3V VSS22 VSS124
C12 L8 10V E3 V18
VCCP9 VTT14 VSS23 VSS123
D10 L14 E6 V14
VCCP10 VTT15 VSS24 VSS122
D11 M8 E7 V13
ms nti
VCCP11 VTT16 VSS25 VSS121
D12 M14 E8 V8
VCCP12 VTT17 VSS26 VSS120
E10 N8 E15 V7
VCCP13 VTT18 VSS27 VSS119
E11 N14 E16 V6
VCCP14 VTT19 VSS28 VSS118
E12 P8 E19 V4
C F10
VCCP15 VTT20
P14 F4
VSS29 VSS117
V1
C
8. Block Diagram and Schematic

VCCP16 VTT21 VSS30 VSS116

F11 R8 F5 U19
VCCP17 VTT22 VSS31 VSS115
F12 R14 F6 U16
VCCP18 VTT23 VSS32 VSS114
G10 T8 F7 U15
VCCP19 VTT24 VSS33 VSS113
G11 T14 F17 U7
VCCP20 VTT25 VSS34 VSS112
G12 U8 F18 U6
VCCP21 VTT26 VSS35 VSS111
H10 U9 G1 U3
Sa de
VCCP22 VTT27 VSS36 VSS110
H11 U10 G4 T18
VCCP23 VTT28 VSS37 VSS109
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

H12 U11 G7 T13

VCCP24 VTT29 VSS38 VSS108
J10 U12 G9 T12
VCCP25 VTT30 VSS39 VSS107
J11 U13 G13 T11
VCCP26 VTT31 VSS40 VSS106
J12 U14 G21 T10
VCCP27 VTT32 VSS41 VSS105
K10 H3 T9
VCCP28 VSS42 VSS104
K11 F14 H4 T7
VCCP29 VCCP_C6_4 VSS43 VSS103
nfi
K12 F13 H7 T5
VCCP30 VCCP_C6_3 VSS44 VSS102
L10 E14 H9 T4
VCCP31 VCCP_C6_2 P1.5V VSS45 VSS101
L11 E13 H13 R21
VCCP32 VCCP_C6_1 VSS46 VSS100
L12 H16 R13
VCCP33 VSS47 VSS99
M10 D7 H18 R9
VCCP34 VCCA VSS48 VSS98
M11 H19 R7
VCCP35 CPU1_VID(6:0) C153 VSS49 VSS97
M12
VCCP36 VID0
F15 C155 10000nF-X5R
J5
VSS50 VSS96
R5
N10 D16 100nF J7 R1
VCCP37 VID1 10V VSS51 VSS95
N11 E18 10V J9 P19
VCCP38 VID2 VSS52 VSS94
N12 G15 J13 P18
VCCP39 VID3 VSS53 VSS93
P10 G16 Placed as close as J17 P16
VCCP40 VID4 VSS54 VSS92
P11 E17 possible to VCCA pins. K1 P15
VCCP41 VID5 VSS55 VSS91
Co
P12 G18 K6 P13
VCCP42 VID6 VSS56 VSS90
R10 K7 P9
VCCP43 VSS57 VSS89
B R11
VCCP44 VCCSENSE
C13
CPU1_VCCSENSE
K9
VSS58 VSS88
P7 B
R12 K13 P6
VCCP45 VSS59 VSS87
D13 K15 P5
VSSSENSE CPU1_VSSSENSE K21
VSS60 VSS86
P4
VSS61 VSS85
0902-002366 L3 P3
VSS62 VSS84
L4 N17
VSS63 VSS83
L5 N13
VSS64 VSS82
L6 N9
VSS65 VSS81
L7 N7
VSS66 VSS80
L9 N5
VSS67 VSS79
L13 N4
VSS68 VSS78
L15 M21
VSS69 VSS77
L18 M13
C110 C143 C142 C140 C141 C167 C168 C170 C169 C166 C164 C165 L19
VSS70 VSS76
M9
10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R VSS71 VSS75
M1 M7
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V VSS72 VSS74
M5
VSS73
nostuff nostuff nostuff nostuff nostuff
0902-002366
CPU_CORE
20mils R172 100 1%
CPU1_VCCSENSE
C139 C130 C132 C161 C163 C162 C160 C159
1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF 1000nF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
R171 100 1%
CPU1_VSSSENSE
A A A
C137
1000nF
C133
1000nF
C158
1000nF
C131
1000nF
C134
1000nF
C138
1000nF
C136
1000nF
C135
1000nF SAMSUNG
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
ELECTRONICS
nostuff nostuff nostuff nostuff nostuff nostuff nostuff nostuff
4 3 2 1

8-10
 8-11
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS P3.3V P1.5V
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS P3.3V
EXCEPT AS AUTHORIZED BY SAMSUNG.
B504
B501
BLM18PG181SN1
B502
BLM18PG181SN1

BLM18PG181SN1
FSA FSB FSC VDD_SRC_IO VDD_CPU_IO VDD_PLL3_IO VDD_IO VDD_REF VDD_48 VDD_PCI VDD_PLL3 VDD_SRC VDD_CPU
HOST CLK nostuff
D BSEL0 BSEL1 BSEL2 D
10000nF-X5R6.3V

10000nF-X5R6.3V

10000nF-X5R6.3V
50V

50V

50V

50V
10V

10V

10V

10V

10V

10V

10V

10V
0 0 0 266 MHz

4700nF-X7R

4700nF-X7R
10000nF

0 0 1 333 MHz
6.3V

6.3V
6.3V
0.1nF

0.1nF

0.1nF

0.1nF
100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF
0 1 0 200 MHz
0 1 1 400 MHz
C524

C530

C522

C521

C528

C529

C19

C526
C503

C505
C502

C517

C18

C501

C519

C506

C504

C523
1 0 0 133 MHz
1 0 1 100 MHz
g
nostuff
1 1 0 166 MHz nostuff
nostuff nostuff
1 1 1 RSVD P3.3V
For EMI
un al
C525
0.012nF
C520
1%

50V
1%

U501
0.012nF
nostuff nostuff IDTCV179BNLG
50V
nostuff
10K

10K

19 4
VDD_IO VDD_REF
33 16
VDD_SRC_IO1 VDD_48
43 9
ms nti
VDD_SRC_IO2 VDD_PCI
R515 33 52 23
CLK3_FM48 56
VDD_SRC_IO3 VDD_PLL3
R549

R547
CLK3_USB48 R516 33 5% 27
VDD_CPU_IO
46
VDD_PLL3_IO VDD_SRC
C CLK1_BSEL0 R514 2.2K
VDD_CPU
62
C
55
CLK1_BSEL1 NC
8. Block Diagram and Schematic

R523 10K 5% 61
CLK1_BSEL2 CLK3_48MHZ_R 17
CPU0
60
CLK0_HCLK0
R525 33 5% 64
USB_FS_A CPU0# CLK0_HCLK0#
CLK3_ICH14 5
FSB_TESTMODE
58
REF_FS_C_TEST_SEL CPU1_MCH
57
CLK0_HCLK1
CLK3_14MHZ_R CPU1_MCH# CLK0_HCLK1#
44
Sa de
CHP3_CPUSTP# 45
CPUSTOP#
40
CHP3_PCISTP# PCISTOP# SRC11_CLKREQH#
- This Document can not be used without Samsung's authorization -

39 R504 475 1% nostuff

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

63
SRC11#_CLKREQG# LOM3_CLKREQ#
VRM3_CPU_PWRGD CLKPWRGD_PWRDN#
41
CLK3_PCIF_R SRC10
CLK3_PCLKICH R518 22 5% 14
PCIF_5_ITP_EN SRC10#
42
R519 22 5% CLK3_PCI4_R 13 37
CLK3_DBGLPC PCI_4_SEL_LCDCLK# SRC9 CLK1_PCIELOM
nfi
38
12
SRC9# CLK1_PCIELOM#
PCI_3
54
R520 22 CLK3_PCI2_R 11
SRC8_ITP
53 CLK1_MINI3PCIE
CLK3_PCLKMICOM PCI_2 SRC8#_ITP# CLK1_MINI3PCIE#
R521 475 1% CLK3_PCI1_R_MN 10 51 CLK3_CLKREQF#_R_MN R505 475 1%
MCH3_CLKREQ# PCI_1_CLKREQ_B# SRC7_CLKREQF# EXP3_CLKREQ#
SRC7#_CLKREQE#
50 CLK3_CLKREQE#_R_MN R506 475 1%
MIN3_CLKREQ#
R522 475 1% CLK3_PCI0_R_MN 8
CHP3_SATACLKREQ# PCI_0_CLKREQ_A#
48
7
SRC6
47
CLK1_MINIPCIE
SMB3_CLK_S 6
SCL SRC6# CLK1_MINIPCIE#
SMB3_DATA_S SDA
34
SRC4 CLK1_MCH3GPLL
Co
3 35
2
XTAL_IN SRC4# CLK1_MCH3GPLL#
XTAL_OUT
B 31 B

5%
5%
SRC3_CLKREQC# CLK1_PCIEICH

50V

50V

50V
18 32
59
VSS_48 SRC3#_CLKREQD# CLK1_PCIEICH#

10K

10K
VSS_CPU
For EMI 22 28
VSS_IO SRC2 CLK1_SATA

0.033nF

0.033nF

0.033nF
15 29
VSS_PCI SRC2# CLK1_SATA#

2
26
VSS_PLL3
1 24

THERM_GND
2801-004667
30
VSS_REF LCDCLK_27M
25
CLK1_DREFSSCLK

R548

R517
Y500 VSS_SRC1 LCDCLK#_27M_SS CLK1_DREFSSCLK#
36

C566

C527

C565
14.31818MHz VSS_SRC2
49 20
C531 C532 VSS_SRC3 SRC0_DOT96
21 CLK1_DREFCLK
0.018nF 0.018nF
SRC0#_DOT96# CLK1_DREFCLK#
50V 50V
1205-003159

65
This part is 64pin QFN package.
VOLTAGE
P1.05V
Place 14.318MHz within
R513 1K
500mils of CK-505 CLK1_BSEL0 MCH1_BSEL0
nostuff CLK1_BSEL1 R30 1K
MCH1_BSEL1
R524 1K

1%
1%

1%
CLK REQ DEVICE SRC PORT nostuff

56

56

56
CLK1_BSEL2 MCH1_BSEL2
CLK REQ A SATA SRC2
CLK REQ B GMCH SRC4

R511
R31

R551
CLK REQ E WIRELESS LAN SRC6
CPU1_BSEL0 R509 0
CLK1_BSEL0
CLK REQ F HSDPA SRC8 R29 0
CPU1_BSEL1 R552 0 CLK1_BSEL1
A CPU1_BSEL2 CLK1_BSEL2 A
nostuff

5%
SEL_LCDCLK* Pin 20/21 Pin 24/25 nostuff

0
SAMSUNG
nostuff
LOW DOT_96/DOT_96# PEG_CLK/PEG_CLK# nostuff

R550
R32
HIGH SRC_0/SRC_0# 27M & 27M_SS ELECTRONICS

R512

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CALISTOGA (945GSE)
D D
P1.05V
U504-1 R128
221
CPU1_D#(63:0) 945GSE CPU1_A#(31:3)
MCH1_HYSWING
1%
0.327V
0 C4 F8 3
HD0* HA3*
1 F6 D12 4 C107 R126
g
HD1* HA4*
2 H9 C13 5 100nF 100
HD2* HA5*
3 H6 A8 6 10V 1%
HD3* HA6*
4 F7 E13 7
HD4* HA7*
5 E3 E12 8
HD5* HA8*
within 20mil
un al
6 C2 J12 9
HD6* HA9*
7 C3 B13 10
HD7* HA10*
8 K9 A13 11
HD8* HA11*
9 F5 G13 12
HD9* HA12*
10 J7 A12 13
HD10* HA13*
11 K7 D14 14
HD11* HA14*
12 H8 F14 15
HD12* HA15*
13
14
E5
K8
HD13*
HD14*
1/5 HA16*
HA17*
J13
E17
16
17 P1.05V
15 18
ms nti
J8 H15
HD15* HA18*
16 J2 0904-002420 G15 19
HD16* HA19*
17 J3 G14 20 R122
HD17* HA20*
18 N1 A15 21 221
HD18* HA21*
19 M5 B18 22 1%
C HD19* HA22* C
20 K5 B15 23
0.327V
8. Block Diagram and Schematic

21 J5
HD20* HA23*
E14 24 MCH1_HXSWING
HD21* HA24*
22 H3
HD22* HA25*
H13 25 C83 R123
23 J4 C14 26 100nF 100
HD23* HA26*
24 N3
HD24* HA27*
A17 27 10V 1%
25 M4 E15 28
HD25* HA28*
26 M3 H17 29
Sa de
HD26* HA29*
27 N8 D17 30 within 20mil
HD27* HA30*
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

28 N6 G17 31
29 K3
HD28* HA31*
7-C4
CPU1_REQ#(4:0)
HD29*
30 N9 G9 0
HD30* HREQ0*
31 M1 E9 1
HD31* HREQ1*
32 V8 G12 2
HD32* HREQ2*
33 V9 B8 3
HD33* HREQ3*
nfi
34 R6 F12 4
HD34* HREQ4* P1.05V
35 T8
HD35*
36 R2 C12
37 N5
HD36* HADSTB0*
H16 CPU1_ADSTB0#
38 N2
HD37* HADSTB1* CPU1_ADSTB1#
HD38* R129
39 R5 E1 100
40 U7
HD39* HVREF1
E2
MCH1_HVREF 1%
41 R8
HD40* HVREF0 HVREF2
42 T4
HD41*
HD42* HCLKN
AA6
CLK0_HCLK1#
MCH1_HVREF 0.7V
43 T7 AA5 C106 R125
44 R3
HD43* HCLKP CLK0_HCLK1 nearby Pin J13 100nF 200
HD44* 1%
45 T5 H5 10V
HD45* HDINV0* CPU1_DBI0# Layout Note
Co
46 V6 J6
47 V3
HD46* HDINV1*
T9
CPU1_DBI1#
B 48 W2
HD47* HDINV2*
U6
CPU1_DBI2# Place 100nF B
49 W1
HD48* HDINV3* CPU1_DBI3# within 100mils
HD49*
50 V2 F3 near HVREF pin
51 W4
HD50* HDSTBN0*
M8 CPU1_DSTBN0#
52 W7
HD51* HDSTBN1*
T1
CPU1_DSTBN1#
53 W5
HD52* HDSTBN2*
AA3
CPU1_DSTBN2#
54 V5
HD53* HDSTBN3*
F4
CPU1_DSTBN3#
55 AB4
HD54* HDSTBP0*
M7
CPU1_DSTBP0#
56 AB8
HD55* HDSTBP1*
T2 CPU1_DSTBP1#
57 W8
HD56* HDSTBP2*
AB3
CPU1_DSTBP2#
58 AA9
HD57* HDSTBP3* CPU1_DSTBP3#
HD58*
59 AA8 F10
60 AB1
HD59* HADS*
B9
CPU1_ADS#
P1.05V 61 AB7
HD60* HBNR*
C7
CPU1_BNR#
62 AA2
HD61* HBPRI*
G8
CPU1_BPRI#
63 AB5
HD62* HBREQ0* CPU1_BREQ#
HD63*
C10
C15
HDBSY*
C6
CPU1_DBSY#
MCH1_HXSWING H1
HXSWING HDEFER*
E6
CPU1_DEFER#
MCH1_HYSWING HYSWING HDRDY* CPU1_DRDY#
R131 54.9 1% A6 C8
R124 54.9 1% K1
HXSCOMP HHIT*
B4 CPU1_HIT#
HYSCOMP HHITM* CPU1_HITM#
R135 24.9 1% A10 C5
R127 24.9 1% J1
HXRCOMP HLOCK*
E10 CPU1_LOCK#
HYRCOMP HTRDY* CPU1_TRDY#
width: 10mil, within 20mil A5 G7
CPU1_RS0# B6
HRS0* HDPWR*
B10
CPU1_DPWR#
CPU1_RS1# G10
HRS1* HCPURST*
E8
CPU1_CPURST#
CPU1_RS2# HRS2* HSLPCPU* CPU1_SLP#
A A
HSLPCPU* - GMCH : Enhanced mode (def.)
HSLPCPU* - ICH : Legacy mode
SAMSUNG
ELECTRONICS
4 3 2 1

8-12
 8-13
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
CALISTOGA (945GSE)
EXCEPT AS AUTHORIZED BY SAMSUNG. P1.5V
U504-2 R115
U504-3
945GSE 24.9
1% MEM1_ADM(7:0) 945GSE MEM1_ADQ(63:0)
A27 R28 0 AB30 AC31 0
D CLK1_DREFCLK# A26
DREF_CLKN EXP_ACOMPI
M28 1 AL31
SA_DM0 SA_DQ0
AB28 1
D
CLK1_DREFCLK J33
DREF_CLKP EXP_AICOMPO
2 AF30
SA_DM1 SA_DQ1
AE33 2
CLK1_DREFSSCLK# H33
DREF_SSCLKN
Y29 3 AK26
SA_DM2 SA_DQ2
AF32 3
CLK1_DREFSSCLK DREF_SSCLKP DMI_RXN0
Y32 DMI1_TXN0 4 AL9
SA_DM3 SA_DQ3
AC33 4
Y26
DMI_RXN1
Y28
DMI1_TXN1 5 AG7
SA_DM4 SA_DQ4
AB32 5
CLK1_MCH3GPLL# AA26
GCLKN DMI_RXP0
Y31 DMI1_TXP0 6 AK5
SA_DM5 SA_DQ5
AB31 6
CLK1_MCH3GPLL GCLKP DMI_RXP1
V28
DMI1_TXP1 7 AH3
SA_DM6 SA_DQ6
AE31 7
P1.5V A21
DMI_TXN0
V31
DMI1_RXN0 MEM1_ADQS(7:0) SA_DM7 SA_DQ7
AH31 8
C20
TVDACA_OUT DMI_TXN1
V29
DMI1_RXN1 0 AC28
SA_DQ8
AK31 9
E20
TVDACB_OUT DMI_TXP0
V32
DMI1_RXP0 1 AJ30
SA_DQS0 SA_DQ9
AL28 10
g
G23
TVDACC_OUT DMI_TXP1 DMI1_RXP1 2 AK33
SA_DQS1 SA_DQ10
AK27 11
TV_IREF_REFSET SA_DQS2 SA_DQ11
B21 AF33 3 AL25 AH30 12
CLK1_MCLK0
2/5 3/5
TV_IRTNA SM_CLK0 SA_DQS3 SA_DQ12
C21 AG33 4 AN9 AL32 13
D21
TV_IRTNB SM_CLK0*
AG1
CLK1_MCLK0# 5 AH8
SA_DQS4 SA_DQ13
AJ28 14
TV_IRTNC SM_CLK1 CLK1_MCLK1 SA_DQS5 SA_DQ14
un al
G26 AF1 6 AM2 AJ27 15
J26
TV_DCONSEL0 SM_CLK1*
AJ1
CLK1_MCLK1# 7 AE3
SA_DQS6 SA_DQ15
AH32 16
TV_DCONSEL1 SM_CLK2
AK1
MEM1_ADQS#(7:0) SA_DQS7 SA_DQ16
AF31 17
SM_CLK2* 0904-002420 SA_DQ17
H20 0904-002420 AM30 0 AC29 AH27 18
CRT3_DDCCLK H22
CRT_DDCCLK SM_CLK3
AN30 1 AK30
SA_DQS0* SA_DQ18
AF28 19
CRT3_DDCDATA R113 40.2 MCH1_VSYNC_R_MN
1% F27
CRT_DDCDATA SM_CLK3*
2 AJ33
SA_DQS1* SA_DQ19
AJ32 20
CRT3_VSYNC CRT_VSYNC SA_DQS2* SA_DQ20
CRT3_HSYNC R112 40.2 MCH1_HSYNC_R_MN
1% D27
CRT_HSYNC SM_CKE0
AN21
MEM1_CKE0
3 AM25
SA_DQS3* SA_DQ21
AG31 21
C25 AN22 4 AN8 AG28 22
CRT3_RED E25
CRT_RED SM_CKE1
AF26
MEM1_CKE1 5 AJ8
SA_DQS4* SA_DQ22
AG27 23
CRT3_GREEN CRT_GREEN SM_CKE2
6
SA_DQS5* SA_DQ23
24
ms nti
A24 AF25 AM3 AN27
CRT3_BLUE R626 150 1% D25
CRT_BLUE SM_CKE3
7 AE2
SA_DQS6* SA_DQ24
AM26 25
CRT_RED* SA_DQS7* SA_DQ25
R625 150 1% F25 AG14 AJ26 26
CRT_GREEN* SM_CS0* MEM1_CS0# SA_DQ26
0.022nF 5%50V
0.022nF 5%50V
0.022nF 5%50V

R624 150 1% A23 AF12 AK12 AJ25 27

H25
CRT_BLUE* SM_CS1*
AK14
MEM1_CS1# MEM1_ABS0 AH11
SA_BS0 SA_DQ27
AL27 28
C R107 249 1%
CRT_IREF SM_CS2*
AH12
MEM1_ABS1 AG17
SA_BS1 SA_DQ28
AN26 29
C
MEM1_ABS2
8. Block Diagram and Schematic

SM_CS3* SA_BS2 SA_DQ29

J27 AH25 30
SDVO_CTRLCLK SA_DQ30
H27 AE12 AJ17 AG26 31
T30
SDVO_CTRLDATA SM_ODT0
AF14 MEM1_ODT0 MEM1_ACAS# AK18
SA_CAS* SA_DQ31
AM12 32
T29
SDVO_FLDSTALL SM_ODT1
AJ14
MEM1_ODT1 MEM1_ARAS# AH17
SA_RAS* SA_DQ32
AL11 33
SDVO_FLDSTALL* SM_ODT2 MEM1_AWE# SA_WE* SA_DQ33
C621
C620
C619

M30 AJ12 AH9 34

SDVO_TVCLKIN SM_ODT3 P1.8V_AUX SA_DQ34
N30 AN28 AK9 35
Sa de
SDVO_TVCLKIN* SA_RCVENIN* SA_DQ35
AN12 MCH1_SMRCOMPN_R_MN R164 80.6 1% AM28 AM11 36
SMRCOMPN MEM1_AMA(13:0) SA_RCVENOUT* SA_DQ36
- This Document can not be used without Samsung's authorization -

P30 AN14 MCH1_SMRCOMPP_R_MN R163 80.6 AK11 37

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

1%
SDVOB_INT SMRCOMPP SA_DQ37
R30 AJ21 0 AJ15 AM8 38
SDVOB_INT* SMOCDCOMP0 SA_MA0 SA_DQ38
AF11 1 AM17 AK8 39
SMOCDCOMP1 P1.8V_AUX SA_MA1 SA_DQ39
N28 2 AM15 AG9 40
SDVOB_RED SA_MA2 SA_DQ40
P28
SDVOB_RED* SMVREF0
AA33 C126 100nF 10V 3 AH15
SA_MA3 SA_DQ41
AF9 41
P3.3V M32 AE1 C116 100nF 10V 4 AK15 AF8 42
SDVOB_GREEN SMVREF1 SA_MA4 SA_DQ42
nfi
N32 5 AN15 AK6 43
SDVOB_GREEN* SA_MA5 SA_DQ43
P33 W27 MCH1_RSTIN_R_MN R147 100 1% R165 6 AJ18 AF7 44
nostuff
P32
SDVOB_BLUE RSTIN*
AB29
PLT3_RST# 7 AF19
SA_MA6 SA_DQ44
AG11 45
nostuff SDVOB_BLUE* PWROK KBC3_PWRGD 10K SA_MA7 SA_DQ45
R109 R111 G21 1% 8 AN17 AJ6 46
T32
PM_BMBUSY*
J15
MCH3_BMBUSY# 9 AL17
SA_MA8 SA_DQ46
AH6 47
10K 10K SDVOB_CLKN PM_THRMTRIP* CPU1_THRMTRIP# SA_MA9 SA_DQ47
R32 F26 10 AG16 AN6 48
SDVOB_CLKP PM_EXTTS*_0
H26
MCH3_EXTTS0# 11 AL18
SA_MA10 SA_DQ48
AM6 49
PM_EXTTS*_1 MCH3_EXTTS1# R166 SA_MA11 SA_DQ49
H30 10K 12 AG18 AK3 50
LCD3_BRIT G29
L_BKLTCRTL
E31 1% 13 AL14
SA_MA12 SA_DQ50
AL2 51
MCH3_LCD_BKLTEN K30
L_BKLTEN ICHSYNC*
J22
MCH3_ICHSYNC# SA_MA13 SA_DQ51
AM5 52
MCH3_LCD_VDDEN F28
L_VDDEN CLKREQ* MCH3_CLKREQ# AH21
SA_DQ52
AL5 53
L_CTLA_CLK SB_BS0 SA_DQ53
E28 C18 AJ20 AJ3 54
L_CTLB_DATA CFG0 MCH1_BSEL0 SB_BS1 SA_DQ54
Co
E18 AE27 AJ2 55
D30
CFG1
G20
MCH1_BSEL1 SB_BS2 SA_DQ55
AG2 56
B LCD1_ACLK# C30
LA_CLKN CFG2
G18
MCH1_BSEL2 AG19
SA_DQ56
AF3 57 B
LCD1_ACLK G31
LA_CLKP CFG3
J20 AG21
SB_CAS* SA_DQ57
AE7 58
LCD1_ADATA0# H31
LA_DATAN0 CFG5
J18 Internal P.U. P3.3V AG20
SB_RAS* SA_DQ58
AF6 59
LCD1_ADATA0 F32
LA_DATAP0 CFG6
K28 R116 1K
SB_WE* SA_DQ59
AH5 60
LCD1_ADATA1# G32
LA_DATAN1 CFG19
1% AN20
SA_DQ60
AG3 61
LCD1_ADATA1 LA_DATAP1 R121 R119 SB_MA0 SA_DQ61
D31 K25 nostuff 2.2K 2.2K nostuff AL21 AG5 62
LCD1_ADATA2# C31
LA_DATAN2 RSVD_1
K26 AK21
SB_MA1 SA_DQ62
AF5 63
LCD1_ADATA2 LA_DATAP2 RSVD_2
K32
nostuff
AK22
SB_MA2 SA_DQ63
RSVD_3 R120 SB_MA3
A30 K31 2.2K AL22 K15
LB_CLKN RSVD_4 SB_MA4 RSVD_20
A29 R24 AH22 K21
LB_CLKP RSVD_5 SB_MA5 RSVD_21
F33 T24 AG22 K19
D33
LB_DATAN_0 RSVD_6
M10 CFG[0:2] = BSEL[0:2] = "100" AF21
SB_MA6 RSVD_22
K20
LB_DATAN_1 RSVD_7 SB_MA7 RSVD_23
F30 A18 Page 6 AM21 K24
LB_DATAN_2 RSVD_8 SB_MA8 RSVD_24
E33 AB10 AE21 Y25
LB_DATAP_0 RSVD_9 SB_MA9 RSVD_25
D32 AA10 AL20 Y24
F29
LB_DATAP_1 RSVD_10
C17 MCH_CFG5 : LOW=DIMX2 AE22
SB_MA10 RSVD_26
AB22
LB_DATAP_2 RSVD_11 VSS_NCTF SB_MA11 RSVD_27
K27
RSVD_12
A33
K22
HIGH=DIMX4 AE26
AE20
SB_MA12 RSVD_28
AB21
AB19
L_IBG RSVD_13 SB_MA13 RSVD_29
J29 J17 AB16
L_VBG RSVD_14 RSVD_30
R114 J30 K23 AB18 AB14
K29
L_VREFH RSVD_15
K17 Current Setting (def. : default Option) AB15
RSVD_37 RSVD_31
AA12
1.5K L_VREFL RSVD_16 RSVD_38 RSVD_32
1% K12 CFG# Low High AB13 W24
RSVD_17 RSVD_39 RSVD_33
G28 K13 AB12 AA24
LCD3_EDID_CLK H28
LDDC_CLK RSVD_18
K16
CFG(5) DMIx2 (default) DMIx4 AB17
RSVD_40 RSVD_34
AB24
LCD3_EDID_DATA LDDC_DATA RSVD_19 CFG(6) Reserved F18
RSVD_41 RSVD_35
AB20
RSVD_42 RSVD_36
CFG(19) DMI Lane Normal DMI Lane Reversal
A P3.3V A
R117 10K
SAMSUNG
MCH3_EXTTS0#
ELECTRONICS
R110 10K R108 0
MCH3_EXTTS1# MCH3_EXTTS1# CHP3_DPRSLPVR
R118 10K nostuff
MCH3_CLKREQ#

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS CALISTOGA (945GSE)
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS P1.05V U504-4 P1.8V_AUX P1.8V_AUX
EXCEPT AS AUTHORIZED BY SAMSUNG.
270uF * 2ea 945GSE
T26 AB33 C117 1000nF-X5R
6.3V EC2
VCC_1 VCCSM_1
C148 1000nF-X5R C174 C149 C150
C124 C125 C120 C122 C121
R26
VCC_2 VCCSM_2
AM32 6.3V 220uF 10000nF-X5R 4700nF
P26 AN29 2.5V 1000nF-X7R
10000nF 10000nF 100nF 100nF 100nF N26
VCC_3 VCCSM_3
AM29 AD 6.3V
6.3V 6.3V
6.3V 6.3V 10V 10V 10V VCC_4 VCCSM_4 nostuff
M26 AL29
D V19
VCC_5 VCCSM_5
AK29
D
VCC_6 VCCSM_6
U19 AJ29
VCC_7 VCCSM_7
T19 AH29
VCC_8 VCCSM_8
W18 AG29
VCC_9 VCCSM_9
V18 AF29
VCC_10 VCCSM_10
T18 AE29
VCC_11 VCCSM_11
R18 AN24
VCC_12 VCCSM_12
W17 AM24
VCC_13 VCCSM_13
U17 AL24
4/5
VCC_14 VCCSM_14
R17 AK24
g
VCC_15 VCCSM_15
W16 AJ24
VCC_16 VCCSM_16
V16 Y10 Y9 AH24
VCC_17 NC_1 NC_37 VCCSM_17
T16 W33 J19 AG24
VCC_18 NC_2 NC_38 VCCSM_18 P3.3V
R16 AM33 H19 AF24
VCC_19 NC_3 NC_39 VCCSM_19
un al
V15 AL33 G19 AE24
VCC_20 NC_4 NC_40 VCCSM_20
U15
VCC_21
C33
NC_5 NC_41
F19
VCCSM_21
AN18 C151 1000nF-X5R
T15 B33 E19 AN16 6.3V
P1.05V VCC_22
AN32
NC_6 NC_42
D19
VCCSM_22
AM16 C102 C96
NC_7 NC_43 VCCSM_23 100nF 10000nF
C84 100nF A14
VTT_1
A32
NC_8 NC_44
C19
VCCSM_24
AL16
10V 6.3V
10V D10 W10 B19 AK16
VTT_2 NC_9 NC_45 VCCSM_25
P9 AN31 A19 AJ16
EC503 C634 C104 C123 L9
VTT_3
W28
NC_10 NC_46
Y8
VCCSM_26
AN13
220uF 10000nF 100nF 100nF D9
VTT_4
V27
NC_11 NC_47
K18
VCCSM_27
AM13
2.5V AD 6.3V 10V 10V VTT_5 NC_12 NC_48 VCCSM_28
ms nti
P8 W25 G16 AL13
VTT_6 NC_13 NC_49 VCCSM_29 P1.5V
L8 V24 F16 AK13
VTT_7 NC_14 NC_50 VCCSM_30
D8 U24 E16 AJ13
VTT_8 NC_15 NC_51 VCCSM_31
P7 W29 D16 AH13
VTT_9 NC_16 NC_52 VCCSM_32
L7 V10 C16 AG13
C D7
VTT_10
J24
NC_17 NC_53
B16
VCCSM_33
AF13
C101 C78 C
8. Block Diagram and Schematic

C108 100nF A7
VTT_11
H24
NC_18 NC_54
AN2
VCCSM_34
AE13 100nF 10000nF
VTT_12 NC_19 NC_55 VCCSM_35 10V 6.3V
10V P6 W32 A16 AN10
VTT_13 NC_20 NC_56 VCCSM_36
L6 G24 Y7 AM10
VTT_14 NC_21 NC_57 VCCSM_37
G6 F24 AM4 AL10
VTT_15 NC_22 NC_58 VCCSM_38
D6 E24 AF4 AK10
VTT_16 NC_23 NC_59 VCCSM_39
U5 D24 AD4 AJ10
Sa de
VTT_17 NC_24 NC_60 VCCSM_40 P2.5V
P5 K33 AL4 AH10
VTT_18 NC_25 NC_61 VCCSM_41
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

L5 U10 AK4 AG10

VTT_19 NC_26 NC_62 VCCSM_42
G5 A31 W31 AF10
VTT_20 NC_27 NC_63 VCCSM_43
D5 E21 AJ4 AE10
VTT_21 NC_28 NC_64 VCCSM_44
Y4 C23 AH4 AN7
U4
VTT_22
AN19
NC_29 NC_65
AG4
VCCSM_45
AM7
C98 C100
P1.5V P1.5V P4
VTT_23
AM19
NC_30 NC_66
AE4
VCCSM_46
AL7
10nF 100nF
VTT_24 NC_31 NC_67 VCCSM_47
nfi
25V 10V
L4 AL19 AM1 AK7
VTT_25 NC_32 NC_68 VCCSM_48
G4 AK19 W30 AJ7
VTT_26 NC_33 NC_69 VCCSM_49
D4 AJ19 Y6 AH7 6.3V
BLM18PG181SN1 BLM18PG181SN1 VTT_27 NC_34 NC_70 VCCSM_50
B509 B510 Y3
VTT_28
AH19
NC_35 NC_71
AL1
VCCSM_51
AN4 C175 1000nF-X5R
U3 AN3 Y5 AH1 C152 1000nF-X5R P2.5V
VTT_29 NC_36 NC_72 VCCSM_52
P3 6.3V
VTT_30
L3 AN33 E26
C647 C648 C646 C633 C649 C631 G3
VTT_31
AA25
VSS_NCTF_1
AA16
VCCHV_1
D26
10000nF 10000nF 100nF 10000nF 10000nF 100nF D3
VTT_32
V25
VSS_NCTF_2 VSS_NCTF_11
AA15
VCCHV_2
C26 C99 C77
6.3V 6.3V 10V 6.3V 6.3V 10V
Y2
VTT_33
U25
VSS_NCTF_3 VSS_NCTF_12
AA14
VCCHV_3 100nF 4700nF
VTT_34 VSS_NCTF_4 VSS_NCTF_13 10V 6.3V
U2 AA22 AA13 C28
nostuff nostuff VTT_35 VSS_NCTF_5 VSS_NCTF_14 VCCDLVDS_1 nostuff
P2 AA21 A4 B28
VTT_36 VSS_NCTF_6 VSS_NCTF_15 VCCDLVDS_2
Co
L2 AA20 A3 A28
VTT_37 VSS_NCTF_7 VSS_NCTF_16 VCCDLVDS_3
G2 AA19 B2 B31
VTT_38 VSS_NCTF_8 VSS_NCTF_17 VCCA_LVDS
B D2
VTT_39
AA18
VSS_NCTF_9 VSS_NCTF_18
AN1
VSSA_LVDS
B32 B
P1.5V C632 100nF AA1 AA17 C1
P1.5V P1.5V VTT_40 VSS_NCTF_10 VSS_NCTF_19
10V Y1 D29
VTT_41 VCCTX_LVDS_1
U1 0904-002420 C29
VTT_42 VCCTX_LVDS_2

BLM18PG181SN1
P1 B20
VTT_43 VCCA_TVDACA_1 P1.5V
L1 A20
B506 G1
VTT_44 VCCA_TVDACA_2
B22
BLM18PG181SN1 C105 100nF F1
VTT_45 VCCA_TVDACB_1
A22
VTT_46 VCCA_TVDACB_2
10V D22
VCCA_TVDACC_1
AE5 C22

B507
VCCD_HMPLL_1 VCCA_TVDACC_2
AD5
VCCD_HMPLL_2
AD2 F20
VCCA_HPLL VCCDTVDAC
AD1 F22
VCCA_MPLL VCCDQTVDAC
B26 D23
VCCA_DPLLA VCCA_TVBG
J32 E23
EC502 C79 V26
VCCA_DPLLB VSSA_TVBG
220uF 100nF VCCA_3GPLL
2.5V AD 10V C250 C118 C24 U33
10000nF 100nF B24
VCCA_CRTDAC_1 VCC3G_1
T33
6.3V 10V VCCA_CRTDAC_2 VCC3G_2
B25 N33
VSSA_CRTDAC VCCA_3GBG P1.5V
J23 M33
VCC_SYNC VSSA_3GBG P2.5V
C643 C644 EC504
P1.05V P2.5V 220uF B508
C97 10000nF 10000nF
BLM18PG181SN1
2.5V
100nF 6.3V 6.3V
AD
VOLTAGE B8 BLM18PG181SN1 10V
A 1 3 R101 10
nostuff A
1%
BAT54 EC1 C80 C103
D8 47uF 100nF 22nF
C81 C82
SAMSUNG
6.3V AD 10V 50V
100nF 10000nF
10V 6.3V
SHORT4 ELECTRONICS
INSTPAR
4 3 2 1

8-14
 8-15
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
CALISTOGA (945GSE)
EXCEPT AS AUTHORIZED BY SAMSUNG.
P1.5V U504-5 P1.05V
945GSE
AD33 T25
D AD32
VCCAUX_1 VCC_NCTF_1
R25
D
C119 AD31
VCCAUX_2 VCC_NCTF_2
P25
100nF AD30
VCCAUX_3 VCC_NCTF_3
N25
10% VCCAUX_4 VCC_NCTF_4
10V AD29 AH33 G25 M25
VCCAUX_5 VSS_1 VSS_78 VCC_NCTF_5
AD28 Y33 A25 P24
VCCAUX_6 VSS_2 VSS_79 VCC_NCTF_6
AD27 V33 H23 N24
VCCAUX_7 VSS_3 VSS_80 VCC_NCTF_7
AC27 R33 F23 M24
VCCAUX_8 VSS_4 VSS_81 VCC_NCTF_8
AD26 G33 B23 Y22
VCCAUX_9 VSS_5 VSS_82 VCC_NCTF_9
AC26 AK32 AM22 W22
VCCAUX_10 VSS_6 VSS_83 VCC_NCTF_10
AB26 AG32 AJ22 V22
g
VCCAUX_11 VSS_7 VSS_84 VCC_NCTF_11
AE19 AE32 AF22 U22
VCCAUX_12 VSS_8 VSS_85 VCC_NCTF_12
AE18 AC32 G22 T22
VCCAUX_13 VSS_9 VSS_86 VCC_NCTF_13
AF17 AA32 E22 R22
VCCAUX_14 VSS_10 VSS_87 VCC_NCTF_14
5/5
AE17 U32 J21 P22
VCCAUX_15 VSS_11 VSS_88 VCC_NCTF_15
un al
AF16 H32 H21 N22
VCCAUX_16 VSS_12 VSS_89 VCC_NCTF_16
AE16 E32 F21 M22
VCCAUX_17 VSS_13 VSS_90 VCC_NCTF_17
AF15 C32 AM20 Y21
VCCAUX_18 VSS_14 VSS_91 VCC_NCTF_18
AE15 AM31 0904-002420 AK20 W21
VCCAUX_19 VSS_15 VSS_92 VCC_NCTF_19
J14 AJ31 AH20 V21
VCCAUX_20 VSS_16 VSS_93 VCC_NCTF_20
J10 AA31 AF20 U21
VCCAUX_21 VSS_17 VSS_94 VCC_NCTF_21
H10 U31 D20 T21
VCCAUX_22 VSS_18 VSS_95 VCC_NCTF_22
AE9 T31 W19 R21
VCCAUX_23 VSS_19 VSS_96 VCC_NCTF_23
AD9 R31 R19 P21
VCCAUX_24 VSS_20 VSS_97 VCC_NCTF_24
ms nti
U9 P31 AM18 N21
VCCAUX_25 VSS_21 VSS_98 VCC_NCTF_25
AD8 N31 AH18 M21
VCCAUX_26 VSS_22 VSS_99 VCC_NCTF_26
AD7 M31 AF18 Y20
P1.5V VCCAUX_27 VSS_23 VSS_100 VCC_NCTF_27
AD6 J31 U18 W20
VCCAUX_28 VSS_24 VSS_101 VCC_NCTF_28
F31 H18 V20
C AD25 AL30
VSS_25 VSS_102
D18
VCC_NCTF_29
U20
C
8. Block Diagram and Schematic

VCCAUX_NCTF_1 VSS_26 VSS_103 VCC_NCTF_30

AC25 AG30 AK17 T20
VCCAUX_NCTF_2 VSS_27 VSS_104 VCC_NCTF_31
AB25 AE30 V17 R20
VCCAUX_NCTF_3 VSS_28 VSS_105 VCC_NCTF_32
AD24 AC30 T17 P20
VCCAUX_NCTF_4 VSS_29 VSS_106 VCC_NCTF_33
AC24 AA30 F17 N20
VCCAUX_NCTF_5 VSS_30 VSS_107 VCC_NCTF_34
AD22 Y30 B17 M20
VCCAUX_NCTF_6 VSS_31 VSS_108 VCC_NCTF_35
AD21 V30 AH16 Y19
Sa de
VCCAUX_NCTF_7 VSS_32 VSS_109 VCC_NCTF_36
AD20 U30 U16 P19
VCCAUX_NCTF_8 VSS_33 VSS_110 VCC_NCTF_37
- This Document can not be used without Samsung's authorization -

AD19 G30 J16 N19

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

VCCAUX_NCTF_9 VSS_34 VSS_111 VCC_NCTF_38

AD18 E30 AL15 M19
VCCAUX_NCTF_10 VSS_35 VSS_112 VCC_NCTF_39
AD17 B30 AG15 Y18
VCCAUX_NCTF_11 VSS_36 VSS_113 VCC_NCTF_40
AD16 AA29 W15 P18
VCCAUX_NCTF_12 VSS_37 VSS_114 VCC_NCTF_41
AD15 U29 R15 N18
VCCAUX_NCTF_13 VSS_38 VSS_115 VCC_NCTF_42
AD14 R29 F15 M18
VCCAUX_NCTF_14 VSS_39 VSS_116 VCC_NCTF_43
nfi
K14 P29 D15 Y17
VCCAUX_NCTF_15 VSS_40 VSS_117 VCC_NCTF_44
AD13 N29 AM14 P17
VCCAUX_NCTF_16 VSS_41 VSS_118 VCC_NCTF_45
Y13 M29 AH14 N17
VCCAUX_NCTF_17 VSS_42 VSS_119 VCC_NCTF_46
W13 H29 AE14 M17
VCCAUX_NCTF_18 VSS_43 VSS_120 VCC_NCTF_47
V13 E29 H14 Y16
VCCAUX_NCTF_19 VSS_44 VSS_121 VCC_NCTF_48
U13 B29 B14 P16
VCCAUX_NCTF_20 VSS_45 VSS_122 VCC_NCTF_49
T13 AK28 F13 N16
VCCAUX_NCTF_21 VSS_46 VSS_123 VCC_NCTF_50
R13 AH28 D13 M16
VCCAUX_NCTF_22 VSS_47 VSS_124 VCC_NCTF_51
P13 AE28 AL12 Y15
VCCAUX_NCTF_23 VSS_48 VSS_125 VCC_NCTF_52
N13 AA28 AG12 P15
VCCAUX_NCTF_24 VSS_49 VSS_126 VCC_NCTF_53
M13 U28 H12 N15
VCCAUX_NCTF_25 VSS_50 VSS_127 VCC_NCTF_54
AD12 T28 B12 M15
VCCAUX_NCTF_26 VSS_51 VSS_128 VCC_NCTF_55
Co
Y12 J28 AN11 Y14
VCCAUX_NCTF_27 VSS_52 VSS_129 VCC_NCTF_56
W12 D28 AJ11 W14
VCCAUX_NCTF_28 VSS_53 VSS_130 VCC_NCTF_57
B V12
VCCAUX_NCTF_29
AM27
VSS_54 VSS_131
AE11
VCC_NCTF_58
V14 B
U12 AF27 AM9 U14
VCCAUX_NCTF_30 VSS_55 VSS_132 VCC_NCTF_59
T12 AB27 AJ9 T14
VCCAUX_NCTF_31 VSS_56 VSS_133 VCC_NCTF_60
R12 AA27 AB9 R14
VCCAUX_NCTF_32 VSS_57 VSS_134 VCC_NCTF_61
P12 Y27 W9 P14
VCCAUX_NCTF_33 VSS_58 VSS_135 VCC_NCTF_62
N12 U27 R9 N14
VCCAUX_NCTF_34 VSS_59 VSS_136 VCC_NCTF_63 P1.05V
M12 T27 M9 M14
VCCAUX_NCTF_35 VSS_60 VSS_137 VCC_NCTF_64
AD11 R27 J9
VCCAUX_NCTF_36 VSS_61 VSS_138
AD10 P27 F9 T10
VCCAUX_NCTF_37 VSS_62 VSS_139 VTT_NCTF_1
K10 N27 C9 R10
VCCAUX_NCTF_38 VSS_63 VSS_140 VTT_NCTF_2
M27 A9 P10
VSS_64 VSS_141 VTT_NCTF_3
G27 AL8 N10
VSS_65 VSS_142 VTT_NCTF_4
AE6 E27 AG8 L10
VSS_155 VSS_66 VSS_143 VTT_NCTF_5
AB6 C27 AE8 D1
VSS_156 VSS_67 VSS_144 VTT_NCTF_6
W6 B27 U8
VSS_157 VSS_68 VSS_145
T6 AL26 AA7 AD3
VSS_158 VSS_69 VSS_146 VSS_172
M6 AH26 V7 W3
VSS_159 VSS_70 VSS_147 VSS_173
K6 W26 R7 T3
VSS_160 VSS_71 VSS_148 VSS_174
AN5 U26 N7 B3
VSS_161 VSS_72 VSS_149 VSS_175
AJ5 AN25 H7 AK2
VSS_162 VSS_73 VSS_150 VSS_176
B5 AK25 E7 AH2
VSS_163 VSS_74 VSS_151 VSS_177
AA4 AG25 B7 AF2
VSS_164 VSS_75 VSS_152 VSS_178
V4 AE25 AL6 AB2
VSS_165 VSS_76 VSS_153 VSS_179
R4 J25 AG6 M2
VSS_166 VSS_77 VSS_154 VSS_180
N4 K2
VSS_167 VSS_181
K4 H2
VSS_168 VSS_182
H4 F2
VSS_169 VSS_183
E4 V1
A AL3
VSS_170 VSS_184
R1
A
VSS_171 VSS_185
SAMSUNG
ELECTRONICS

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
DDR SO-DIMM #0
D D
MEM1_ADQ(63:0)
g
ME POWER RAIL UNDER ME ENABLE
P1.8V_AUX
un al
DDR500-1 DDR500-2
DDR2-SODIMM-200P-RVS DDR2-SODIMM-200P-RVS
MEM1_AMA(13:0)
1/2 2/2
0 102 5 0 112 18
A0 DQ0 VDD1 VSS16
1 101 7 1 111 24
A1 DQ1 VDD2 VSS17
2 100 17 2 117 41
A2 DQ2 VDD3 VSS18
3 99 19 3 96 53
A3 DQ3 VDD4 VSS19
4 98 4 4 95 42
ms nti
A4 DQ4 VDD5 VSS20
5 97 6 5 118 54
A5 DQ5 VDD6 VSS21
6 94 14 6 81 59
A6 DQ6 VDD7 VSS22
7 92 16 7 82 65
A7 DQ7 P3.3V_M for AMT VDD8 VSS23
8 93 23 8 87 60
C 9 91
A8 DQ8
25 9 103
VDD9 VSS24
66
C
8. Block Diagram and Schematic

A9 DQ9 P3.3V VDD10 VSS25

10 105 35 10 88 127
A10_AP DQ10 VDD11 VSS26
11 90 37 11 104 139
A11 DQ11 VDD12 VSS27
12 89 20 12 128
A12 DQ12 VSS28
13 116 22 13 199 145
A13 DQ13 VDDSPD VSS29
86 36 14 165
A14 DQ14 C675 VSS30
84 38 15 C674 83 171
Sa de
A15 DQ15 100nF NC1 VSS31
85 43 16 2200nF 120 172
MEM1_ABS2 A16_BA2 DQ16 10V NC2 VSS32
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

45 17 10V 50 177
DQ17 NC3 VSS33
107 55 18 nostuff nostuff 69 187
MEM1_ABS0 BA0 DQ18 NC4 VSS34
106 57 19 163 178
MEM1_ABS1 BA1 DQ19 NCTEST VSS35
44 20 190
DQ20 MCH3_EXTTS0# VSS36
110 46 21 1 9
MEM1_CS0# S0* DQ21 VREF VSS37
115 56 22 21
MEM1_CS1# S1* DQ22 C217 VSS38
nfi
DQ23
58 23
100nF
C218 201
GND0 VSS39
33
30 61 24 P1.8V_AUX 2200nF 202 155
CLK1_MCLK0 CK0 DQ24 10V GND1 VSS40
32 63 25 10V 34
CLK1_MCLK0# CK0* DQ25 VSS41
164 73 26 47 132
CLK1_MCLK1 CK1 DQ26 nostuff VSS1 VSS42
166 75 27 R243 133 144
CLK1_MCLK1# CK1* DQ27 VSS2 VSS43
79 62 28 10K 183 156
MEM1_CKE0 CKE0 DQ28 VSS3 VSS44
80 64 29 1% 77 168
MEM1_CKE1 CKE1 DQ29 VSS4 VSS45
74 30 12 2
DQ30 VSS5 VSS46
113 76 31 48 3
MEM1_ACAS# CAS* DQ31 VSS6 VSS47
**NOTE AMT MODEL 108 123 32 R242 184 15
MEM1_ARAS# RAS* DQ32 VSS7 VSS48
109 125 33 10K 78 27
SMB3_CLK/DATA_M MEM1_AWE# WE* DQ33 VSS8 VSS49
135 34 1% 71 39
DQ34 VSS9 VSS50
Co
R692 10K 1% 198
SA0 DQ35
137 35 72
VSS10 VSS51
149
200 124 36 121 161
SA1 DQ36 VSS11 VSS52
B SMB3_CLK_S
197
SCL DQ37
126 37 122
VSS12 VSS53
28 B
195 134 38 196 40
SMB3_DATA_S SDA DQ38 VSS13 VSS54
136 39 193 138
DQ39 VSS14 VSS55
114 141 40 8 150
MEM1_ODT0 ODT0 DQ40 VSS15 VSS56
119 143 41 162
MEM1_ODT1 ODT1 DQ41 VSS57
151 42
MEM1_ADM(7:0) DQ42
0 10 153 43
DM0 DQ43
1 26 140 44 3709-001327
DM1 DQ44
2 52 142 45
DM2 DQ45
3 67 152 46
DM3 DQ46
4 130 154 47
DM4 DQ47
5 147 157 48
DM5 DQ48
6 170 159 49
DM6 DQ49
7 185 173 50
DM7 DQ50
175 51
MEM1_ADQS(7:0) DQ51
0 13 158 52
DQS0 DQ52 ME POWER RAIL UNDER ME ENABLE
1 31 160 53
DQS1 DQ53
2 51 174 54
DQS2 DQ54
3 70 176 55
DQS3 DQ55
4 131
DQS4 DQ56
179 56 Place near SO-DIMM0
5 148 181 57 P1.8V_AUX
DQS5 DQ57
6 169 189 58
DQS6 DQ58
7 188 191 59
DQS7 DQ59
180 60 EC6
MEM1_ADQS#(7:0) DQ60 C223 C222
0 11
DQS*0 DQ61
182 61 220uF C224 C225 C221 10000nF-X5R 10000nF-X5R
C685 C682 C683 C684
1 29 192 62 2.5V 2200nF 2200nF 2200nF 100nF 100nF 100nF 100nF
DQS*1 DQ62 AD 6.3V 6.3V
2 49 194 63 10V 10V 10V 10V 10V 10V 10V
DQS*2 DQ63
3 68 nostuff nostuff nostuff
A 4 129
DQS*3 A
DQS*4
5 146
DQS*5
6 167
7 186
DQS*6
DQS*7 SAMSUNG
ELECTRONICS
3709-001327
4 3 2 1

8-16
 8-17
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D ICH7-M B0 Stepping : QK65 D
PRTC_BAT
Internal VR Strap
Enable Pull up nostuff
(VccSus1_05 : NC)
R534 R533
Disable Pull down 680K 1M
1% 1%
LPC3_LAD(3:0)
g
AB1 AA6 0
RTXC1 LAD0
AB2 AB5 1
RTCX2 LAD1
AC4 2
LAD2
R507 10M
CHP3_RTCRST#
AA3
RTCRST* LAD3
Y6 3
un al
Y5 AC3
0.032768MHz INTRUDER* LDRQ0*
W4 AA5
INTVRMEN LDRQ1*_GPIO23
1 4
W1 AB3
Y1
EE_CS LFRAME* LPC3_LFRAME#
2 3 EE_SHCLK
C514 Y502 C513 Y2
EE_DOUT A20GATE
AE22
KBC3_A20G
0.007nF 0.007nF W3 AH28
EE_DIN A20M* CPU1_A20M# P1.05V
ICH_CPUSLP_R_MN
V3 AG27 R86 0
ms nti
LAN_CLK CPUSLP* CPU1_SLP#
U3 AF24 nostuff R87
LAN_RSTSYNC TP1_DPRSTP*
AH25 CPU1_DPRSTP# 56.2
U5
TP2_DPSLP* CPU1_DPSLP# 1%
C C8 FOR EMI V4
LAN_RXD0
AG26
C
LAN_RXD1 FERR* CPU1_FERR#
8. Block Diagram and Schematic

0.022nF T5 7-B3
LAN_RXD2 49-C3
50V AG24
U7
GPIO49_CPUPWRGD CPU1_PWRGDCPU
LAN_TXD0
V6 AG22
V7
LAN_TXD1 IGNNE*
AG21
CPU1_IGNNE#
LAN_TXD2 INIT3_3V*
ICH1-1 AF22
Sa de
x1 / x2 Docking INIT* CPU1_INIT#
R11 33 5% HDA3_AUD_BCLK_R_MN U1 AF25
P3.3V HDA3_AUD_BCLK ACZ_BIT_CLK INTR CPU1_INTR
82801GBM
- This Document can not be used without Samsung's authorization -

R535 33 HDA3_AUD_SYNC_R_MN R6
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

5%
ACZ_SYNC PORT X Line PU PD HDA3_AUD_SYNC ACZ_SYNC
AG23
RCIN* KBC3_CPURST#
1 1x2 / 2x1 STUFF NO_STUFF HDA3_AUD_RST#
R536 33 5% HDA3_AUD_RST#_R_MN R5
ACZ_RST* 1/5 P1.05V
AH24
NMI CPU1_NMI
0 4x1 NO_STUFF STUFF T2 AF23
HDA3_AUD_SDI0 ACZ_SDIN0 SMI* CPU1_SMI#
R562 T3
ACZ_SDIN1 R81
nfi
10K T1 AH22 56.2
ACZ_SDIN2 STPCLK* CPU1_STPCLK# 1%
nostuff R13 33 5% HDA3_AUD_SDO_R_MN T4 AF26 ICH_THERMTRIP_R_MN R85 27.4
HDA3_AUD_SDO ACZ_SDOUT THERMTRIP* 1% CPU1_THRMTRIP#
AF18
CHP3_SATALED# SATALED*
AB15
DD0
SAT1_RXN0 C542 10nF 25V SAT1_RXN0_C_MN AF3
SATA0RXN DD1
AE14
C541 10nF 25V SAT1_RXP0_C_MN AE3 AG13
SAT1_RXP0 C512 10nF 25V AG2
SATA0RXP DD2
AF13 *Layout Note
SAT1_TXN0 SAT1_TXN0_C_MN SATA0TXN DD3
C511 10nF 25V SAT1_TXP0_C_MN AH2 AD14 27.4ohm resistor needs
SAT1_TXP0 SATA0TXP DD4
AC13 to placed within 2" of ICH7-M
DD5
AF7 AD12
SATA2RXN DD6 56.2ohm must be placed
Co
AE7 AC12
SATA2RXP DD7 to placed within 2" of 27.4ohm w/o stub
AG6 AE12
SATA2TXN DD8
B AH6
SATA2TXP DD9
AF12 B
AB13
DD10
AF1 AC14
CLK1_SATA# AE1
SATA_CLKN DD11
AF14
CLK1_SATA SATA_CLKP DD12
AH13
DD13
AH10 AH14
P3.3V SATARBIASN DD14
AG10 AC15
SATARBIASP DD15
AF15 AH17
DIOR* DA0
AH15 AE17
DIOW* DA1
AF16 AF17
DDACK* DA2
R55 10K AH16
IDEIRQ
P3.3V_MICOM PRTC_BAT R56 4.7K 1% AG16 AE16
IORDY DCS1*
AE15 AD16
DDREQ DCS3*
C220 R58 0904-002053
1000nF 24.9

1
1%

VOLTAGE
RIGHT ANGLE D9

3
3711-000541 BAT54C
R214
20K Place near to the ICH7

2
MNT2
4 1%
MNT1
3
2 CHP3_RTCRST#
1 R215 1K
1%
A HDR-2P-SMD C219 A
J2 1000nF-X5R R671 CMOS
25V 1M
RESET
RTC Battery nostuff SAMSUNG
PLACE TO BOTTOM
BA39-00534A ARROUND WIBRO DOOR ELECTRONICS
BA39-00598A (New)

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY P3.3V nostuff
THIS DOCUMENT CONTAINS CONFIDENTIAL P3.3V AC caps : PCIE need to be within 250mils of the driver
nostuff
PROPRIETARY INFORMATION THAT IS nostuff Resistor for Test : Place Stuffing Option to minimize stubs
SAMSUNG ELECTRONICS CO’S PROPERTY. nostuff
ICH7-M
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. R545 R560 10K AF19 F26
GPIO21_SATA0GP PERN1 PEX1_MINIRXN1
10K R52 10K AH18
GPIO19_SATA1GP PERP1
F25
PEX1_MINIRXP1
P3.3V_AUX R57 10K AH19 WIRELESS LAN PETN1 C602
E28 ICH_PETN1_C_MN 100nF 10V
R561 10K AE19
GPIO36_SATA2GP
C601
E27 ICH_PETP1_C_MN 100nF 10V
PEX1_MINITXN1
P3.3V_AUX GPIO37_SATA3GP PETP1 PEX1_MINITXP1
E18 D7 C22 H26
C18
AD0 REQ0*
E7
PCI3_REQ0# SMB3_CLK B22
SMBCLK PERN2
H25
PEX1_MINRXN2
D A16
AD1 GNT0*
C16
SMB3_DATA A26
SMBDATA
HSDPA
PERP2
C600
G28 ICH_PETN2_C_MN 100nF 10V
PEX1_MINRXP2 D
AD2 REQ1* PCI3_REQ1# SMB3_LINKALERT# LINKALERT* PETN2 PEX1_MINTXN2
F18
AD3 GNT1*
D16
CHP3_SMLINK0 B25
SMLINK0 PETP2 C599
G27 ICH_PETP2_C_MN 100nF 10V
PEX1_MINTXP2
E16 C17 A25
A18
AD4 REQ2*
D17 PCI3_REQ2# CHP3_SMLINK1 SMLINK1
K26
AD5 GNT2* R576 PERN3 PEX1_LAN_RXN3
E17 E13 10K R605 10K 5% A28 K25
A17
AD6 REQ3*
F13 PCI3_REQ3# RI* GIGABIT LAN PERP3
C598
J28 ICH_PETN3_C_MN 100nF 10V
PEX1_LAN_RXP3
AD7 GNT3* PCI3_GNT3# PETN3 PEX1_LAN_TXN3
A15
AD8 GPIO22_REQ4*
A13
CHP3_BIOSWP# AUD3_SPKR A19
SPKR PETP3 C597
J27 ICH_PETP3_C_MN 100nF 10V
PEX1_LAN_TXP3
C14 A14 A27
E14
AD9 GPIO48_GNT4*
C8
CHP3_SUSSTAT# A22
SUS_STAT*
M26
D14
AD10 GPIO1_REQ5*
D8
ITP3_DBRRESET# SYS_RST* PERN4
M25
g
B12
AD11 SPI BOOT GPIO17_GNT5* AB18
PERP4
L28
AD12 MCH3_BMBUSY# GPIO0_BM_BUSY* PETN4
C13
AD13 C_BE0*
B15 R543 PETP4
L27
G15
G13
AD14 ICH1-2 C_BE1*
C12
D12
1K
5%
SMB3_ALERT#
B23
SMBALERT*_GPIO11 ICH1-3 P26
AD15 C_BE2* PERN5
E12 C15 AC20 82801GBM P25
un al
C11
AD16 82801GBM C_BE3* CHP3_PCISTP# AF21
GPIO18_STPPCI* PERP5
N28
D11
AD17
AD18 2/5 IRDY*
A7
PCI3_IRDY#
CHP3_CPUSTP# GPIO20_STPCPU* 3/5 PETN5
PETP5
N27
A11 E10 A21
AD19 PAR GPIO26
A10 B18 T25
AD20 PCIRST* P3.3V_AUX PERN6
F11 0904-002053 A12 B21 0904-002053 T24
F10
AD21 DEVSEL*
C9
PCI3_DEVSEL# E23
GPIO27 PERP6
R28
E9
AD22 PERR*
E11
PCI3_PERR# GPIO28 PETN6
R27
D9
AD23 PLOCK*
B10
PCI3_PLOCK# AG18
PETP6
B9
AD24 SERR*
F15
PCI3_SERR# PCI3_CLKRUN# GPIO32_CLKRUN*
V26
ms nti
AD25 STOP* PCI3_STOP# R568 DMI0RXN DMI1_RXN0
A8 F14 1K AC19 V25
A6
AD26 TRDY*
F16
PCI3_TRDY# U2
GPIO33_AZ_DOCK_EN* DMI0RXP
U28
DMI1_RXP0
C7
AD27 FRAME* PCI3_FRAME# GPIO34_AZ_DOCK_RST* DMI0TXN
U27 DMI1_TXN0
B6
AD28
C26 F20
DMI0TXP DMI1_TXP0
C E6
AD29 PLTRST*
A9
PLT3_RST# AH21
WAKE*
Y26
C
8. Block Diagram and Schematic

D6
AD30 PCICLK
B19 CLK3_PCLKICH CHP3_SERIRQ AF20
SERIRQ DMI1RXN
Y25 DMI1_RXN1
AD31 PME*
F21
THM3_ALERT# THRM* DMI1RXP
W28
DMI1_RXP1
A3
TP3
AD22
DMI1TXN
W27 DMI1_TXN1
PCI3_INTA# B4
PIRQA* VRM3_CPU_PWRGD VRMPWRGD DMI1TXP DMI1_TXP1
PCI3_INTB# C5
PIRQB*
G8 AB26
PCI3_INTC# B5
PIRQC* GPIO2_PIRQE*
F7
PCI3_INTE# AC1
DMI2RXN
AB25
Sa de
PCI3_INTD# PIRQD* GPIO3_PIRQF*
F8
PCI3_INTF# CLK3_ICH14 B2
CLK14 DMI2RXP
AA28
GPIO4_PIRQG* PCI3_INTG# CLK3_USB48 CLK48 DMI2TXN
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

AE5 G7 AA27
AD5
SATA1RXN GPIO5_PIRQH* FFS3_INT C20
DMI2TXP
SATA1RXP SUSCLK
AG4 AD25
SATA1TXN DMI3RXN
AH4 B24 AD24
AD9
SATA1TXP CHP3_SLPS3# D23
SLP_S3* DMI3RXP
AC28
AE9
SATA3RXN Internallly ANDed with the PWROK input CHP3_SLPS4# F22
SLP_S4* DMI3TXN
AC27
SATA3RXP CHP3_SLPS5# SLP_S5* DMI3TXP
nfi
AG8 AH20
AH8
SATA3TXN MCH_SYNC* MCH3_ICHSYNC# AA4 AE28
SATA3TXP KBC3_PWRGD PWROK DMI_CLKN CLK1_PCIEICH#
R9 10K AE27
AC22
DMI_CLKP CLK1_PCIEICH
CHP3_DPRSLPVR GPIO16_DPRSLPVR
C25 P1.5V_PCIE
P3.3V_AUX DMI_ZCOMP
R574 10K C21
TP0_BATLOW* DMI_IRCOMP
D25 R600 24.9
ICH7 BOOT BIOS SELECT R601
ICH_PWRBTN_R_MN
1K C23 D3
1%
KBC3_PWRBTN# PWRBTN* OC0*
C4 P3.3V_AUX
SPI PCI LPC OC1*
R602 0 C19 D5
PLT3_RST# LAN_RST* OC2*
GNT5* 0 1 1 OC3*
D4 R546 1K 5%
Y4 E5
GNT4* 1 0 1 KBC3_RSMRST# RSMRST* OC4*
Co
R10 100K 1%
GPIO29_OC5*
C3 R510 1K 5%
AC21 A2
Default : LPC Boot P3.3V P3.3V_AUX GPIO6 GPIO30_OC6*
B KBC3_RUNSCI#
AC18
GPIO7 GPIO31_OC7*
B3 B
(0 : Pull Down / 1 : Default) E21
KBC3_EXTSMI# E20
GPIO8
F1
A20
GPIO9 USBP0N USB3_P0-
GPIO10 USB PORT-1 USBP0P F2 USB3_P0+
F19 G4
E19
GPIO12 USBP1N USB3_MINIPCIE1-
R564 KBC3_WAKESCI# GPIO13 Wireless LAN USBP1P G3 USB3_MINIPCIE1+
10K R4 H1
GPIO14 USBP2N USB3_P2-
1% R573 10K E22 USB PORT-2 USBP2P H2
R3
GPIO15
J4 USB3_P2+
GPIO24 USBP3N USB3_MINIPCIE2-
R572 1K D20
GPIO25 BIOS RESET
WIMAX USBP3P J3
5%
AD21 K1 USB3_MINIPCIE2+
CHP3_SATACLKREQ# nostuff GPIO35_SATACLKREQ* USBP4N USB3_MMC-
CHP3_RFOFF# AD20
GPIO38 MMC USBP4P K2 USB3_MMC+
AE20 L4
CHP3_3GOFF# GPIO39 USBP5N USB3_BLUETOOTH-
BLUETOOTH USBP5P L5 USB3_BLUETOOTH+
R2 M1
HST3_SPI3_CLK P6
SPI_CLK
USB PORT-3 USBP6N M2 USB3_P6-
P3.3V HST3_SPI3_CS# P1
SPI_CS* USBP6P
N4
USB3_P6+
P3.3V SPI_ARB CAMERA USBP7N N3 USB3_CAMERA-
USBP7P USB3_CAMERA+
P2 D2
HST3_SPI3_DO P5
SPI_MISO USBRBIAS*
D1
USB CONFIG.
HST3_SPI3_DI SPI_MOSI USBRBIAS
USB 0 : PORT#1
R579 R606 USB 1 : WIRELESS LAN
2.2K 2.2K R508 USB 2 : PORT#2
22.6

G
USB 3 : WIMAX

1
1% USB 4 : MMC
USB 5 : BLUETOOTH
SMB3_CLK SMB3_CLK_S

S
P3.3V USB 6 : PORT#3

2
USB 7 : CAMERA

3
Q502
RHU002N06
VOLTAGE
A A

G
1
SMB3_DATA SMB3_DATA_S
SAMSUNG

S
R565 10K

2
CHP3_PCISTP#

3
Q507
RHU002N06
VOLTAGE
R578 0 ELECTRONICS
R603 0 R563 10K
CHP3_CPUSTP#
4 3 2 1

8-18
 8-19
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. AD17 L11
V5REF_1 VCC1_05_1 P1.05V
G10 L12
V5REF_2 VCC1_05_2
F6 L14
ICH7-M
V5REF_SUS VCC1_05_3
L16
VCC1_05_4
AA22 L17
VCC1_5_B_1 VCC1_05_5
AA23 L18 EC500
P5.0V_AUX P3.3V_AUX P5.0V P3.3V VCC1_5_B_2 VCC1_05_6 C582
D AB22
VCC1_5_B_3 VCC1_05_7
M11 C579 C578 1000nF 220uF D
AB23 M18 100nF 100nF 6.3V 2.5V
VCC1_5_B_4 VCC1_05_8 AD
AC23 P11 10V 10V
VOLTAGE 1 VOLTAGE 1 VCC1_5_B_5 VCC1_05_9
R27 D1 R537 D501 AC24 P18
AC25
VCC1_5_B_6 VCC1_05_10
T11 within 100 mils
10 BAT54 100 BAT54 VCC1_5_B_7 VCC1_05_11 nearby Pin M18, U18
1% 3 1% 3 AC26 T18
VCC1_5_B_8 VCC1_05_12
AD26 U11
VCC1_5_B_9 VCC1_05_13
AD27 U18
VCC1_5_B_10 VCC1_05_14
AD28 V11
VCC1_5_B_11 VCC1_05_15
nearby F6 C557 nearby G10 C558 D26
VCC1_5_B_12 VCC1_05_16
V12
100nF 100nF D27 V14
g
VCC1_5_B_13 VCC1_05_17
10V 10V D28 V16
VCC1_5_B_14 VCC1_05_18 P3.3V
E24 V17
VCC1_5_B_15 VCC1_05_19
E25
E26
VCC1_5_B_16 ICH1-4 VCC1_05_20
V18
VCC1_5_B_17
F23 82801GBM V1 C551 within 100 mils
un al
VCC1_5_B_18 VCCSUS3_3_VCCLAN3_3_1
F24
VCC1_5_B_19 VCCSUS3_3_VCCLAN3_3_2
V5 100nF nearby Pin V5
P1.5V P1.5V_PCIE
G22
VCC1_5_B_20 4/5 VCCSUS3_3_VCCLAN3_3_3
W2 10V
P3.3V_AUX P3.3V
G23 W7
VCC1_5_B_21 VCCSUS3_3_VCCLAN3_3_4
B505 H22
VCC1_5_B_22 0904-002053
BLM18PG181SN1 H23 R7
VCC1_5_B_23 VCCSUS3_3_VCCSUSHDA
J22 U6
VCC1_5_B_24 VCC3_3_VCCHDA
J23
VCC1_5_B_25 P1.05V
C580 K22
VCC1_5_B_26 V_CPU_IO_1
AE23 C552 C550
C604 C577 C575 K23 AE26
ms nti
100nF 100nF
10000nF-X5R VCC1_5_B_27 V_CPU_IO_2
100nF 100nF 100nF L22 AH26 10V 10V
6.3V VCC1_5_B_28 V_CPU_IO_3
10V 10V 10V L23
M22
VCC1_5_B_29
AB12 C58 C574 C57
VCC1_5_B_30 VCC3_3_3 4700nF
within 100mils M23 AB20 100nF 100nF
C N22
VCC1_5_B_31 VCC3_3_4
AC16 10V 10V
6.3V C
nearby D28, T28, AD28 VCC1_5_B_32 VCC3_3_5
8. Block Diagram and Schematic

N23 AD13
P22
VCC1_5_B_33 VCC3_3_6
AD18
within 100 mils
P23
VCC1_5_B_34 VCC3_3_7
AG12 nearby Pin AE23, AH26 P3.3V
VCC1_5_B_35 VCC3_3_8
R22 AG15
VCC1_5_B_36 VCC3_3_9
R23 AG19
VCC1_5_B_37 VCC3_3_10
R24 AH11
Sa de
VCC1_5_B_38 VCC3_3_11
R25
VCC1_5_B_39 VCC3_3_12
B13 C585 C560 C561 C7 C544
- This Document can not be used without Samsung's authorization -

R26 B16 100nF 100nF 100nF 100nF 100nF

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

VCC1_5_B_40 VCC3_3_13
T22 B27 10V 10V 10V 10V 10V
VCC1_5_B_41 VCC3_3_14 nostuff nostuff
T23 B7
VCC1_5_B_42 VCC3_3_15
T26
VCC1_5_B_43 VCC3_3_16
C10 Distribute in PCI section
T27 D15
P3.3V VCC1_5_B_44 VCC3_3_17
T28 F9
VCC1_5_B_45 VCC3_3_18
nfi
U22 G11
VCC1_5_B_46 VCC3_3_19
U23 G12
VCC1_5_B_47 VCC3_3_20 PRTC_BAT
V22 G16
VCC1_5_B_48 VCC3_3_21
C562 V23
within 100 mils 100nF W22
VCC1_5_B_49
W5
VCC1_5_B_50 VCCRTC
10V W23
VCC1_5_B_51
Y22
VCC1_5_B_52 VCCSUS3_3_1
A24 C548 C549
Y23 C24 100nF 100nF
P1.5V VCC1_5_B_53 VCCSUS3_3_2
B7 D19 10V 10V
within 100 mils A5
VCCSUS3_3_3
D22
BLM18PG181SN1 nearby AG28 VCC3_3_1 VCCSUS3_3_4
R82 2.2 AG28
VCCDMIPLL VCCSUS3_3_5
E3
R83 2.2 G19 P3.3V_AUX
C76 VCCSUS3_3_6
Co
10000nF
C75 A1
VCC1_5_A_1 VCCSUS3_3_7
K3
10nF P1.5V AB10 K4
6.3V VCC1_5_A_2 VCCSUS3_3_8
B 25V AB17
VCC1_5_A_3 VCCSUS3_3_9
K5 B
AB7
VCC1_5_A_4 VCCSUS3_3_10
K6 C603 C583 C555 C554 within 100 mils
AB8
VCC1_5_A_5 VCCSUS3_3_11
L1 100nF 100nF 100nF 100nF nearby Pin C24, G19, K5, M6
within 100 mils C515 AB9
VCC1_5_A_6 VCCSUS3_3_12
L2 10V 10V 10V 10V
100nF AC10 L3
VCC1_5_A_7 VCCSUS3_3_13 nostuff
10V AC17 L6
VCC1_5_A_8 VCCSUS3_3_14
AC6 L7
P3.3V VCC1_5_A_9 VCCSUS3_3_15
M6
VCCSUS3_3_16
AD2 M7
VCCSATAPLL VCCSUS3_3_17 P1.5V
AA7 N7
VCC3_3_2 VCCSUS3_3_18
within 100 mils C547 AC7
VCC1_5_A_10 VCC1_5_A_19
AF9
100nF P1.5V AC8 AG5
within 100 mils VCC1_5_A_11 VCC1_5_A_20
10V
nearby AC10 AD10
VCC1_5_A_12 VCC1_5_A_21
AG9 C543 C584 within 100 mils
AD6
VCC1_5_A_13 VCC1_5_A_22
AH5 100nF 100nFnearby Pin AG9, F17
AE10 AH9 10V 10V
VCC1_5_A_14 VCC1_5_A_23
C545 C546 AE6
VCC1_5_A_15 VCC1_5_A_24
F17
1000nF-X7R 100nF AF10 G17
VCC1_5_A_16 VCC1_5_A_25
6.3V 10V AF5
P3.3V_AUX VCC1_5_A_17
AF6 C28
VCC1_5_A_18 VCCSUS1_05_1
G20
VCCSUS1_05_2 P1.5V
P7 K7
VCCSUS3_3_19 VCCSUS1_05_3
within 100 mils C553 C1
VCCUSBPLL VCC1_5_A_26
H6
100nF P1.5V H7
VCC1_5_A_27
10V AA2
VCCSUS1_05_VCCLAN1_05_1 VCC1_5_A_28
J6 C556 within 100 mils
Y7
VCCSUS1_05_VCCLAN1_05_2 VCC1_5_A_29
J7 100nFnearby Pin J7
T7 10V
A C516
VCC1_5_A_30 A
within 100 mils
100nF
10V
SAMSUNG
ELECTRONICS

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
ICH7-M
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

M12
M13
M14
M15
M16
M17
M24
H27
H28

K24
K27
K28
L13
L15
L24
L25
L26
J24
J25
J26
H3
H4
H5
J1
J2

J5
A23 M27

VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_1 VSS_124
A4 M28
D AA1
VSS_2 VSS_125
M3
D
VSS_3 VSS_126
AA24 M4
VSS_4 VSS_127
AA25 M5
VSS_5 VSS_128
AA26 N1
P3.3V_AUX VSS_6 VSS_129
AB11 N11
VSS_7 VSS_130
AB14 N12
VSS_8 VSS_131
AB16 N13
VSS_9 VSS_132
R91 10K AB19 N14
CHP3_SMLINK0 VSS_10 VSS_133
ICH7-M Options R90 10K
CHP3_SMLINK1 AB21
AB24
VSS_11 VSS_134
N15
N16
g
VSS_12 VSS_135
R88 10K AB27 N17
Function Default SMB3_ALERT# AB28
VSS_13 VSS_136
N18
VSS_14 VSS_137
R604 2.2K AB4 N2
CHP3_SPKR No Reboot No Stuff SMB3_DATA VSS_15 VSS_138
R575 2.2K
SMB3_CLK AB6
VSS_16 VSS_139
N24
AC97_SDOUT Safe Mode TBD AC11 N25
un al
AC2
VSS_17
VSS_18
ICH1-5 VSS_140
VSS_141
N26
P3.3V AC5 N5
P3.3V_AUX AC9
VSS_19 82801GBM VSS_142
N6
VSS_20 VSS_143
nostuff
AD1
AD11
VSS_21 5/5 VSS_144
P12
P13
VSS_22 VSS_145
R60 1K 1%
AUD3_SPKR R611 1K 1%
PEX3_WAKE# AD15
VSS_23 VSS_146
P14
R12 10K AD19 0904-002053 P15
HDA3_AUD_SDO AD23
VSS_24 VSS_147
P16
VSS_25 VSS_148
Wake on PCI-E, OD, Pull-up to ALWAYS power AD3 P17
ms nti
nostuff VSS_26 VSS_149
AD4 P24
VSS_27 VSS_150
AD7 P27
VSS_28 VSS_151
AD8 P28
VSS_29 VSS_152
AE11 P3
C AE13
VSS_30 VSS_153
P4
C
8. Block Diagram and Schematic

P3.3V VSS_31 VSS_154

AE18 R1
VSS_32 VSS_155
AE2 R11
VSS_33 VSS_156
AE21 R12
VSS_34 VSS_157
R89 10K
SMB3_LINKALERT# AE24
VSS_35 VSS_158
R13
AE25 R14
VSS_36 VSS_159
R54 10K AE4 R15
Sa de
PCI3_CLKRUN# AE8
VSS_37 VSS_160
R16
VSS_38 VSS_161
- This Document can not be used without Samsung's authorization -

R48
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

10K AF11 R17

PCI3_PERR# VSS_39 VSS_162
R567 10K AF2 R18
R47 10K PCI3_PLOCK# AF27
VSS_40 VSS_163
T12
PCI3_DEVSEL# VSS_41 VSS_164
R571 10K
PCI3_FRAME# AF28
VSS_42 VSS_165
T13
R570 10K AF4 T14
PCI3_STOP# VSS_43 VSS_166
R43 10K
PCI3_SERR# AF8
VSS_44 VSS_167
T15
nfi
R46 10K AG1 T16
R569 10K PCI3_IRDY# AG11
VSS_45 VSS_168
T17
PCI3_TRDY# AG14
VSS_46 VSS_169
T6
VSS_47 VSS_170
AG17 U12
VSS_48 VSS_171
R28 10K
PCI3_INTA# AG20
VSS_49 VSS_172
U13
R44 10K AG25 U14
PCI3_INTB# VSS_50 VSS_173
R42 10K
PCI3_INTC# AG3
VSS_51 VSS_174
U15
R45 10K AG7 U16
PCI3_INTD# AH1
VSS_52 VSS_175
U17
VSS_53 VSS_176
AH12 U24
VSS_54 VSS_177
R540 10K AH23 U25
PCI3_INTE# VSS_55 VSS_178
R541 10K
PCI3_INTF# AH27
VSS_56 VSS_179
U26
Co
R539 10K AH3 U4
PCI3_INTG# VSS_57 VSS_180
R538 10K
FFS3_INT AH7
VSS_58 VSS_181
V13
B B1
VSS_59 VSS_182
V15 B
B11 V2
VSS_60 VSS_183
R544 10K B14 V24
R59 10K PCI3_REQ0# B17
VSS_61 VSS_184
V27
PCI3_REQ1# VSS_62 VSS_185
R61 10K
PCI3_REQ2# B20
VSS_63 VSS_186
V28
R542 10K B26 W24
PCI3_REQ3# B28
VSS_64 VSS_187
W25
VSS_65 VSS_188
B8 W26
VSS_66 VSS_189
C2 W6
VSS_67 VSS_190
R53 10K C27 Y24
CHP3_SERIRQ C6
VSS_68 VSS_191
Y27
VSS_69 VSS_192
D10 Y28
VSS_70 VSS_193

VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
D13 Y3
VSS_71 VSS_194
R84 10K
KBC3_CPURST#
R272 10K
KBC3_A20G

D18
D21
D24
E1
E15
E2
E4
E8
F12
F27
F28
F3
F4
F5
G1
G14
G18
G2
G21
G24
G25
G26
G5
G6
G9
H24
R566 1K
PCI3_GNT3#
A A
SAMSUNG
ELECTRONICS
4 3 2 1

8-20
 8-21
4 3 2 1
SPI_BIOS_ROM
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
02 VERIFY REAL MODE 66 CONFIGURE ADVANCE CACHE REG.
D 03 DISABLE NMI 6A DISPLAY EXTERNAL CACHE SIZE D
04 GET CPU TYPE 6C DISPLAY SHADOW MESSAGE
06 INIT. SYSTEM H/W 6E DISPLAY NON-DISPOSABLE SEGMENT
08 INIT. CHIPSET REG. 70 DISPLAY ERROR MESSAGE
09 SET IN POST FLAG 72 CHECK FOR CONFIGURATION ERROR
0A INIT CPU.REG 74 TEST REAL-TIME CLOCK
g
0B CPU CACHE ON 76 CHECK FOR KEYBOARD EERROR
16MBit 0C INIT.CACHE TO POST 7C SETUP HARDWARE INTERRUPT VECTOR
OE INIT. I/O VALUE 7E TEST COPROCESSER IF PRESENT
un al
0F ENABLE THE L-BUS IDE 80 DISABLE ON-BOARD I/O PORT
P3.3V_MICOM_SW 10 INIT. POWER MANAGER 82 DETECT AND INSTALL EXT.RS232C
P3.3V_MICOM_SW
11 LOAD ALTERNATE REG. 84 DETECT AND INSTALL EXT.PARALLEL
10K 1% 13 PCI BUS MASTER RESET 86 RE-INIT. ON-BOARD I/O PORT
R50
10K U5 WITH INITIAL POST VALUE 88 INIT. BIOS DATA ROM
MX25L1605D R51
ms nti
nostuff
KBC3_SPI_CS# 34-A4 1
CE* VDD
8
SPI3_HOLD#_MN
14 INIT. KEYBOARD CONTROLLER 8A INIT.EXTENDED BIOS DATA AREA
KBC3_SPI_DI 2 7
SO HOLD* 16 CHECK CHECKSUM 8C INIT. FDD CONTROLLER
34-B3
34-B4 SPI3_WP#_MN 3 6 34-B4
KBC3_SPI_WP# 4
WP* SCK
5 34-B4
KBC3_SPI_CLK
C KBC3_SPI_DO 18 8254 TIMER INIT. 9A SHADOW OPTION ROMS C
1

VSS SI
D5
BAT54C
8. Block Diagram and Schematic

1A 8237 DMA CONTROLLER INIT. 9C SETUP POWER MANAGEMENT

3

R49 1107-001709
10K
C44
100nF 1C RESET INTERRUP CONTROLLER 9E ENABLE H/W INTERRUPT
22-B3 10V
2

CHP3_BIOSWP# 20 TEST DRAM REFRESH A0 SET TIME OF DAY

Sa de
22 TEST 8742 KEYBOARD CONTROLLER A4 INIT. TYPEMATIC RATE
- This Document can not be used without Samsung's authorization -

24 SET ES SEGMENT REG. TO 4GB A8 ERASE F2 PROMPT

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

26 ENABLE A20 AA SCAN FOR F2 KEY STROKE

28 AUTO SIZING DRAM AC ENTER SETUP
32 COMPUTE THE CPU SPEED AE CLEAR IN POST FLAG
nfi
34 TESET CMOS RAM B0 CHECK FOR ERRORS
38 SHADOW SYSTEM BIOS ROM B2 POST DONE-PREPARE TO BOOT O/S
3A AUTO SIZING CACHE B4 ONE BEEP
3C CONFIGURE ADVANCED CHIPSET REG. B6 CHECK PASSWORD (OPTION)
3D LOAD ALTER REG. WITH CMOS VALUE B7 ACPI INIT
42 INIT. INTERRUPT VECTOR BA DMI INIT
44 INIT. BIOS INTERRUPT BE CLEAR SCREEN
Co
46 CHECK ROM COPYRIGHT NOTICE C0 TRY BOOT WITH INT19
B B
80H DECODER CONNECTOR 47 INIT. I20 SUPPORT IF INSTALLED D0 INTERRUPT HANDLER ERROR
48 CHECK VIDEO CONFIGURE AGAINST CMOS D2 UNKNOWN INTERRUPT ERROR
49 INIT. PCI BUS AND DEVICE D4 PENDING INTERRUPT ERROR
4A INIT. ALL VIDEO BIOS ROM D6 SHUTDOWN 5
4C SHADOW VIDEO BIOS ROM D8 SHUTDOWN ERROR
P3.3V
50 DISPLAY CPU TYPE AND SPEED DA EXTENDED BLOCK MOVE
J510 52 TEST KEYBOARD
HDR-10P-1R-SMD DC SHUTDOWN 10
54 SET KEYCLICK IF ENABLED
1 89 ENABLE NMI
2 56 ENABLE KEYBOARD 90 INIT. HDD CONTROLLER
PLT3_RST# 3
CLK3_DBGLPC 4 58 TEST FOR UNEXPECTED INTERRUPTS 91 INIT. LOCAL BUS HDD CONTROLLER
LPC3_LFRAME# 5 5A DISPLAY " PRESS ...... SETUP" 92 JUMP TO USER PATCH 2
LPC3_LAD(3) 6
LPC3_LAD(2) 7 5C TEST RAM GETWEEN 512K AND 640K 94 DISABLE A20 ADDRESS LINE
LPC3_LAD(1) 8
LPC3_LAD(0) 9 60 TEST EXTENDED MEMORY 96 CLEAR HUGE ES SEGMENT REG.
10
11 MNT1 62 TEST EXTENDED MEMORY ADDRESS LINE 98 SEARCH FOR OPTION ROMS
12
MNT2 64 JUMP TO USER PATCH 1
3711-000386
A A
SAMSUNG
ELECTRONICS

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D LCD_VDD3.3V P3.3V VDC_LED P3.3V P3.3V P5.0V
D
BLM18PG181SN1

C4 C6 C14 C13
100nF 100nF 100nF 100nF
B18

10V 10V 10V 10V

2.2K
g 2.2K

P3.3V
un al
R6
R5

5
1 +
KBC3_BKLTON
2 4 LCD3_BKLTON
-
3 U1
R16 R17 7SZ08
J500 100K 100K
SOCK-30P-2R-SMD-MNT MCH3_LCD_BKLTEN 1% 1%
1 2
ms nti
3 4
LCD3_BRIT 5 6
7 8
9 10
C 11 12 C
8. Block Diagram and Schematic

13 14
15 16 For EBL.
LCD1_ACLK 17 18 LCD1_ADATA2 P5.0V_ALW P3.3V_AUX LCD_VDD3.3V
LCD1_ACLK# 19 20 LCD1_ADATA2#
LCD1_ADATA1 21 22 LCD1_ADATA0 Q2
LCD1_ADATA1# 23 24 LCD1_ADATA0# SI2315BDS-T1
R2
Sa de
25 26 LCD3_EDID_CLK

3
200K

2
27 28 LCD3_EDID_DATA
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

1%

D
S
29 30
31

1
C1

G
MNT1
32 C5
MNT2 R1 330nF
100nF
51.1K 1% 10V
3710-002498
nfi
D 3
Q1
R4 10K G RHU002N06
MCH3_LCD_VDDEN 1% 1
R8 0 USB3_CAMERA-_B_MN S 2
USB3_CAMERA-
USB3_CAMERA+ R7 0 USB3_CAMERA+_B_MN R3
100K
1%
2 3 VDC
Co
B B
1 4 nostuff Must be changed to AO3409
Q6 VDC_LED
B500
SI2307BDS-T1-E3
ACM2012-900-2P-T

3
2

D
S
R26

1
C17 C15 C16

G
150K 100nF 100nF 100nF
1%
R25 25V 25V 25V
51.1K 1%
R14
43.2K
1%
D 3
Q3
R15 10K 1%
G RHU002N06
LCD3_BKLTON
1
S 2
A A
SAMSUNG
ELECTRONICS
4 3 2 1

8-22
 8-23
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
VCC_CRT P5.0V
D4
MMBD4148
VOLTAGE
3 1
C34
100nF
g
U3 10V
SN74AHCT1G125DCKR
5
CRT3_HSYNC 2 +
-
4 R39 40.2 5%
CRT5_HSYNC
un al
OE*
3
1
ms nti
VCC_CRT
C P5.0V C
8. Block Diagram and Schematic

U4 C35
100nF
SN74AHCT1G125DCKR
10V
VOLTAGE 1
5
2 + 4 R37 40.2 5% MMBD4148
CRT3_VSYNC OE*
- CRT5_VSYNC D500
Sa de
3
3
1
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

BLM18PG181SN1
B503
nfi
C534
P3.3V P3.3V VCC_CRT CRT CONNECTOR 100nF
10V J504
DSUB-15-3R-F
L503 82nH CRT3_RED_L_MN 1
CRT3_RED 6
R40 R38
11
G

2.2K 2.2K
1

L501 82nH CRT3_GREEN_L_MN 2

CRT3_GREEN 7
S

CRT3_DDCDATA CRT5_DDCDATA 12

1%
2

1%

1%
L502 82nH CRT3_BLUE_L_MN 3
VOLTAGE
RHU002N06
Q7

CRT3_BLUE
Co
8

150

150

150
13

0.022nF

0.022nF

0.022nF
B 4 B

1
C573 C571 C572 9

VOLTAGE
PGB1010603NR
D507

VOLTAGE
PGB1010603NR
D506

VOLTAGE
PGB1010603NR
D505
0.022nF 0.022nF 0.022nF 14
50V 50V 50V 5 16

R557

R556

R555

2
50V 50V 50V 10 17

C570

C569

C568
P3.3V P3.3V VCC_CRT 15

nostuff
nostuff
nostuff
R24 R23 3701-001403
G
2.2K 2.2K
1
CRT5_DDCDATA
CRT3_DDCCLK CRT5_DDCCLK CRT5_DDCCLK

D
2
CRT5_HSYNC

3
VOLTAGE
RHU002N06
Q5
CRT5_VSYNC
50V 50V 50V 50V

270pF

270pF

0.1nF

0.1nF
C33

C30

C31
C32
A A
SAMSUNG
ELECTRONICS

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
AUdio Codec (ALC269)
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D P3.3V D
Codec Pin9 Setting
S/B with Low Voltage IO S/B without Low Voltage IO
Pin9 : 1.5V Pin9 : 3.3V
C725
10000nF-X5R
C720
100nF
10V
10V
g
SMD_A : 3711-000922
P3.3V
SMD_S : 3711-000456
un al
U511 J513
C719 ALC269Q-GR CANTERBURY HDR-4P-SMD
D6 100nF 1 44 SPK5_R_M_MN B17 BLM18PG181SN1 SPK5_R_M_B_MN
DVDD SPK_OUT_R- B16 1
MMBD4148
10V 9 45 SPK5_R_P_MN BLM18PG181SN1 SPK5_R_P_B_MN
DVDD_IO SPK_OUT_R+ SPK5_L_M_B_MN
2
75V 3
C52 1000nF-X5R 6.3V 1 3 R69 15K 1% 41 SPK5_L_M_MN B15 BLM18PG181SN1 SPK5_L_P_B_MN
AUD3_SPKR 22-B3 5
SPK_OUT_L-
40 SPK5_L_P_MN B14 BLM18PG181SN1 5
4
AUD3_SPKR_C_MN C70 HDA3_AUD_SDO SDATA_OUT SPK_OUT_L+ MNT1
AUD3_SPKR_D_MN 6 6
ms nti
R66 R68 4.7nF HDA3_AUD_BCLK BCLK CANTERBURY MNT2
10K 4.7K R712 22 HDA3_AUD_SDI0_R_MN 8 32 29-D3
25V HDA3_AUD_SDI0 SDATA_IN HPOUT_L_I AUD5_HP_O_LEFT
1% 1% 10 33 29-D3 C256 C255 C254 C253 3711-000922
HDA3_AUD_SYNC 11
SYNC HPOUT_R_I AUD5_HP_O_RIGHT 1nF 1nF 1nF 1nF
nostuff HDA3_AUD_RST# RESET# CANTERBURY
C CBN
35 AUD5_CBN_MN C722 2200nF-X5R10V 50V 50V 50V 50V
C
AUD3_SPKR_R_MN C69 1000nF-X5R 6.3V AUD3_SPKR_RC_MN 12 36 AUD5_CBP_MN CANTERBURY
8. Block Diagram and Schematic

BEEP CBP
G_AUD 2 34 2200nF-X5R10V C68 Do not make a testpoint in these nets
GPIO0_DMIC_DATA CPVEE
3
GPIO1_DMIC_CLK
AUD5_CPVEE_MN R702 1K
2203-006399|n_c1005-h0055
MIC1_R_B
22 AUD5_MIC1_RIGHT_C_MN C714 1000nF-X5R 6.3V 29-C2
AUD5_MIC1_RIGHT
R705 2.2K KBC3_SPKMUTE_R_MN 4 21 AUD5_MIC1_LEFT_C_MN C715 1000nF-X5R 6.3V 29-C2
KBC3_SPKMUTE# PD# MIC1_L_B AUD5_MIC1_LEFT
Sa de
2203-006399|n_c1005-h0055
R703 1K
47
EAPD_SPDIF02 MIC1_VREFO_R
30 AUD5_MIC1_VREFO_R_MN R710 4.7K 1%
- This Document can not be used without Samsung's authorization -

R709
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

48 28 AUD5_MIC1_VREFO_L_MN 4.7K 1%
AUD5_JDREF_R_MN SPDIF01 MIC1_VREFO_L
CANTERBURY

G_AUD
R711 20K 1% 19 17 AUD5_MIC2_RIGHT_C_MN C50 1000nF-X5R 6.3V 2203-006399|n_c1005-h0055 29-B4
JDREF MIC2_R_F AUD5_MIC2_INT
MIC2_L_F
16 AUD5_MIC2_LEFT_C_MN C51 1000nF-X5R 6.3V 2203-006399|n_c1005-h0055
P5.0V_AUD 29-C2 R98 20K 1% 13 CANTERBURY
AUD5_SENS_MIC# SENSE_A Do not make a testpoint in these nets
AUD5_SENS_HP#
29-D2 R67 39.2K 1% 18
SENSE_B MIC2_VREFO
29 29-C3
AUD5_MIC2_VREF
nfi
AUD5_SENS_A_MN 39 24
PVDD1 LINE1_R_C
46 23
PVDD2 LINE1_L_C
C94 C91 42
PVSS1 LINE2_R_E
15
100nF 100nF 43 14
10V 10V
PVSS2 LINE2_L_E G_AUD
7
DVSS
20
MONO_OUT
P4.75V_AUD 25 27 AUD5_VREF_MN
AVDD1 VREF
38
AVDD2
Co
31
CPVREF
C90 C717 26
AVSS1 C716
B 100nF 100nF 37
AVSS2 THERMAL
49
4700nF-X5R
C718 B
10V 10V 100nF
10V 10V
1205-003769
SHORT3 RGND-SHORT
SHORT2 RGND-SHORT
G_AUD G_AUD
P5.0V_AUD G_AUD
P4.75V_AUD
R281 0
B9
BLM18PG181SN1
R282 0
U510
G916-475T1UF SHORT506
INSTPAR
1 5
IN OUT
2
3
GND
4 AUD5_LDO_BYPASS_MN SHORT507
C724 C93 EN BYPASS C721 C723 INSTPAR
10000nF-X5R 100nF 100nF 10000nF-X5R
10V 10V SHORT5 1203-005579 10V 10V
R1608-SHORT G_AUD
2nd Vendor : 1203-003344
A (MIC5252-4.75BM) A
C87
SHORT6 1000nF-X5R
nostuff
R1608-SHORT 6.3V nostuff
SAMSUNG
G_AUD G_AUD G_AUD ELECTRONICS
4 3 2 1

8-24
 8-25
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
HEADPHONE
D D
3722-002903 JACK-PHONE-6P
28-C3
AUD5_SENS_HP# 5
28-C2 R707 56 AUD5_HP_RIGHT_R_MN B522 BLM18PG181SN1 AUD5_HP_RIGHT_B_MN 4 R
AUD5_HP_O_RIGHT 3
28-C2 R706 56 AUD5_HP_LEFT_R_MN B521 BLM18PG181SN1 AUD5_HP_LEFT_B_MN 6 L
AUD5_HP_O_LEFT

50V

50V

50V
2
g
1
G4

0.1nF

0.1nF

0.1nF
G3
G2
J509 G1
un al

C251

C252

C654
nostuff
G_AUD
ms nti
Connect to Mount-hole.
C C
8. Block Diagram and Schematic

MIC JACK
Sa de
3722-002903
JACK-PHONE-6P
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

AUD5_SENS_MIC# 5
B520 BLM18PG181SN1 AUD5_MIC1_RIGHT_J_MN 4
AUD5_MIC1_RIGHT R
AUD5_MIC1_RIGHT 3
AUD5_MIC1_LEFT_J_MN
nfi
AUD5_MIC1_LEFT B519 BLM18PG181SN1 6 L
AUD5_MIC1_LEFT 2
1

50V

50V

50V
G4
G3

0.1nF

0.1nF

0.1nF
J507 G2
G1

C248

C249

C639
nostuff
Co
B G_AUD B
28-C1
AUD5_MIC2_VREF Connect to Mount-hole.
Mono Mic Ass’y : Place inside Audio Analog Plane
R681
4.7K
1% MIC1
SOM4013SL-G443-C1033
28-C1 R682 1K AUD5_MIC2_INT_J_MN 1
AUD5_MIC2_INT 2
MIC_SIG C712 10nF 25V
AUD5_MIC2_INT_B_MN B518 GND
BLM18PG181SN1
C681 C699 C146 10nF 25V
47nF 0.1nF 3003-001158|mic-2p-2side-1a
50V 50V C711 10nF 25V
nostuff
C700 10nF 25V
G_AUD G_AUD
G_AUD
G_AUD
A A
SAMSUNG
ELECTRONICS

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D LAN Controller (RTL8103EL) D
g
un al
J518
Place crystal within 0.75inches from LAN chip. JACK-LAN-8P
LT1 8
Y501 LFE8423 TRD4-
7
25MHz TRD4+
30-B4 1 16 LAN1_RXP_MN 6
LAN1_MDI1P 3
RD+ RX+
14 LAN1_RXCT_MN 5
TRD2-
RDCT RXCT TRD3-
30-B4 2 15 LAN1_RXN_MN 4
2

P1.2V_LAN LAN1_MDI1N RD- RX-

3
TRD3+
TRD2+
C37 C36 7 10 2
ms nti
30-B4 LAN1_TXP_MN
0.015nF 0.015nF LAN1_MDI0P 6
TD+ TX+
11 LAN1_TXCT_MN 1
TRD1-
TDCT TXCT TRD1+
50V 50V 30-B4 8 9 LAN1_TXN_MN
C39 LAN1_MDI0N TD- TX-
9
MNT1
100nF 10
C MNT2 C

10V

10V

1%
1%

1%
1%
10V 2603-000099
8. Block Diagram and Schematic

3722-002914

75
75
75
75
100nF

100nF
R41 2.49K 1%

R500
R503
R501
R502
P3.3V_AUX P1.2V_LAN

C3

C2
Sa de
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

C500
1nF
C9 C38 C535 C536 3KV
100nF 100nF 100nF 100nF
P3.3V_AUX 10V 10V 10V 10V
nfi
P3.3V_AUX P3.3V
48
47
46
45
44
43
42
41
40
39
38
37
C10
VCTRL12A
GND_4
RSET
VCTR12
NC_11
NC_10
CKTAL2
CKTAL1
NC_9
NC_8
LED0
VDD33_2
100nF
10V
R528
1 36 10K R531
AVDD33 DVDD12_4
30-C2 2 35 1% 1K
LAN1_MDI0P 30-C2 3
MDIP0 LED1_EESK
34 1%
LAN1_MDI0N MDIN0 LED2_EEDI_AUX
4
NC_1 U502 LED3_EEDO
33
30-C2 5 RTL8103EL-GR 32 R529 1K 1%
LAN1_MDI1P 30-C2 6
MDIP1 EECS
31 P3.3V_AUX
LAN1_MDI1N MDIN1 GND_3
Co
7 1205-003798 30
GND_1 DVDD12_3
8 29
NC_2 VDD33_1
B 9
NC_3 ISOLATE#
28 B
10 27 34-B3 25-A4,32-C3 14-B1,21-C1 C41
11
DVDD12_1 PERST#
26 34-C3 22-C4,32-D4
PLT3_RST# 100nF
P1.2V_LAN 12
NC_4 LANWAKE#
25 PEX3_WAKE# 10V

REFCLK_N
REFCLK_P
NC_5 CLKREQ#

DVDD12_2
R530

GNDTX
VDDTX
GND_2
15K

HSON
HSOP
P3.3V

NC_6
NC_7
HSIN
HSIP
1%
R558 10K 1%
C510 C12
100nF 100nF

13
14
15
16
17
18
19
20
21
22
23
24
10V 10V
12-B1
nostuff LOM3_CLKREQ#
nostuff
R532 0
21-A4
PEX1_LAN_TXP3 21-A4
PEX1_LAN_TXN3 12-B1
CLK1_PCIELOM 12-B1
CLK1_PCIELOM# 21-B4 C540 100nF 10V PEX1_LAN_RXP3_C_MN
PEX1_LAN_RXP3 21-B4 C539 100nF 10V PEX1_LAN_RXN3_C_MN
PEX1_LAN_RXN3
Place AC coupling capacitors
close to LAN chip.
Place close to pin19.
C538 C537
1000nF-X5R 1000nF-X5R
6.3V 6.3V
A A
SAMSUNG
ELECTRONICS
4 3 2 1

8-26
 8-27
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
MMC
g
P3.3V_MCD
un al
P3.3V
P3.3V C676 C677
2200nF 100nF
C703 10V 10V
C694 C690 C688 nostuff
10000nF-X5R
ms nti
100nF 100nF 100nF
6.3V C689
10V 10V 10V C702 10000nF-X5R
U16
GL827S
100nF
10V
6.3V 40mil pattern
15 6
C P5.0V 26
DVDD_1 AVDD_1
11 P3.3V_MCD C
DVDD_2 AVDD_2
8. Block Diagram and Schematic

35
DVDD_3
36
PMOSO
25 MMC_VDD180_C_MN
VDD5V J515
4 C701 100nF 10V
C691 VDD180 EDGE-SD-9P
C692 7
2200nF-X5R 100nF USB3_MMC- 8
DM
40 31-C3 R667 49.9 1% 1
Sa de
10V 10V USB3_MMC+ DP D0
43
MCD3_SDDAT0 MCD3_SDDAT3 31-C3 MCD3_SDDATA3_MN 2
CD_DAT3
D1 MCD3_SDDAT1 MCD3_SDCMD CMD
- This Document can not be used without Samsung's authorization -

48 37 3
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

47
GPIO1 D2
29
MCD3_SDDAT2 4
VSS1
46
GPIO2 D3
28 MCD3_SDDAT3 31-B3 5
VDD
GPIO3 D4
30
MCD3_SDCLK 6
CLK
D5 VSS2
20 32 31-C3 R661 49.9 1% 7
CS D6 MCD3_SDDAT0 DAT0
MCD3_SD_SPD 19
SK D7
38
MCD3_SDDAT1
31-C3 R660 49.9 1% MCD3_SDDATA0_MN 8
DAT1
nfi
21 31-C3 R668 49.9 1% MCD3_SDDATA1_MN 9
MCD3_CLK_IN 22
DO
41 MCD3_SDDAT2 31-C3 MCD3_SDDATA2_MN 10
DAT2
UPDATE AS EMI/SI REQUEST DI SD_CMD
23
MCD3_SDCMD MCD3_SDCD# 31-C3 11
CARD_DETECT
5% 33R683 MCD3_SDCLK_R_MN 39
SD_CDZ
3 MCD3_SDCD# MCD3_SDWP WRITE_PROTECT
MCD3_SDCLK CLK SD_WP MCD3_SDWP 12
MNT1
13 33 13
CLK3_FM48 14
X1 MS_BS
24
MNT2
X2 MS_INS 3709-001492
C686 C687 C704 MMC3_PDMOD_MN 2 1
0.01nF 0.01nF PDMOD XD_CDZ
0.5pF 0.022nF 0.5pF R693 0 17
TESTMOD XD_RBZ
44
50V 50V 50V P3.3V 31
XD_CE
5 42
nostuff GND_1 XD_WEZ
Co
nostuff

MMC_TESTMOD_MN
9 45 MMC_RREF_MN
GND_2 XD_WPZ
R684 12 1%
B 16
GND_3
10
R686 715 B
10K
27
34
GND_4
GND_5
RREF
EXTRSRZ
18 C693 100nF
10V
3-in-1 Socket
GND_6
Support : SD/MMC/SDHC
R685 0233665400
10K
R688 0
PLT3_RST#
P3.3V P3.3V
MCD3_SD_SPD SD v1.0 Clock Option
R689
10K R687 PU / PD : No Stuff 24 MHz (default)
10K
PU : Stuff, PD : No Stuff 15 MHz
MCD3_SD_SPD
MCD3_CLK_IN
Power Down Mode 827S-05 and later MCD3_CLK_IN 827S Clock Source option
PU : No Stuff, PD : Stuff Power Saving Mode Enable R690 R691 PU : X, PD : X 12MHz, fixed S/N
10K 10K
PU : Stuff, PD : No Stuff Remote Wake Up Enable PU : No Stuff, PD : Stuff 12MHz, no S/N
PU : Stuff, PD : No Stuff 48MHz
A A
SAMSUNG
ELECTRONICS

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
WLAN, 5.2mm
g
un al
P3.3V
P3.3V P3.3V
P3.3V
R627
ms nti
10K
1%
J506 R613 P3.3V P3.3V
MINICARD-52P
1 2
C 3
WAKE* P3.3V_1
4
C
8. Block Diagram and Schematic

RSVD_1 GND_1
5 6
RSVD_2 P1.5V_1 C624 C247
7 8 C611 C608 C609
MIN3_CLKREQ# CLKREQ* SIM_VCC_C1 10000nF 10000nF

10K
9 10 100nF 100nF 100nF
GND_2 SIM_DATAIO_C7 6.3V 6.3V
11 12 nostuff
CLK1_MINIPCIE# 13
REFCLK- SIM_CLK_C3
14
CLK1_MINIPCIE REFCLK+ SIM_RESET_C2 nostuff
15 16
Sa de
GND_3 SIM_VPP_C6

1%
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

17 18
SIM_RSVD_C8 GND_4
19 20
21
SIM_RSVD_C4 W_DISABLE*
22 R714 0 CHP3_RFOFF#
23
GND_5 PERST*
24
PLT3_RST#
PEX1_MINIRXN1 25
PERN0 P3.3V_AUX
26
PEX1_MINIRXP1 27
PERP0 GND_6
28
GND_7 P1.5V_2
nfi
29 30
GND_8 SMB_CLK
31 32
PEX1_MINITXN1 33
PETN0 SMB_DATA
34
PEX1_MINITXP1 35
PETP0 GND_9
36
37
GND_10 USB_D-
38
USB3_MINIPCIE1- Mini PCI Express Card WLON_LED#
39
RSVD_11 USB_D+
40
USB3_MINIPCIE1+
RSVD_12 GND_11 30.00 mm
41 42 D 3
RSVD_13 LED_WWAN* Q508
43 44
RSVD_14 LED_WLAN* RHU002N06
45 46 G
47
RSVD_15 LED_WPAN*
48
CHP3_RFOFF# VOLTAGE

50.95 mm

48.05 mm
RSVD_16 P1.5V_3 1
49 50 Top
RSVD_17 GND_12
S 2
51 52
RSVD_18 P3.3V_2
Co
Pin 1
53
MNT1
B MNT2
54 B
Odd Pins : Top side
Even Pins : Bottom Side
3709-001470
M500
HEAD
DIA
LENGTH
BA61-01102A|screw-118-1_b
A A
SAMSUNG
ELECTRONICS
4 3 2 1

8-28
 8-29
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
HSDPA / WIBRO, 5.2mm
P3.3V
D P1.5V P3.3V P3.3V D
HSDPA
C189 HSDPA
P3.3V P3.3V C240 C660
10000nF
100nF 100nF
6.3V
R672 nostuff
10K J511 HSDPA
EDGE-MINIPCI-E-52P R240 BA61-01090A
1 2 10K
WAKE* P3.3V_1 M501
3 4
g
RSVD_1 GND_1 HEAD
5 6
RSVD_2 P1.5V_1 DIA
7 8
EXP3_CLKREQ# 9
CLKREQ* SIM_VCC_C1
10 SIM3_C1VCC LENGTH
11
GND_2 SIM_DATAIO_C7
12
SIM3_C7DATA HSDPA
CLK1_MINI3PCIE# 13
REFCLK- SIM_CLK_C3
14
SIM3_C3CLK
un al
CLK1_MINI3PCIE 15
REFCLK+ SIM_RESET_C2
16
SIM3_C2RST
GND_3 SIM_VPP_C6 SIM3_C6VPP
17 18 HSDPA
SIM_RSVD_C8 GND_4
19 20 R239 0
21
SIM_RSVD_C4 W_DISABLE*
22 R241 0 CHP3_3GOFF#
23
GND_5 PERST*
24
PLT3_RST#
PEX1_MINRXN2 25
PERN0 P3.3V_AUX
26 HSDPA
PEX1_MINRXP2 27
PERP0 GND_6
28
GND_7 P1.5V_2
29 30
ms nti
31
GND_8 SMB_CLK
32 SMB3_CLK
PEX1_MINTXN2 33
PETN0 SMB_DATA
34
SMB3_DATA
PEX1_MINTXP2 35
PETP0 GND_9
36 Mini PCI Express Card
37
GND_10 USB_D-
38
USB3_MINIPCIE2-
C 39
RSVD_11 USB_D+
40
USB3_MINIPCIE2+ 30.00 mm C
RSVD_12 GND_11
8. Block Diagram and Schematic

41 42
RSVD_13 LED_WWAN*
43 44
RSVD_14 LED_WLAN*
45 46

50.95 mm

48.05 mm
47
RSVD_15 LED_WPAN*
48
SIM3_C4DET Top
RSVD_16 P1.5V_3
49 50
RSVD_17 GND_12
51 52
Sa de
RSVD_18 P3.3V_2 Pin 1
- This Document can not be used without Samsung's authorization -

53
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

MNT1
54 Odd Pins : Top side
MNT2
Even Pins : Bottom Side
3709-001401 HSDPA
nfi
P3.3V
R577
10K
HSDPA
Co
J501
B EDGE-SIM-8P-MNT B
C1 C5
SIM3_C1VCC C2
C1 C5
C6
SIM3_C2RST C3
C2 C6
C7 SIM3_C6VPP
SIM3_C3CLK C3 C7 SIM3_C7DATA
C4 1
SIM3_C4DET C8
CD_U MNT1
2
CD_L MNT2

1
nostuff

VOLTAGE

VOLTAGE
3709-001478 nostuff
C586
HSDPA

2
50V

50V
0.01nF
0.5pF
50V

0.01nF 0.5pF

0.01nF 0.5pF
1000nF-X5R 6.3V
nostuff
nostuff

1
nostuff

VOLTAGE

VOLTAGE

VOLTAGE
nostuff
HSDPA
HSDPA

2
HSDPA

C564
C559

C563

PGB1010603NR
D504
PGB1010603NR
D509
A A

PGB1010603NR
D508
PGB1010603NR
D502
PGB1010603NR
D503
SAMSUNG
ELECTRONICS

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
SATA I/F CONN
g
un al
SATA HDD CONN
ms nti
C C
8. Block Diagram and Schematic

JHDD500
HDD-22P-SMD
S1
GND1
S2
Sa de
SAT1_TXP0 S3
TX+
SAT1_TXN0 TX-

SIGNAL
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

S4
GND2
S5
SAT1_RXN0 S6
RX-
SAT1_RXP0 S7
RX+
GND3
P1
3.3V_1
nfi
P3.3V P2
3.3V_2
P3
3.3V_3
P4
GND4
P5
C616 GND5
nostuff
10000nF
C618 C617 P6
GND6
1nF 100nF P7

POWER
6.3V 5V_1
50V 10V P8
5V_2
P9
nostuff nostuff 5V_3
P10
GND7
P11
RESERVE
P12
P5.0V GND8
P13
12V_1
Co
P14
12V_2
P15
12V_3
B C596 C594 C593
B
100nF 10000nF 10000nF
C595 C592 M1
MNT1
100nF 100nF M2
10V 6.3V 6.3V
10V 10V
MNT2
nostuff nostuff 3710-002736
A A
SAMSUNG
ELECTRONICS
4 3 2 1

8-30
 8-31
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
MICOM_MEC1308
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS P3.3V_MICOM
EXCEPT AS AUTHORIZED BY SAMSUNG.
P3.3V_MICOM_SW P3.3V
R102
0 nostuff
nostuff
MICOM RESET
34-B2,40-D2
KBC3_RST#
D C85 C588 C60 C43 C610 C587
D
100nF 100nF 100nF 100nF 100nF 100nF Q504 D 3 P3.3V_AUX
10V 10V 10V 10V
10V 10V RHU002N06
G
THM3_STP#_Q_MN
1
S 2 R582
BSS84 4.7K
Q503 1%
106
119
68

14
39
58
84

49

40

3 2 THM3_STP#_R_MN
g
KBC5_KSO(0:15) 0 21 D S
VCC0

VCC1_1
VCC1_2
VCC1_3
VCC1_4
VCC1_5
VCC1_6

VCC2

AVCC

KSO0 G1
1 20 R583
KSO1
2 19 100K 8-C2
3 18
KSO2
124 1%
THM3_STP#
17
KSO3 OUT0_SCI
125
KBC3_LED_ACIN#
un al
4
5 16
KSO4 OUT1
123
10kohm pull-up to P3.3V_AUX
6 13
KSO5 OUT7_NSMI
122
KBC3_EXTSMI# should be at the thermal sensor side.
KSO6 OUT8_KBRST KBC3_CPURST#
7 12
KSO7 U6 OUT9_PWM2
121
KBC3_WAKESCI#
8 10 120
KSO8 OUT10_PWM0
9 9
KSO9 MEC1308-NU PWM1_OUT11
118
KBC3_LED_POWER#
10 8
KSO10
11 7
KSO11
12 6 107
13 5
KSO12_GPIO00_KBRST GPIO01
79
KBC3_CHGEN
ms nti
14 81
KSO13_GPIO18 GPIO02
80 KBC3_PRECHG
15 83
GPIO04_KSO14 GPIO03
60
KBC3_CHG4.2V P3.3V P3.3V_AUX
GPIO05_KSO15 BA09-00021A NRESET_OUT_GPIO06 THM3_ALERT#
4 85 P3.3V_MICOM P3.3V_MICOM_SW
KBC3_SUSPWR 108
GPIO24_KSO16 GPIO07_PWM3
86
C KBC3_PWRGD GPIO26_KSO17 GPIO08_RXD
87 P3.3V_MICOM_SW C
KBC5_KSI(0:7) GPIO09_TXD
8. Block Diagram and Schematic

0 29 R93 10K
1 28
KSI0 KBC3_RUNSCI# P5.0V_STB R554 0
KSI1
2 27 88 R95 R587 10K
KSI2 GPIO11_AB2A_DATA ADT3_SEL# KBC3_EXTSMI#
3 26
KSI3 GPIO12_AB2A_CLK
89
PEX3_WAKE# 300K KBC3_WAKESCI# R592 10K
4 25 90 1%
5 24
KSI4 GPIO13_AB2B_DATA
91
CHP3_SLPS3# nostuff R553

3
Sa de

2
6 23
KSI5 GPIO14_AB2B_CLK
92
KBC3_DETECT# nostuff

D
S
KSI6 GPIO15_FAN_TACH1 KBC3_CHG2000 200K
- This Document can not be used without Samsung's authorization -

7 22 101 C61
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

1%

1
KSI7 GPIO16_FAN_TACH2 KBC3_VRON

G
102 10nF VOLTAGE C567
35
GPIO17_A20M KBC3_A20G 25V
100nF
KBC5_TCLK 36
IMCLK
103
KBC5_TDATA IMDAT GPIO20_PS2CLK KBC3_CAPSLED# 3 Q501
61 105 D
SI2315BDS-T1
KBC5_KCLK 62
KCLK GPIO21_PS2DAT
75 Q505
KBC5_KDATA KDAT 32KHZ_OUT_GPIO22_WK_SE01 KBC3_PWRON
nfi
66 73 G RHU002N06
KBC5_MCLK 67
EMCLK GPIO25
74 KBC3_USBCHG KBC3_RST# VOLTAGE
KBC5_MDATA EMDAT GPIO27_WK_SE05 1
93 S 2
GPIO28
98 KBC3_USBPWRON#
LPC3_LAD(0:3) GPIO29_BC_CLK nostuff
0 46 99 nostuff
LAD0 GPIO30_BC_DAT
1 48 100 nostuff
LAD1 GPIO31_BC_INT# P3.3V_MICOM_SW
2 50 126
3 51
LAD2 GPIO32
65
KBC3_BKLTON
52
LAD3 GPIO33
64 KBC3_RSMRST#
LPC3_LFRAME# LFRAME# GPIO34 KBC3_PWRBTN#
53 63 R596 4.7K 1%
PLT3_RST# 54
LRESET# GPIO35
1 KBC3_SPKMUTE# KBC3_SMDATA# R593 4.7K 1%
CLK3_PCLKMICOM 55
PCI_CLK GPIO36
34
KBC3_SMCLK#
PCI3_CLKRUN# CLKRUN# GPIO37_CIR_LED LID3_SWITCH#
Co
57 33 R585 10K
CHP3_SERIRQ SER_IRQ GPIO38_CIR_IN PLT3_RST# KBC3_TX
59
NC_TEST_CLK GPIO39
30
KBC3_SPI_WP# KBC3_RX R584 10K
B KBC3_LED_ACIN#
R586 10K B
R597 10K
76
KBC3_LED_CHARGE#
KBC3_RUNSCI# NEC_SCI
111 P3.3V P3.3V_MICOM_SW P5.0V
AB1A_DATA
112
KBC3_SMDATA#
AB1A_CLK KBC3_SMCLK#
R590 22 2 109
HST3_SPI3_CLK HSTCLK_GPIO41 AB1B_DATA KBC3_THERM_SMDATA
HST3_SPI3_DO 94
HSTDATAIN_GPIO43 (MISO) AB1B_CLK
110
KBC3_THERM_SMCLK R595 KBC5_TCLK R580 10K 1%
R594 22 127 R94 10K R581 10K 1%
HST3_SPI3_DI 96
HSTDATAOUT_GPIO45 (MOSI)
1% KBC5_TDATA R608 10K
HST3_SPI3_CS# HSTCS0#_GPIO44 10K KBC5_KCLK
1%
31 69 R607 10K 1%
R589 22 3
HSTCS1#_GPIO42 TEST_PIN
78 KBC5_KDATA R610 10K 1%
KBC3_SPI_CLK FLCLK PWRGD KBC5_MCLK
KBC3_SPI_DI 95
FLDATAIN VCC1_RST#
77
KBC5_MDATA R609 10K 1%
R591 22 128 116
KBC3_SPI_DO 97
FLDATAOUT GPIO10
113
KBC3_PWRSW#
KBC3_SPI_CS# 32
FLCS0# NBAT_LED
115
KBC3_LED_CHARGE#
FLCS1# NPWR_LED_8051TX
114 R588 0 KBC3_TX
41
NFDD_LED_8051RX KBC3_RX
VRM3_CPU_PWRGD 42
ADC3_GPIO23 TP2000
CHP3_SLPS5# 43
ADC2_GPIO40
1
CHP3_SLPS4# 44
ADC1_GPIO46
2
MODE0
CHP3_SUSSTAT# 38
ADC0_GPIO47 KBC3_TX 3
TX
GPIO19 KBC3_RX 4
RX
GND
CLK3_MICOM_XTAL1_MN 70
XTAL1

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
AGND
AVSS
R92 1M 71

CAP
1%
XTAL2
nostuff
CLK3_MICOM_XTAL2_MN
MICOM Crisis Update

45
72

11
37
47
56
82
104
117

15
A 1 4
A
2 3 C42
C623
0.022nF
Y503
0.032768MHz
C622
0.022nF
4700nF-X5R
10V
Condition: P90=P91=P92=High(MICOM_P3V) SAMSUNG
50V 50V
MD0=MD1=Low(0V) ELECTRONICS
Serial Port: P84 & P85

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
Micom Glue Logic
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
KEYBOARD Power Switch Button TOUCHPAD
P5.0V
g

1
2
C679
J1 PU TO P3.3V_MICOM IS at micom logic side.
un al
100nF
KBC5_KSO(0:15)

3
FPC-KBD-25P 10V
1 KBC3_PWRSW#

4
2
3 MNT1

8 7 6 5
J516
4 P3.3V_MICOM 3
MNT2 CONN-6P-FPC
5 2 1
MNT3
6 MNT4 T_L_BUTTON# 1
7 VOLTAGE 2
ms nti
BAV99LT1

SW3
SSS-12LG-V-T/R
8 T_R_BUTTON# 3
9 D510 KBC5_TDATA 4
10 nostuff KBC5_TCLK 5
11 6
7
C 12
C680 C678 C695
C696 8
MNT1 C
8. Block Diagram and Schematic

13 0.1nF 0.1nF 0.1nF

0.01nF MNT2
14 0.5pF
50V 50V 50V 50V
KBC5_KSI(0:7) 15 3708-002402
16
17 nostuff nostuff nostuff nostuff
18
Sa de
19
20
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

21
22
23
24
KBC3_TX 26
25
MNT1
nfi
27
MNT2
3708-002166 LID_SWITCH
1%
1%
1%
1%
1%
1%
1%
1%

nostuff
P3.3V_MICOM nostuff
nostuff
nostuff SW2
nostuff
nostuff SW-TACT-4P
10K
10K
10K
10K
10K
10K
10K
10K

nostuff 1 3
nostuff P3.3V_MICOM P3.3V_MICOM T_R_BUTTON#
2 4
P5.0V
Co
3
R694
R695
R696
R697
R698
R699
R700
R701

3404-001311
R63 2 1
B U7 20K B
VOLTAGE
A3212ELH/HED55XXU12 1% BAV99LT1
1 nostuff
D12
C47 SUPPLY
2
1000nF-X5R
3
OUTPUT LID3_SWITCH#
6.3V GND
1009-001010
SW1
SW-TACT-4P
1 3
T_L_BUTTON#
2 4
P5.0V
3
3404-001311
2 1
VOLTAGE
BAV99LT1
nostuff
D11
A A
SAMSUNG
ELECTRONICS
4 3 2 1

8-32
 8-33
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
LEDs
g
un al
ms nti
C C
8. Block Diagram and Schematic

FUNCTION KEY LED ADAPTERIN/CHARGING LED

P3.3V_MICOM
Sa de
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

P3.3V
nfi
LED4
LTST-C195KGJRKT KBC3_LED_ACIN#_R_MN
3 G 1 R679 475 1%
KBC3_LED_ACIN#
LED1
LTST-C193TBKT-AC KBC3_LED_CHARGE# 4 R 2 R279 475 1%
R675 475 KBC3_LED_CHARGE#_R_MN
KBC3_CAPSLED# 34-C3 1%

1
KBC3_CAPSLED#_LED_MN
Co
B B
P3.3V_AUX
LED2
LTST-C193TBKT-AC
CHP3_SATALED# R676 475
20-B3 1%

1
CHP3_SATALED#_LED_MN
LED3
LTST-C193TBKT-AC
2 1 R280 475
KBC3_LED_POWER#
WLON_LED# R677 475 1%
32-D1 1% KBC3_LED_POWER#_R_MN

1
WLON_LED#_LED_MN
LED5
LTST-C193TBKT-AC
A A
SAMSUNG
ELECTRONICS

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
1 PORT USB CONNECTOR
D P5.0V_ALW D
U17
100nF
C713
10V
2
TPS2062ADRBR
1
Need 2A Routing
IN GND nostuff
8 7 P5.OV_AUX_USBPWR_P0_MN nostuff
OC1# OUT1
g
5 6 EC506
CANTERBURY OC2# OUT2
C257 100uF C672 C671
R708 0 3 100nF 16V 100nF 0.033nF
KBC3_USBCHG# EN1# 10V AS 10V 50V
4 9
un al
KBC3_USBPWRON# EN2# T_GND
R213 0
1205-003683
SPRINGFIELD
J512
JACK-USB-4P
PWR
R670 0
ms nti
USB3_P0-_B_MN
USB3_P0- R669 0
D-
USB3_P0+ USB3_P0+_B_MN
D+
GND
C 5
MNT1
CHARGABLE USB IN CANTERBURY C
1 4 6
8. Block Diagram and Schematic

MNT2
7
MNT3
8
MNT4
2 3 nostuff
B516 3722-002002
ACM2012-900-2P-T
Sa de
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

P5.0V_AUX
10V
nfi
C215
U509
TPS2062ADRBR
Need 4A Routing nostuff
nostuff
100nF 2
IN GND
1
8 7 P5.0V_AUX_USBPWR_P2_MN
OC1# OUT1
5 6 EC509
OC2# OUT2 P3.3V_MICOM
C213 100uF C214 C216
3 100nF 16V 100nF 0.033nF
KBC3_USBPWRON# EN1# 10V AS 10V 50V
4 9
EN2# T_GND
Co
1205-003683 R212
B 200K B
1%
KBC3_USBCHG#
J514
JACK-USB-4P D 3
Q18
PWR RHU002N06
R277 0 USB3_P2-_R_MN G
USB3_P2- R278 0 USB3_P2+_R_MN
D- KBC3_USBCHG VOLTAGE
USB3_P2+ D+ 1
GND
S 2
1 4
5
MNT1
nostuff 6
MNT2
7
MNT3
2 3 8
MNT4
B517
ACM2012-900-2P-T 3722-002002
J508
JACK-USB-4P
PWR
USB3_P6- R276 0 USB3_P6-_R_MN
D-
R275 0 USB3_P6+_R_MN
USB3_P6+ D+
GND
1 4
5
A 6
MNT1 A
nostuff MNT2
7
MNT3
2 3 8
B511
MNT4
3722-002002
SAMSUNG
ACM2012-900-2P-T ELECTRONICS
4 3 2 1

8-34
 8-35
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
USB I/F Devices
D D
g
Bluetooth Interface
un al
ms nti
C C
8. Block Diagram and Schematic

P3.3V
CANTERBURY
CANTERBURY
Sa de
C698 C697
- This Document can not be used without Samsung's authorization -

100nF 100nF
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

10V 10V
J517
HDR-4P-SMD
nfi
1
USB3_BLUETOOTH- 2
USB3_BLUETOOTH+ 3
4
5
MNT1
6
MNT2
3711-000922
CANTERBURY
J519
Co
SOCK-4P-1R-SMD
1
B 2
B
3
4
5
MNT1
6
MNT2
0245201200
nostuff
A A
SAMSUNG
ELECTRONICS

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
CHARGER & POWER MANAGEMENT
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. VDC_ADPT VDC
Q29-2 AO4807L
J503 Q29-1 VDC_CHG
AO4807L
HDR-4P-1R B3 Q500
3 30V

1 30V

HU-1M2012-121JT AP4435GM
D2

D2
6

1 R526 0.033
PNS_CHGVR_DCJACK_MN PNS_CHGVR_DCJACK_QB_MN ANS_CHGVR_VDC_ADPT_RQ_MN
1 8
D1 5

D1 7

2 S1 D1
1W 2 7
S

D 3
C20 C21 C22 1% EC501 3
S2 D2
6 D
R33 R21
4

4 S3 D3
G

MNT1
5 100nF 10nF 100K 1000nF-X5R 300K R618 R619 68uF C591 C533 4 G D4
5 C509
25V 25V
6 25V 1% 1% 2.2 22 25V 100nF 1nF 1nF
MNT2 AL 25V 50V 50V
3711-007003 nostuff
P3.3V_MICOM C612 C46 C45
CHGVR_SGATE_RRQ_MN

R34 R20 100nF

CHGVR_SGATE_RQ_MN

4700nF-X5R 4700nF-X5R
CHGVR_DCJACK_RCQ_MN 100K 43.2K 25V 25V
1% 1% 25V
BGATE
g
EMI R18
3 D
10K
C23 G
un al
100nF 1 CHGVR_P3.3V_MICOM_RQ_MN
25V
2 S Q4
VCHG=12.597V@2200Cell RHU002N06
VCHG=13.05V@2950Cell ADT3_SEL#
IPRECHG=0.27A
ICHG=1.38A FOR 2200mAh Q512
D 3 Q506-1
R19
ICHG=2.56A FOR 5200mAh & 5900mAh BSS84 0 AP4232GM
G To enhance
ms nti
1 S
2 nostuff L500 DMB performance (060310)
D1 7 8
D2 10uH R527 B2
SIQ1048-R100
0.02 HU-1M2012-121JT B1
G 1W
2703-003654 1% HU-1M2012-121JT
C 2 S
1 CHGVR_PHASE_RL_MN
C
8. Block Diagram and Schematic

5
P2.39V_VREF BGATE VDC_ADPT VDC C614 D1 5 6 4

4700nF-X5R

4700nF-X5R

4700nF-X5R

4700nF-X5R
100nF D2 R599 R598 3
nostuff 25V 10 10 R620 R622 2

100nF 25V
1%
D7 G
10 10

CHGVR_BAT3_SMDATA#_CBJ_MN

CHGVR_BAT3_DETECT#_CBJ_MN
CHGVR_BAT3_SMCLK#_CBJ_MN
BAT54A 1
R632 R639 R643 R642 4 S
3 1% 1%
300K 300K CHGVR_CSIP_MN
BATT-CONN-5P

25V

25V

25V

25V
Sa de

470K
200K 300K C589
PNS_CHGVR_PHASE_RC_MN
1% 1% 1% 1% G_CHG C590 J502
nostuff

2
1nF
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

50V
1nF nostuff 3711-006037
[email protected] 50V nostuff C613
C630 100nF
R633 R638 R641 nostuff

C508

C507
10V

R22

C29

C27
C28
150K 30K 10nF 27.4K C63 B4
1% 1% 25V 1% 1000nF U503 BLM18PG181SN1

1
ISL6255AHRZ-T Q506-2
25V
BAT3_DETECT#
nfi
19 20 CHGVR_CSIN_MN AP4232GM
CSIP CSIN
CHGVR_SGATE_MN C24
G_CHG G_CHG 18 17 C62 0.1nF
G_CHG SGATE BGATE 50V
CHGVR_DCIN_MN 25 100nF B5
27
DCIN R96 25V
(1.26V) CHGVR_ACSET_MN
ACSET 3.3 BLM18PG181SN1
CHGVR_DCSET_MN 28
DCSET
14
BAT3_SMDATA#
C615 BOOT
PNS_CHGVR_BST_MN
PNS_CHGVR_BST_RC_MN
1000nF UGATE
15 PNS_CHGVR_TG_MN C25

G_CHG
25V R623 5.1 CHGVR_VDDP_MN 13
VDDP PHASE
16 PNS_CHGVR_PHASE_MN 0.1nF
50V
1% CHGVR_VDD_MN 26 12 ANS_CHGVR_BG_MN B6
[email protected] VDD LGATE
11 BLM18PG181SN1
[email protected] PGND P2.39V_VREF
CHGVR_CHLIM_MN 7
CHLIM BAT3_SMCLK#
Co
CHGVR_VADJ_MN 9 21 CHGVR_CSOP_MN
VADJ CSOP
R637 CHGVR_ACLIM_MN 8
ACLIM CSON
22 CHGVR_CSON_MN C26
B 10K CHGVR_ICM_MN 5
ICM
0.1nF
50V
B
1% 6
CHGVR_CHLIM_RQ_MN P2.39V_VREF VREF
1 CHGVR_EN_MN
Q510 P2.39V_VREF EN
RHU002N06 D 3 CHGVR_ICOMP_MN 3 2
ICOMP CELLS P3.3V_MICOM
CHGVR_KBC3_PRECHG_RQ_MN CHGVR_VCOMP_MN 4 10 R636
R645 10K VCOMP GND
KBC3_PRECHG
G R640 R629 R631 1K
1 100K 24.3K 150K 23 29 1%
[email protected] ACPRN THERM
R644 S 2 1% [email protected] 1% 1% R634 C628 C627 24

CHGVR_VCOMP_RC_MN
DCPRN KBC3_CHGEN

CHGVR_DCPRN_MN

BAV99LT1

BAV99LT1

BAV99LT1
CHGVR_CHLIM_RQ2_MN
470K 100 6.8nF 10nF

2
CHGVR_ICM_RC_MN
1% 50V 25V 1203-005849 C629
nostuff R616 R615 R617 R630 R97 1nF C726

D511
30K 300K 200K 47K R635 0 50V 100nF

3
70V
D2

D3
nostuff
1% 1% 1% 1% C626 10K 25V
G_CHG G_CHG 100nF 1% nostuff

1
Q511 25V G_CHG
RHU002N06 D 3
CHGVR_KBC3_CHG2000_RQ_MN G_CHG G_CHG G_CHG
R647 10K G G_CHG G_CHG G_CHG G_CHG
KBC3_CHG2000 P3.3V_MICOM
1
R646 S 2 R35 100 1%
BAT3_SMDATA# KBC3_SMDATA#
470K
R621 R36 100 1%
BAT3_SMCLK# KBC3_SMCLK#
nostuff 20K
1% R704 100 1%
BAT3_DETECT# KBC3_DETECT#
G_CHG G_CHG D 3 ADT3_SEL#
(ACTIVE LOW)
A CHGVR_KBC3_CHG4.2V_RQ_MN
R614 10K G
SHORT1 A
KBC3_CHG4.2V INSTPAR
1
DRAW DATE TITLE
S 2 Q509
High : VCELL to 4.200V
Low : VCELL to 4.350V
R628
470K
RHU002N06
CHECK

BAE, SG
DEV. STEP

03/11/2009
CANTERBURY SAMSUNG
1% ELECTRONICS
G_CHG G_CHG KIM, MS PV MAIN
nostuff APPROVAL REV PART NO.
CHUN, YB 1.0 CHARGER (ISL6256A) BA41-xxxxxx
G_CHG
MODULE CODE LAST EDIT
undefined June 09, 2009 15:27:15 PM PAGE 37 OF 44
4 3 2 1
COM-22C-015(1996.6.5) REV. 3 D:/users/canterbury/PV_0609/Canterbury_MAIN

8-36
 8-37
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
CHARGER & POWER MANAGEMENT
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. VDC_ADPT VDC
Q29-2 AO4807L
J503 Q29-1 VDC_CHG
AO4807L
HDR-4P-1R B3 Q500
3 30V

1 30V

HU-1M2012-121JT AP4435GM
D2

D2
6

1 R526 0.033
PNS_CHGVR_DCJACK_MN PNS_CHGVR_DCJACK_QB_MN ANS_CHGVR_VDC_ADPT_RQ_MN
1 8
D1 5

D1 7

2 S1 D1
1W 2 7
S

D 3
C20 C21 C22 1% EC501 3
S2 D2
6 D
R33 R21
4

4 S3 D3
G

MNT1
5 100nF 10nF 100K 1000nF-X5R 300K R618 R619 68uF C591 C533 4 G D4
5 C509
25V 25V
6 25V 1% 1% 2.2 22 25V 100nF 1nF 1nF
MNT2 AL 25V 50V 50V
3711-007003 nostuff
P3.3V_MICOM C612 C46 C45
CHGVR_SGATE_RRQ_MN

R34 R20 100nF

CHGVR_SGATE_RQ_MN

4700nF-X5R 4700nF-X5R
CHGVR_DCJACK_RCQ_MN 100K 43.2K 25V 25V
1% 1% 25V
BGATE
g
EMI R18
3 D
10K
C23 G
un al
100nF 1 CHGVR_P3.3V_MICOM_RQ_MN
25V
2 S Q4
VCHG=12.597V@2200Cell RHU002N06
VCHG=13.05V@2950Cell ADT3_SEL#
IPRECHG=0.27A
ICHG=1.38A FOR 2200mAh Q512
D 3 Q506-1
R19
ICHG=2.56A FOR 5200mAh & 5900mAh BSS84 0 AP4232GM
G To enhance
ms nti
1 S
2 nostuff L500 DMB performance (060310)
D1 7 8
D2 10uH R527 B2
SIQ1048-R100
0.02 HU-1M2012-121JT B1
G 1W
2703-003654 1% HU-1M2012-121JT
C 2 S
1 CHGVR_PHASE_RL_MN
C
5
8. Block Diagram and Schematic

P2.39V_VREF BGATE VDC_ADPT VDC C614 D1 5 6 4

4700nF-X5R

4700nF-X5R

4700nF-X5R

4700nF-X5R
100nF D2 R599 R598 3
nostuff 25V 10 10 R620 R622 2

100nF 25V
1%
D7 G
10 10

CHGVR_BAT3_SMDATA#_CBJ_MN

CHGVR_BAT3_DETECT#_CBJ_MN
CHGVR_BAT3_SMCLK#_CBJ_MN
BAT54A 1
R632 R639 R643 R642 4 S
3 1% 1%
300K 300K CHGVR_CSIP_MN
BATT-CONN-5P

25V

25V

25V

25V
Sa de

470K
200K 300K C589
PNS_CHGVR_PHASE_RC_MN
1% 1% 1% 1% G_CHG C590 J502
nostuff

2
1nF
- This Document can not be used without Samsung's authorization -

nostuff
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

1nF 3711-006037
50V C613
[email protected] 50V nostuff
C630 100nF
R633 R638 R641 nostuff

C508

C507
10V

R22

C29

C27
C28
150K 30K 10nF 27.4K C63 B4
1% 1% 25V 1% 1000nF U503 BLM18PG181SN1

1
ISL6255AHRZ-T Q506-2
25V
BAT3_DETECT#
nfi
19 20 CHGVR_CSIN_MN AP4232GM
CSIP CSIN
CHGVR_SGATE_MN C24
G_CHG G_CHG 18 17 C62 0.1nF
G_CHG SGATE BGATE 50V
CHGVR_DCIN_MN 25 100nF B5
27
DCIN R96 25V
(1.26V) CHGVR_ACSET_MN
ACSET 3.3 BLM18PG181SN1
CHGVR_DCSET_MN 28
DCSET
14
BAT3_SMDATA#
C615 BOOT
PNS_CHGVR_BST_MN
PNS_CHGVR_BST_RC_MN
1000nF UGATE
15 PNS_CHGVR_TG_MN C25
G_CHG 25V R623 5.1 CHGVR_VDDP_MN 13 16 PNS_CHGVR_PHASE_MN 0.1nF
VDDP PHASE 50V
1% CHGVR_VDD_MN 26 12 ANS_CHGVR_BG_MN B6
[email protected] VDD LGATE
11 BLM18PG181SN1
[email protected] PGND P2.39V_VREF
CHGVR_CHLIM_MN 7
CHLIM BAT3_SMCLK#
Co
CHGVR_VADJ_MN 9 21 CHGVR_CSOP_MN
VADJ CSOP
R637 CHGVR_ACLIM_MN 8
ACLIM CSON
22 CHGVR_CSON_MN C26
B 10K CHGVR_ICM_MN 5
ICM
0.1nF
50V
B
1% 6
CHGVR_CHLIM_RQ_MN P2.39V_VREF VREF
1 CHGVR_EN_MN
Q510 P2.39V_VREF EN
RHU002N06 D 3 CHGVR_ICOMP_MN 3 2
ICOMP CELLS P3.3V_MICOM
CHGVR_KBC3_PRECHG_RQ_MN CHGVR_VCOMP_MN 4 10 R636
R645 10K VCOMP GND
KBC3_PRECHG
G R640 R629 R631 1K
1 100K 24.3K 150K 23 29 1%
[email protected] ACPRN THERM
R644 S 2 1% [email protected] 1% 1% R634 C628 C627 24

CHGVR_VCOMP_RC_MN
DCPRN KBC3_CHGEN

CHGVR_DCPRN_MN

BAV99LT1

BAV99LT1

BAV99LT1
CHGVR_CHLIM_RQ2_MN

470K 100 6.8nF 10nF

2
CHGVR_ICM_RC_MN
1% 50V 25V 1203-005849 C629
nostuff R616 R615 R617 R630 R97 1nF C726

D511
30K 300K 200K 47K R635 0 50V 100nF

3
70V
D2

D3
nostuff
1% 1% 1% 1% C626 10K 25V
G_CHG G_CHG 100nF 1% nostuff

1
Q511 25V G_CHG
RHU002N06 D 3
CHGVR_KBC3_CHG2000_RQ_MN G_CHG G_CHG G_CHG
R647 10K G G_CHG G_CHG G_CHG G_CHG
KBC3_CHG2000 P3.3V_MICOM
1
R646 S 2 R35 100 1%
BAT3_SMDATA# KBC3_SMDATA#
470K
R621 R36 100 1%
BAT3_SMCLK# KBC3_SMCLK#
nostuff 20K
1% R704 100 1%
BAT3_DETECT# KBC3_DETECT#
G_CHG G_CHG D 3 ADT3_SEL#
(ACTIVE LOW)
A CHGVR_KBC3_CHG4.2V_RQ_MN
R614 10K G
SHORT1 A
KBC3_CHG4.2V INSTPAR
1
DRAW DATE TITLE
S 2 Q509
High : VCELL to 4.200V
Low : VCELL to 4.350V
R628
470K
RHU002N06
CHECK

BAE, SG
DEV. STEP

03/11/2009
CANTERBURY SAMSUNG
1% ELECTRONICS
G_CHG G_CHG KIM, MS PV MAIN
nostuff APPROVAL REV PART NO.
CHUN, YB 1.0 CHARGER (ISL6256A) BA41-xxxxxx
G_CHG
MODULE CODE LAST EDIT
undefined June 09, 2009 15:27:15 PM PAGE 37 OF 44

N130
4 3 2 1
COM-22C-015(1996.6.5) REV. 3 D:/users/canterbury/PV_0609/Canterbury_MAIN
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
P5.0V_ALW & P3.3V_AUX
EXCEPT AS AUTHORIZED BY SAMSUNG.
VDC
VDC VDC
D VDC R270 D
300K
1%
[email protected] , [email protected]
KBC3_RST#
R259
EC505 C209 C210 C208 C207 3.3 R271 C239 C211 C212
68uF 4700nF-X5R 4700nF-X5R 4700nF-X5R 100nF 100K 100nF 4700nF-X5R 4700nF-X5R
25V 25V 25V 25V 25V
nostuff 1% 25V 25V 25V
AL
nostuff C234 R269
100nF
U15 680K
RT8205AGQW 1%
g
25V
9 4 3 2 SYSVR_VIN_MN 16 13 1.19V ~ 1.7V Q25-1
D4 D3 D2 D1 VIN EN D1 7 8
Q22 AP4232GM
AON6912L STUFF@TPS51125 D2
P3.3V_AUX (3.5A)
P5.0V_ALW (4.5A) 30V PNS_SYSVR_TG_P5.0V_ALW_MN 21 10 PNS_SYSVR_TG_P3.3V_AUX_MN G
L506 UGATE1 UGATE2 G_P3.3V
un al
3.9uH G1 2 Q25-2
S
1 L508
1
SIQ1048-3R9 AP4232GM 2.2uH
S1_D2 PNS_SYSVR_PHASE_P5.0V_ALW_MN 20 11 PNS_SYSVR_PHASE_P3.3V_AUX_MN
10 PHASE1 PHASE2
2703-003233 R257 R268 C246 D1 5 6
SIQ1048-2R2
EC507 C659 R209 R210 PNS_SYSVR_BST_P5.0V_ALW_RC_MN PNS_SYSVR_BST_P3.3V_AUX_RC_MN D2 R262 R261 2703-003232
330uF 4.7 10 C206 100nF PNS_SYSVR_BST_P5.0V_ALW_MN 22 9 PNS_SYSVR_BST_P3.3V_AUX_MN
4.7 10 EC508
6.3V
100nF BOOT1 BOOT2 C670
25V
G2 25V
3.3 3.3 100nF G
100nF 330uF
2409-001175 nostuff 8 ANS_SYSVR_BG_P5.0V_ALW_MN 19 12 ANS_SYSVR_BG_P3.3V_AUX_MN 25V 4 S
3 nostuff 6.3V
LGATE1 LGATE2 25V
0.017OHM PNS_SYSVR_PHASE_P5.0V_ALW_RC_MN
C188
S3 S2 S1 C186 PNS_SYSVR_PHASE_P3.3V_AUX_RC_MN 2409-001175
7 6 5 C237 C238 0.017OHM
ms nti
1nF
0.47nF 0.47nF
50V 1nF
50V nostuff 50V
50V
nostuff
RdsOn(Typ 19.5mohm / 26mohm)
C RdsOn(Typ 14mohm / 17mohm) 24 7
(Vout Fix / Discharge / Switcher over) C
8. Block Diagram and Schematic

VOUT1 VOUT2 (Separate Routing)

nostuff
Set : 3.356V
R249 R265 C243
C232 15K 11.8K 0.1nF
0.1nF 1% 1% 50V
nostuff
C231 50V SYSVR_VFB1_P5.0V_ALW_MN 2 5 SYSVR_VFB2_P3.3V_AUX_MN C242
Sa de
FB1 FB2
100nF 100nF
nostuff
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

25V R251 R253 R250 R252 25V

332K 10K 17.4K 100K
1% 1% 1% 1%
P2.0V_REF nostuff
18 3
NC REF
nfi
SYSVR_NC_MN
G_P3.3V C233G_P3.3V
220nF
P5.0V_STB 10V
P5.0V_STB P3.3V_MICOM
R256 G_P3.3V
100K 17
1% VREG5
nostuff C235 C236 C245
P5.0V_STB SYSVR_PGOOD_MN 23 8
PGOOD VREG3 22000nF-X5R 10000nF-X5R 10000nF-X5R
20% 6.3V 6.3V
OCP Valley : 5A@26mohm (130mV) SYSVR_ENTRIP2_MN 6 P3.3V_MICOM P2.0V_REF 6.3V
ENTRIP2
Co
R264 D 3 C244 nostuff
100K R266 R267
B 1% 470K 200K 10nF R248 R247 B
SYSVR_P5.0V_STB_ENTRIP2_RQ_MN
G 1% 1% 25V Stuff@TPS51125 0 0
1
Q26 D 3 Q27 S 2 4 SYSVR_TONSEL_MN
Ch1 / Ch2 Fsw
RHU002N06 RHU002N06 TONSEL P2.0V_REF : 300KHz / 375KHz
P3.3V_MICOM : 400KHZ/500KHZ
R263SYSVR_KBC3_ALWS_ON_RCQ_MN G
KBC3_SUSPWR G_P3.3V P2.0V_REF P3.3V_MICOM
10K 1 G_P3.3V
C241 OCP Valley : 8.8A@17mohm (150mV) SYSVR_ENTRIP1_MN 1
S 2 ENTRIP1
1nF
50V Q20 D 3
R254 R255 R713
nostuff RHU002N06 150K 100K 0
R232 0 G 1% 1% (OOA-Skip)
G_P3.3V G_P3.3V 15 14 R260 0
1

PAD
SYSVR_SKIPSEL_MN
SPRINGFIELD PGND SKIPSEL
S 2
1203-005735 R258 P3.3V : Usonic Mode
(PWM Only)

25
0 nostuff GND : Fixed Mode
G_P3.3V
nostuff REF : DEM Mode
P5.0V_STB
G_P3.3V
G_P3.3V
G_P3.3V
R229
100K
1%
KBC3_USBCHG
R231 0 SHORT505
INSTPAR
D 3
A A

2
Q24

BAT54C
VOLTAGE
G RHU002N06
VOLTAGE

D10
1 DRAW DATE TITLE
SAMSUNG

3
R246 BAE, SG 04/01/2009
S 2 CANTERBURY
10K G_P3.3V

1
CHECK DEV. STEP
CANTERBURY
ELECTRONICS
CANTERBURY KIM, MS PV MAIN
KBC3_SUSPWR CANTERBURY
CANTERBURY APPROVAL REV PART NO.
CANTERBURY
CHUN, YB 1.0 P3.3V_AUX / P5.0V_AUX BA41-xxxxxx
MODULE CODE LAST EDIT
undefined June 09, 2009 15:27:15 PM PAGE 38 OF 44
4 3 2 1
D:/users/canterbury/PV_0609/Canterbury_MAIN

8-38
 8-39
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
P1.8V_AUX / P1.5V / P1.05V
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D VSET:1.0546V VSET:1.8166V D
C180 R188 R223 C195
1nF 20K 24.3K 1nF
50V 1% 1% 50V
nostuff nostuff
R187 R189 R221 R222
1M 51.1K 17.4K 470K
g
1% 1% 1% 1%
nostuff nostuff
Discharging Path Discharging Path
un al
G_DDR
VDC P5.0V_AUX P5.0V_AUX VDC

CHSETVR_FB2_RC_MN

CHSETVR_FB1_RC_MN
C199 C200 C198
1nF
4700nF-X5R 4700nF-X5R C230 C229
25V 25V
50V R181 R186 4700nF-X5R 4700nF-X5R
C228
ms nti
100K 100K 1nF
25V 25V
1% 1% 50V
VCCP5_PWRGD nostuff
CHSETVR_TONSEL_MN
C C
R220
8. Block Diagram and Schematic

100K

6
5
4
3
2
1
1%
nostuff

VO2
VFB2
TONSEL
GND
VFB1
VO1
8 7 D1 C177 R184 7 24 CHSETVR_PG1_MN
R218 C193 D1 7 8
Q19-1 D2 100nF 3.3 CHSETVR_EN2_MN8
PGD2 PGD1 3.3 100nF D2
25V 23 CHSETVR_EN1_MN
Q23-1
P1.05V AP4232GM EN2 EN1 25V
P1.8V_AUX
L505 G PNS_CHSETVR_BST2_MN 9 22 PNS_CHSETVR_BST1_MN G L507
Sa de
-30V VBST2 VBST1 AP4232GM
3.9uH 1 S 2 PNS_CHSETVR_BST2_RC_MN PNS_CHSETVR_TG2_MN 10 U14 21 PNS_CHSETVR_TG1_MN PNS_CHSETVR_BST1_RC_MN 2 S
1 3.9uH
DRVH2 DRVH1
- This Document can not be used without Samsung's authorization -

11 TPS51124RGER LL1 20
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

PNS_CHSETVR_PHASE2_MN PNS_CHSETVR_PHASE1_MN
LL2
ANS_CHSETVR_BG2_MN 12 19 ANS_CHSETVR_BG1_MN
nostuff
DRVL2 1203-004708 DRVL1
EC4 EC5 R224 R225 R244 R245 EC510 EC7
6 5 D1 D1 5 6

PGND2

PGND1
220uF 220uF 220uF

V5FILT
10 4.7 10 4.7 220uF

TRIP2

TRIP1
D2 D2

V5IN
THM
2.5V 2.5V 2.5V
AD nostuff nostuff Q19-2 G G
Q23-2 2.5V
nostuff AD
AP4232GM AP4232GM
nfi
PNS_CHSETVR_PHASE2_RC_MN -30V 3 S 4 4 S
3 PNS_CHSETVR_PHASE1_RC_MN
0.035OHM C197 C196 C226 C227 0.035OHM

25

13
14
15
16
CHSETVR_TRIP1_MN17
18
0.47nF 1nF P5.0V_AUX 1nF 0.47nF

CHSETVR_TRIP2_MN
CHSETVR_5VFILT_MN
50V 50V 50V 50V
nostuff nostuff
C192
R216 4700nF-X7R
3.3 6.3V

R219
10K
C176

1%
SHORT504
nostuff
1000nF-X7R
P1.5V_PWRGD CHP3_SLPS4#

INSTPAR
Co
6.3V
R185
1K R182 R217
B 1% C178 15K 15K C194 B
100nF 1% 1% 100nF
KBC3_PWRON 10V 10V
R183
20K
1%
G_DDR G_DDR G_DDR G_DDR
P5.0V_AUX
TONSEL CH1 CH2
P1.8V_AUX U507 P1.5V FLOAT 300Khz 360Khz
C729
1nF RT9018B-15GSP V5FILT 360Khz 420Khz
50V 3 6 nostuff
VIN VOUT
R650 C655
C640 51.1K C727 10000nF-X5R
1nF 1% 1nF
C641 6.3V
10000nF-X5R
C728 4
VDD ADJ
7 50V 50V
1nF
6.3V
50V
C656
1000nF-X5R R273
6.3V 56.2K
5 1%
NC
A 2
A
KBC3_PWRON EN
R274 R162
8 100K
150K
1% C642
10nF 9
GND
1
1% SAMSUNG
PAD PGOOD P1.5V_PWRGD
25V
nostuff
ELECTRONICS
1203-005953

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
CPU VRM POWER D
P5.0V U13
MAX8796GTJ+ VDC
Fsw = 300kHz / 200Kohm
g
1% 10 R230 CPUVR_VCC_MN 31
VCC
9 CPUVR_TON_MN R198 200K
C665 C201 TON
1%
1000nF-X5R 1000nF-X5R
6.3V 6.3V C171 C173
C172
un al
4700nF-X5R 4700nF-X5R
1nF
25V 25V
50V
G_CPU 23
VDD
D1 7 8
D2
14 CPU_CORE
CPU1_VID(0) 15
D0
26 PNS_CPUVR_TG_MN G Q12-1
CPU1_VID(1) D1 DH
CPU1_VID(2)
16
D2 2 S
1 AP4232GM L504
17
ms nti
CPU1_VID(3) D3 1.8uH
18 25 PNS_CPUVR_PHASE_MN PNS_CPUVR_PHASE_RL_MN R190 0.01
CPU1_VID(4) 19
D4 LX
CPU1_VID(5) D5 SIQ1045-1R8PF 1%
P1.05V 20 R662 C666
CPU1_VID(6) D6 PNS_CPUVR_BST_RC_MN D1 5 6 R193 R192 R191 1/2W
C BST
24 PNS_CPUVR_BST_MN D2 10 10 0 EC3 C
100nF 1% 1% 330uF C179 C156
8. Block Diagram and Schematic

68 R226 CPUVR_VRHOT#_MN
28 22 ANS_CPUVR_BG_MN 3.3 25V 2V 1nF 100nF
5% VRHOT# DL PNS_CPUVR_PHASE_RC_MN AL 50V 10V
4 S
3 2402-001306
P3.3V C260 1nF Q12-2
50V C181 0.006ohm
nostuff
21 AP4232GM 1nF
PGND G
13 50V
V3P3
Sa de
R197
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

2K 5 CPUVR_CSP_MN
CSP
1% C182
10 0.22nF
VRM3_CPU_PWRGD PWRGD
4 50V CPU_CORE
CSN
R106 499 1% 7
CHP3_DPRSLPVR DPRSLPVR C183 C204
nfi
6 1nF 1nF
CPU1_DPRSTP# DPRSTP# 50V 50V
12 R237
CPUVR_CLKEN#_MN CLKEN#
10
0 R195 CPUVR_SHDN#_MN 11 G_CPU G_CPU
nostuff
KBC3_VRON SHDN# R233 ( 6mV / A )
3 CPUVR_FB_MN CPUVR_FB_RR_MN R236 10
P5.0V FB
1K 1%
CPU1_VCCSENSE
0 R194 2 CPUVR_GNDS_MN R235 10
VCCP5_PWRGD GNDS CPU1_VSSSENSE
CPUVR_THRM_MN
8 R234
nostuff
THRM C205 C203
R199 10
1nF 1nF nostuff
10K
Co
1% 50V 50V
B B
G_CPU G_CPU
27
PGDIN
1
PWR CPUVR_PWR_MN
CPUVR_ILIM_MN 30
ILIM C202
0.047nF
CPUVR_TIME_MN 50V
29 32 CPUVR_CCV_MN

PAD
TIME CCV
1.5V
R228 R227
56.2K 17.4K 1203-005832

33
1% 1%
RSENSE = RTIME : 17.4K / RLIM : 56.2K
G_CPU
I LIMIT : 4.729A G_CPU G_CPU
SLEW RATE : 12.14mV / uS
SHORT500
INSTPAR
A A
G_CPU
SAMSUNG
ELECTRONICS
4 3 2 1

8-40
 8-41
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
Load Switch Control(P5.0V)
D D
LDO Power (P2.5V)
P5.0V_ALW P5.0V P5.0V_AUD
Q515
D1 D2 D3 D4

INSTPAR
1 2 5 6

AO6409L SHORT502
-20V P3.3V_AUX P2.5V
g
4
S

C658 INSTPAR U12

3
G

R657 100nF RT9179GB

10V
SHORT501 1 5
100K IN OUT
1% 10K R145 3
un al
INSTPAR KBC3_PWRON 1% EN
R656 2
GND ADJ
4 R142
SHORT503 150K
1203-005591 1%
10K C657 C113
1% 10K R146
2200nF VCCP5_PWRGD 1% C147 C114 10000nF-X5R
D 3 10V 100nF
4700nF 6.3V
nostuff 6.3V R143
R654 Q514 10V
20K
G RHU002N06 1%
KBC3_PWRON VOLTAGE
ms nti
1 40-A4
10K
1% S 2
C651 C115 R144
10nF 1nF 150K
50V
25V nostuff 1%
C C
8. Block Diagram and Schematic

Sa de
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

Load Switch Control(P5.0V_AUX)

nfi
SPRINGFIELD
P5.0V_ALW SPRINGFIELD
P5.0V_AUX
Load Switch Control(P3.3V) R202
R201
0
0
Co
P3.3V_AUX P3.3V Q15
B B

D1 D2 D3 D4
1 2 5 6
Q518 AO6409L
C185

D1 D2 D3 D4
1 2 5 6
AO6409L R205 100nF

4
-20V

S
10V
100K

4
1%

3
G
R203 VOLTAGE

3
G
R666 C669
100K 100nF
1% 10V
10K C184 CANTERBURY
1% 10000nF-X5R CANTERBURY
R665 6.3V
D 3 CANTERBURY
R208 CANTERBURY
10K C668 Q17
CANTERBURY
1% 2200nF KBC3_SUSPWR
G RHU002N06
VOLTAGE
40-A4 CANTERBURY
10V 10K 1
D 3 CANTERBURY
1% C187
S 2
R664 Q517 10nF
KBC3_PWRON
G RHU002N06 16V
1 40-CVOLTAGE
4
10K nostuff
1% S 2
C667
10nF
25V
A A
SAMSUNG
ELECTRONICS

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
POWER DISCHARGER
g
un al
P5.0V_STB P5.0V_AUX P3.3V_AUX
ms nti
R206 R200 R238
100K 1K 10
1% 1% 1%
nostuff nostuff nostuff
C C
8. Block Diagram and Schematic

D 3 D 3 D 3
Q16 Q14 Q21
R207 10K RHU002N06 RHU002N06 RHU002N06
Sa de
G G G
KBC3_SUSPWR VOLTAGE VOLTAGE VOLTAGE
1% 1 1 1
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

S 2 S 2 S 2
nostuff nostuff nostuff nostuff
nfi
P5.0V_STB P5.0V P3.3V P1.5V
Co
R204 R655 R663 R180
B 100K 1K 10 10 B
1% 1% 1% 1%
nostuff nostuff nostuff nostuff
D 3 D 3 D 3 D 3
Q13 Q513 Q516 Q11
R196 10K G RHU002N06 G RHU002N06 G RHU002N06 G RHU002N06
KBC3_PWRON VOLTAGE VOLTAGE VOLTAGE VOLTAGE
1% 1 1 1 1
S 2 S 2 S 2 S 2
nostuff nostuff nostuff nostuff nostuff
A A
SAMSUNG
ELECTRONICS
4 3 2 1

8-42
 8-43
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL MT3 MT7 MT9 MT4 MT2
PROPRIETARY INFORMATION THAT IS RMNT-25-80-1P RMNT-25-80-1P RMNT-25-80-1P RMNT-25-90-1P RMNT-54-80-1P
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
MT5 MT10 MT8 MT6 MT1
RMNT-25-80-1P RMNT-25-80-1P RMNT-25-60-1P RMNT-25-90-1P RMNT-54-80-1P
D D
g
un al
P3.3V_AUX
P3.3V VDC
ms nti
C C111 C518 C40 C11 C261 C262 C263 C
100nF 100nF 100nF 100nF 0.1nF 0.1nF 0.1nF U512
8. Block Diagram and Schematic

10V 10V 10V 10V 50V 50V 50V 10nF

25V
Sa de
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

P5.0V
P1.5V P1.05V P3.3V_AUX P1.05V P5.0V P3.3V P3.3V
C64
nfi
100nF
10V C576 1nF 50V C581 1nF 50V C650 C607 C59
100nF 100nF 100nF
10V 10V 10V
P3.3V_AUX P1.5V P3.3V P1.5V
C605 1nF 50V C606 1nF 50V
Co
B B
CAPs FOR EMI
BOTTOM SIDE EMI CLIP
PCB REVISION CONTROL ( ICT )
NO CONNECTION DATE(YY/MM/DD) REVISION STEP
EMI1 EMI2
1 N.C.
REV1 EMI EMI
1 2 1-2 CONTACT-PLATE-EMI CONTACT-PLATE-EMI
3 2-3 nostuff
2 3
4 3-1
A 5 1-2-3 A
6 N.C.
7 1-2 SAMSUNG
8 2-3 ELECTRONICS
9 3-1
10 1-2-3

N130
4 3 2 1
 N130
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
BAT3_DETECT#
KBC5_KSI(0) BAT3_SMDATA# BGATE P3.3V_AUX
KBC5_KSI(1) CRT3_DDCDATA P3.3V_AUX
KBC5_KSI(2) CRT5_DDCDATA P3.3V_AUX
KBC5_KSI(3) CRT3_DDCCLK P3.3V_AUX
KBC5_KSI(4) CRT5_DDCCLK G_AUD
KBC5_KSI(5) LID3_SWITCH# P3.3V_MCD
KBC5_KSI(6) HST3_SPI3_DI
g
KBC5_KSI(7) HST3_SPI3_DO
KBC5_KSO(0) CHP3_BIOSWP# G_CHG
KBC5_KSO(1) CHP3_RTCRST# P5.0V_ALW
KBC5_KSO(2) CPU1_PWRGDCPU
KBC5_KSO(3) SMB3_ALERT#
un al
KBC5_KSO(4) SMB3_DATA_S G_CPU
KBC5_KSO(5) VCCP5_PWRGD P5.0V_AUD
KBC5_KSO(6) KBC3_LED_ACIN#
KBC5_KSO(7) KBC3_USBPWRON#
KBC5_KSO(8) VRM3_CPU_PWRGD G_DDR
KBC5_KSO(9) KBC3_LED_POWER# P5.0V_AUX
KBC3_BKLTON MCH3_LCD_VDDEN P5.0V_AUX
KBC3_PRECHG KBC3_THERM_SMDATA P5.0V_AUX
KBC3_PWRSW# KBC3_LED_CHARGE# G_P3.3V P5.0V_AUX
ms nti
KBC3_SMCLK# KBC3_THERM_SMCLK P5.0V_STB
KBC3_SPI_DI LCD_VDD3.3V
KBC3_SPI_DO
KBC3_SUSPWR P3.3V
C KBC3_USBCHG P3.3V P1.5V_PCIE C
8. Block Diagram and Schematic

LPC3_LAD(0) P3.3V
LPC3_LAD(1) P3.3V
LPC3_LAD(2)
LPC3_LAD(3) P5.0V P4.75V_AUD
LCD3_BKLTON P5.0V
CHP3_3GOFF# P5.0V
Sa de
CHP3_RFOFF# P5.0V
CHP3_SLPS3# P2.39V_VREF
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

CHP3_SLPS4# P1.05V
CHP3_SLPS5# P1.05V
KBC5_KSO(10) P1.05V
KBC5_KSO(11) P1.05V P3.3V_MICOM_SW
KBC5_KSO(12)
KBC5_KSO(13) PRTC_BAT
nfi
KBC5_KSO(14)
KBC5_KSO(15) P1.8V_AUX VCC_CRT
KBC3_CHG2000 P1.8V_AUX
KBC3_CHG4.2V P1.8V_AUX
KBC3_CPURST# P1.8V_AUX
KBC3_EXTSMI# VDC_ADPT
KBC3_PWRBTN# P2.0V_REF VDC_ADPT
KBC3_RSMRST# VDC_ADPT
KBC3_RUNSCI# VDC_ADPT
KBC3_SMDATA#
KBC3_SPI_CLK
KBC3_SPI_CS#
Co
KBC3_SPI_WP#
THM3_ALERT#
B B
P1.5V_PWRGD
KBC3_CAPSLED#
KBC3_SPKMUTE#
KBC3_WAKESCI#
MCH3_ICHSYNC#
HST3_SPI3_CLK
HST3_SPI3_CS#
SIM3_C1VCC
SIM3_C2RST
SIM3_C3CLK
SIM3_C6VPP
PEX3_WAKE#
SMB3_CLK_S
BAT3_SMCLK#
T_L_BUTTON#
T_R_BUTTON#
SIM3_C7DATA
A A
4 3 2 1

8-44