Operational Amplifiers

In this chapter, we introduce an important electronic building block known as

operational amplifier.
Currently, the term operational amplifier, abbreviated as OP-AMP, refers to
an integrated circuit that is employed in a wide variety of general-purpose
applications. However, this type of amplifier originated in analog computer
circuits, in which it was used to perform such operations as integration or addition
of signalshence, the name operational amplifier.
We will see that OP-AMPs are most useful when part of the output signal is
returned to the input through feedback network. Then the signal flows in a closed
loop from the input through the OP-AMP to the output and then through the
feedback network back to the input, and we say that the circuit is operating in
closed-loop conditions. When feedback is not present, we say that the OP-AMP is
operating under open-loop conditions.
Integrated circuit, IC, OP-AMPs can be combined with resistive feedback
networks to form many types of amplifiers. Furthermore, the characteristics of
these circuits can be made to depend on the circuit configuration and the
resistance values, but only weakly on the OP-AMPwhich can have large unit-to-
unit variations in some of its parameters.

THE IDEAL OP-AMP

The circuit symbol for the OP-AMP, is illustrated in Figure 3.1. Here the triangle
points to the direction of signal flow. This component has a part identification
number, PIN, placed within the triangular symbol. The PIN refers to a particular
OP-AMP with specific characteristics. The 741 OP-AMP illustrated here is a
general-purpose OP-AMP. The OP-AMP is a differential amplifier having both
inverting and noninverting input terminals. The time-varying input signals will be
denoted by lowercase letters as v1 , v 2 and so on. The OP-AMP is fabricated on a
tiny silicon chip, and packaged in a suitable case. The popular 8-pin dual-in-line
package, DIP, is shown in Figure 3.2.
 Noninverting
input
7 +V Part identification number (PIN)
3
+ 6
741 Output terminal
 +
v1 v0
4 V 
2
v2
Inverting
input
Figure 3.1 Circuit symbol for the general-purpose OP-AMP. Pin numbering is for an
8-pin mini-DIP package.

The average input voltages is called the common-mode signal, vicm , and is
given by
1
vicm  v1  v 2 
2
The difference between the input voltages the differential signal, vid , and is
given by
vid  v1  v2

An ideal OP-AMP has the following characteristics:

 Infinite input impedance, Zi /resistance, R in .
 Infinite open-loop gain, AOL , for the differential signal.
 Zero gain for the common-mode signal.
 Zero output impedance, Z 0 /resistance, R 0 .
 Infinite bandwidth.
 At perfect balance, v1  v2 , v0  0 .
 Characteristics do not drift with temperature.

An equivalent circuit for the ideal OP-AMP consists of a controlled source as

shown in Figure 3.3. The open-loop gain, AOL , is very largeideally infinite. For a
real OP-AMP to function properly, bias voltages, V, must be applied, as shown
in Figure 3.1. Often, however, we do not explicitly show the bias voltage
connections in the circuit diagrams.
 Offset null 1 8 N. C. + + +
vid = (v1 – v2)
Inverting
2 7 +V v1  v0
input +
741  A0Lvid
+
v2 
Noninverting
input
3 6 Output  

V 4 5 Offset null
Figure 3.3 Equivalent circuit for the
ideal OP-AMP. AOL is very large
Figure 3.2 Mini 8-pin DIP OP-AMP package.
(approaching infinity).

THE SUMMING-POINT CONSTRAINT AND VIRTUAL-SHORT-CIRCUIT

CONCEPT

Operational amplifiers are almost always used in negative feedback, in which

part of the OP-AMP output signal is returned to the input in opposition to the
source signal. For an ideal OP-AMP, we assume that the open-loop gain, AOL ,
approaches infinity, and then even a tiny differential input voltage results in a very
large output voltage. In a negative feedback circuit, the feedback network returns
a fraction of the output to the inverting input terminal, forcing the differential
input voltage toward zero. Assuming infinite gain, the differential input voltage is
driven to zero exactly. Because the differential input voltage of the OP-AMP is
zero, the input current is also zero. We refer to the fact that the differential input
voltage and the input current are forced to zero as the summing-point constraint
(Figure 3.4).
ii = 0

+
vid = 0 v0
 +
+

Summing point
constraint/virtual ground

Figure 3.4 Summing-point constraint

and virtual-short-circuit concept.

The condition at the OP-AMP input terminals of Figure 3.4 is called a virtual
short circuit or virtual ground. This terminology is used because, even though
the differential input voltage of the OP-AMP is forced to zero, the OP-AMP input
current is also zero. Rf

i1 i2
R1 0A

+
0V
 + +
vin v0 RL


Virtual ground

Figure 3.5 The inverting amplifier assuming an ideal OP-AMP.

THE INVERTING AMPLIFIER

An OP-AMP circuit known as the inverting amplifier is shown in Figure 2.5. We

will determine the closed-loop voltage gain Av  v0 vin by assuming an ideal OP-
AMP and employing the summing-point constraint/virtual ground concept. The
current through R1 is given by
v
i1  in (3.1)
R1
Since the current flowing into the OP-AMP input terminals is zero, the current
flowing through the feedback resistance Rf is
v
i2  i1  in (3.2)
R1
Writing a voltage equation around the output loop, we obtain
v 0  Rf i 2  0 (3.3)
Using Equation (3.2) to substitute for i2 in Equation (3.3), we have
v R
Av  0   f (3.4)
vin R1
Thus, under the ideal OP-AMP assumption, the closed-loop voltage gain is
determined solely by the ratio of the resistances. This is a very desirable situation,
because resistances can have precise and stable values. The voltage gain is
negative indicating that the amplifier is inverting (i.e., the output voltage is out of
phase with the input voltage).
The input impedance of the inverting amplifier is
 vin
Z in  R1 (3.5)
i1
Hence, we can control the input impedance of the circuit by our choice of R1 .
Rearranging Equation (3.4), we have
R 
v0   f vin (3.6)
 R1 
We see that the output voltage is independent of the load resistance RL . We
conclude that the output acts as an ideal voltage source (as far as RL is concerned).
In other words, the output impedance of the inverting amplifier is zero.

Example 3.1 Analysis of an Inverting Amplifier

For the inverting amplifier circuit shown in Figure 3.6, derive an expression for
the closed-loop voltage gain under the ideal OP-AMP assumption.
R2 R4

i2 R3 i2
i3

R1 i1 ii
+ 
vi +
vin +  + RL
 v0


Figure 3.6 An inverting amplifier that achieves high gain with a

smaller range of resistor values than required for the basic inverter.

R R R R 
v0  vin  2  4  4 2 
 R1 R1 R1 R3 
Thus, the closed-loop voltage gain of the circuit is
v R R RR 
Av  0   2  4  4 2 
vin  R1 R1 R1 R3 
The input resistance is obtained from Equation (3.7):
 i2 R2

10 k

R1 i1
ix i0

1 k
vin + + +
 5V v0 RL = 1 k

(a)

i2 1 k 1 k i4
1 k
i3
i1

1 k
vin + + +
 5 V v0


(b)

Figure 3.7 Circuits of Exercise 3.1.

EXERCISE 3.1
Solve for the currents and voltages labeled in the circuits of Figure 3.7.

Answer (a) i1 = 5 mA, i2 = 5 mA, i0 = 50 mA, ix = 55 mA, v0 = 50 V;

(b) i1 = 5 mA, i2 = 5 mA, i3 = 5 mA, i4 = 10 mA, v0 = 15 V.
 ii
+ + +
vi
vin   +  +
v0 RL vin + RL v0

+
v1 R1
Rf  


Figure 3.8 The noninverting amplifier. Figure 3.9 Voltage follower.

THE NONINVERTING AMPLIFIER

The closed-loop voltage gain:

v0 R
Av 
 1 f (3.19)
vin R1
Notice that the circuit is a noninverting amplifier ( Av is positive), and the gain is
set by the ratio of the feedback resistors.
The input impedance of the circuit is theoretically infinite because the input
current is zero. Since the voltage gain is independent of the load resistance, the
output voltage is independent of the load resistance. Thus the output impedance is
zero. Therefore, under the ideal OP-AMP assumption, the noninverting amplifier
is an ideal voltage amplifier.

The Voltage Follower

The minimum gain magnitude of the noninverting amplifier is unity and is

obtained when R f is zero (Equation (3.19)). Usually, we choose R1 to be open
circuit for unity gain. The resulting circuit is called a voltage follower and is
illustrated in Figure 3.9. It is used as a buffer.

EXERCISE 3.2
Find the voltage gain Av  v0 vin and input impedance of the circuit shown in
Figure 3.10 (a) with the switch open and (b) with the switch closed.

Answer (a) Av  1, Rin  ; (b) Av  1, Rin  R 2 .

 R

R

vin + + +
 v0 RL
R


Figure 3.10 Inverting or noninverting amplifier for Exercise 3.2.

EXERCISE 3.3

Find the expression for the output voltage in terms of the resistances and input
voltages for the differential amplifier shown in Figure 3.11.
R2
Answer v0  ( R2 R1 )(v2  v1 ).

R1

+ +
v1 +
 v0 RL
R1
+
 v2 R2 

Figure 3.11 Differential amplifier for Exercise 3.3.

EXERCISE 3.4

(a) Derive an expression for the voltage gain v0 vin of the circuit shown in Figure
3.12. (b) Evaluate your expression for R1 = 1 k and R2 = 10 k. (c) Find the
input resistance of this circuit. (d) Find the output resistance.

Answer (a) Av  1  3( R2 R1 )  ( R2 R1 ) 2 ; (b) Av  131; (c) Rin  ; (d) R0  0.

 +
vin +  +
 v0 RL

R2 R2
R1 R1
Figure 3.12 Circuit for
Exercise 3.4.

Slew-Rate Limitation

Another nonlinear effect in actual OP-AMPs is that the magnitude of the rate of
change of the output voltage is limited. This is called slew-rate limitation. Slew-
rate (SR) is defined as the maximum rate at which output voltage can change
without distortion in volts per microsecond (V/ s). If one tried to drive the output
at a rate of voltage change greater than the slew-rate, the output would not be able
to change fast enough and would not vary over the full range expected, resulting
in signal clipping or distortion.
The maximum frequency that an OP-AMP may operate depends on both the
bandwidth and slew-rate parameters of the OP-AMP. Let us consider a sinusoidal
output of the form
v0 (t )  V0 max sin(t )
Taking the derivative with respect to time, we obtain
dv 0 (t )
 V0 max cos(t )
dt
The maximum magnitude of the rate of change is V0 max  2fV0 max . For
undistorted output the slew-rate limit is
dv0 (t )
 SR or 2fV0 max  SR
dt max
Therefore, the maximum frequency that can be applied at the input of an OP-AMP
without distortion is given by
SR
f max  (3.28)
2V0 max
The f max is called the full-power bandwidth ( f FP ). An undistorted full-amplitude
sinusoidal output waveform is possible only for frequencies less than f FP .
 Example 3.5 Determination of Full-Power Bandwidth

Find the full-power bandwidth of the A741 OP-AMP, given that the slew rate is
SR = 0.5 V/s and the guaranteed maximum output amplitude is V0 max = 12 V.

SOLUTION We substitute the given data into Equation (3.28) to get

SR
f max  f FP   6.6 kHz
2V0 max
Thus, we can obtain an undistorted 12-V-peak sinusoidal output from the A741
OP-AMP only for frequencies less than 6.6 kHz.

EXERCISE 3.6

A certain OP-AMP has a maximum output voltage range from 4 to +4 V. The

output can source or sink a maximum current of 10 mA. The slew-rate limit is 5
V/s. This OP-AMP is used in the circuit of Figure 3.18. Assume a sinusoidal
input signal for all parts of this exercise.
(a) Find the full-power bandwidth of the OP-AMP.
(b) For a frequency of 1 kHz and RL = 1 k, what peak output voltage is possible
without distortion?
(c) For a frequency of 1 kHz and RL = 100 , what peak output voltage is
possible without distortion?
(d) For a frequency of 1 MHz and RL = 1 k, what peak output voltage is
possible without distortion?
(e) If RL = 1 k and vs (t )  5 sin(2 10 6 t ), sketch the steady-state output
waveform to scale against time.

Answer (a) fFP = 199 kHz; (b) 4 V; (c) 1 V; (d) 0.796 V; (e) The output waveform
is a triangular wave with a peak amplitude of 1.25 V.

vs(t) = Vim sin(t) +  +

RL v0
R2 = 100 k 
Figure 3.18
R1 = 100 k
Circuit of
Exercise 2.6.
PRACTICAL INVERTING AMPLIFIER

In order to analyze the practical inverting amplifier, we first need Miller’s

Theorem which is explained below.

Miller’s Theorem

Consider an arbitrary circuit configuration with N distinct nodes 1, 2, 3, ….., N, as

indicated in Figure 3.19. Let the node voltages be V1, V2, V3, ….., VN, where VN =
0 since N is the reference, or ground node. Nodes 1 and 2 are interconnected with
an impedance Z / . We postulate that we know the ratio V2 V1 . Designate the ratio
V2 V1 by K, which is the sinusoidal steady-state will be complex number. We shall
now show that the current I1 drawn from N1 through Z / can be obtained by
disconnecting terminal 1 from Z / and by bridging an impedance Z / (1  K ) from
N1 to ground, as indicated in Figure 3.19 (b).
The current I1 is given by
V V V (1  K ) V V
I1  1 / 2  1 /  / 1  1 (3.29)
Z Z Z (1  K ) Z1
Therefore, if Z1  Z / (1  K ) were shunted across terminals N1-N, the current I1
drawn from N1 would be the same as that from the original circuit. Hence the
same expression is obtained for I1 in terms of the node voltages for the two
configurations (Figures 3.19 (a) and (b)).
In a similar way, it may be established that the current I2 drawn from N2 may
be calculated by removing Z / and by connecting between N2 and ground an
impedance Z2, given by
Z/ Z /K
Z2   (3.30)
11 K K 1
Since identical nodal equations (KCL) are obtained from the configurations of
Figures 3.19 (a) and (b), these two networks are equivalent. It must be emphasized
that this theorem will be useful in making calculations only if it is possible to find
the value of K by some independent means.
 I1 Z/ I2

V1 V2 I1 V1 V2 I2
1 2 1 2
Z/ Z /K
Z1  Z2 
3 4 1 K K 1
3 4
N N

(a) (b)
Figure 3.19 Pertaining to Miller’s theorem. By definition, K  V2 V1 .
The networks in (a) and (b) have identical node voltages.

Closed-Loop Gain of Practical Inverting Amplifier

The equivalent circuit of practical inverting amplifier of Figure 3.20 (a) is shown
in Figure 3.20 (b). In this circuit, AOL is the open-loop voltage gain, Ri is the input
resistance, R0 is the output resistance of the OP-AMP. In Miller’s theorem, the
known parameter K is defined as K  V2 V1 . For the circuit in Figure 3.20 (b),
K  V0 Vi = AV. The equivalent circuit of Figure 3.20 (b) using Miller’s theorem
is shown in Figure 3.20 (c).
From the input circuit of Figure 3.20 (c), we can write
 Rf 
 1  A  // Ri
Vi
 
V 
(3.31)
Vin  f
R 
R1    // Ri
 1  AV 
 Rf Rf

R1 R1 R0

+ + +
Vi
 + + V0 RL
Vin + + RL
Vin + Vi
 AOLVi

V0  Ri
 

(a) (b)

Figure 3.20
(a) Practical inverting R1 R0
amplifier circuit.
(b) Equivalent circuit + Rf +
Vi Ri + RL
of (a). AOLVi V0
Vin + 1  AV  Rf AV
(c) Equivalent circuit   
AV  1
of (b) using Miller’s
theorem.
(c)

From the output circuit of Figure 3.20 (c), we obtain

V0 R f AV ( AV  1)
 (3.32)
AOLVi R0  R f AV ( AV  1)
AV R f AV ( AV  1)
  (since AV= V0/Vi)
AOL R0  R f AV ( AV  1)

 R0  R f AV ( AV  1)  R f AOL ( AV  1)

 AV ( R0  R f )  AOL R f  R0

AOL R f  R0 AOL  R0Y f

 AV   (here Yf = 1/Rf) (3.33)
( R0  R f ) 1  R0Y f
From Equation (3.31), we can write
 R f Ri (1  AV ) 
Vi

R f (1  AV )  Ri
Vin R  R f Ri (1  AV ) 
1 R f (1  AV )  Ri
R f Ri
 (3.34)
R1 R f  R f Ri  R1 Ri (1  AV )

Therefore, the closed-loop voltage gain is given by

V V V R f Ri AV
ACL  0  0  i 
Vin Vi Vin R1 R f  Ri R f  R1 Ri (1  AV )
Y1 AV
 (where Yi = 1/Ri, Y1 = 1/R1, Yf = 1/Rf)
Yi  Y1  Y f (1  AV )
Y1 AV Y1
  (3.35)
Yi  Y1  Y f  Y f AV 1
(Yi  Y1  Y f )  Y f
AV

Now if R0 = 0 or Yf = 0 (Rf = ) then from Equation (3.33), we get

AV  AOL = Open-loop gain
Y1 Rf
ACL    Av (3.36)
 Yf R1
Equation (3.36) is the same as obtained from a basic inverting amplifier assuming
ideal OP-AMP in Equation (3.4).