VISVESVARAYA NATIONAL INSTITUTE

OF TECHNOLOGY   NAGPUR

VLSI DESIGN
MTECH 2021-23
ANALOG IC DESIGN LAB

ASSIGNMENT 05
Submitted by

Rutvik Patel
MT21MVD022
1. Design a Simple PMOS Current Mirror (Fig 20.3) Which Provides an Output
Current of 20uA, 50uA, 100uA and 10uA.
o Plot the Output Current graphs.
o Do Temp Variations at -55C, 0C, 25C, 75C and 125C and Plot the Output Current
graphs.
o Do Supply Voltage Variations for ±10% change and Plot the Output Current graphs.
2. Repeat the 1 again for NMOS Current Mirror.
3. Explain Why reference Current values are varying from Ideal Values.
4. Design and Simulate Long Channel Beta-Multiplier Reference (Fig 20.15).
5. Explain why we need a Start-up Circuit in 4.

Q1 Code

PMOS current mirror

Temperature variations: -

.include cmosedu_models.txt
Vdd 1 0 DC 5
MP1 2 2 1 1 P_1u W=30u L=2u
MP2 4 2 1 1 P_1u W=75u L=2u
MP3 5 2 1 1 P_1u W=150u L=2u
MP4 6 2 1 1 P_1u W=15u L=2u
Vx1 2 3 DC 0
Vx2 4 7 DC 0
Vx3 5 7 DC 0
Vx4 6 7 DC 0
R1 3 0 200K
V0 7 0 DC 0
.dc V0 0 5 0.1
.control
destroy all
set temp=-55
run
set temp=0
run
set temp=25
run
set temp=75
run
set temp=125
run
plot dc1.i(Vx1) dc2.i(Vx1) dc3.i(Vx1) dc4.i(Vx1) dc5.i(Vx1)
plot dc1.i(Vx2) dc2.i(Vx2) dc3.i(Vx2) dc4.i(Vx2) dc5.i(Vx2)
plot dc1.i(Vx3) dc2.i(Vx3) dc3.i(Vx3) dc4.i(Vx3) dc5.i(Vx3)
plot dc1.i(Vx4) dc2.i(Vx4) dc3.i(Vx4) dc4.i(Vx4) dc5.i(Vx4)
.endc
.end

Current in M4 for different temperatures: -

Current in M2 for different temperatures: -

Supply Variations: -
.include cmosedu_models.txt
Vdd 1 0 DC 5
MP1 2 2 1 1 P_1u W=30u L=2u
MP2 4 2 1 1 P_1u W=75u L=2u
MP3 5 2 1 1 P_1u W=150u L=2u
MP4 6 2 1 1 P_1u W=15u L=2u
Vx1 2 3 DC 0
Vx2 4 7 DC 0
Vx3 5 7 DC 0
Vx4 6 7 DC 0
R1 3 0 200K
V0 7 0 DC 0
.dc Vdd 4.5 5.5 0.01
.control
destroy all
run
plot i(Vx1) i(Vx2) i(Vx3) i(Vx4)
.endc
.end
2. NMOS Current Mirror: -
.include cmosedu_models.txt
Vdd 1 0 DC 5
R1 1 2 200K
Vx1 2 3 DC 0
MN1 3 3 0 0 N_1u W=17u L=2u
MN2 4 3 5 0 N_1u W=42.5u L=2u
MN3 4 3 6 0 N_1u W=85u L=2u
MN4 4 3 7 0 N_1u W=8.5u L=2u
Vx2 5 0 DC 0
Vx3 6 0 DC 0
Vx4 7 0 DC 0
V0 4 0 DC 0
.dc V0 0 5 0.1
.control
destroy all
run
plot i(Vx1) i(Vx2) i(Vx3) i(Vx4)
.endc
.end
Temperature Variations: -
.include cmosedu_models.txt
Vdd 1 0 DC 5
R1 1 2 200K
Vx1 2 3 DC 0
MN1 3 3 0 0 N_1u W=17u L=2u
MN2 4 3 5 0 N_1u W=38.5u L=2u
MN3 4 3 6 0 N_1u W=75u L=2u
MN4 4 3 7 0 N_1u W=9.5u L=2u
Vx2 5 0 DC 0
Vx3 6 0 DC 0
Vx4 7 0 DC 0
V0 4 0 DC 0
.dc V0 0 5 0.1
.control
destroy all
set temp=-55
run
set temp=0
run
set temp=25
run
set temp=75
run
set temp=125
run
plot dc1.i(Vx1) dc2.i(Vx1) dc3.i(Vx1) dc4.i(Vx1) dc5.i(Vx1)
plot dc1.i(Vx2) dc2.i(Vx2) dc3.i(Vx2) dc4.i(Vx2) dc5.i(Vx2)
plot dc1.i(Vx3) dc2.i(Vx3) dc3.i(Vx3) dc4.i(Vx3) dc5.i(Vx3)
plot dc1.i(Vx4) dc2.i(Vx4) dc3.i(Vx4) dc4.i(Vx4) dc5.i(Vx4)
.endc
.end

Current in M4 for different temperatures: -

Current in M2 for different temperatures: -

Supply variations: -
.include cmosedu_models.txt
Vdd 1 0 DC 5
R1 1 2 200K
Vx1 2 3 DC 0
MN1 3 3 0 0 N_1u W=17u L=2u
MN2 4 3 5 0 N_1u W=38.5u L=2u
MN3 4 3 6 0 N_1u W=75u L=2u
MN4 4 3 7 0 N_1u W=9.5u L=2u
Vx2 5 0 DC 0
Vx3 6 0 DC 0
Vx4 7 0 DC 0
V0 4 0 DC 5
.dc Vdd 4.5 5.5 0.01
.control
destroy all
run
plot i(Vx1) i(Vx2) i(Vx3) i(Vx4)
.endc
.end
OUTPUT:

3. Why reference current values are varying from ideal values?

Iref value depends in 2 values one is resistor value and voltage drop across the resistor. As
VDD is varying the voltage drop across the MOSFET i.e., VDS will be same which means
the voltage drop across the resistor changes which leads to change in reference current. And
as temperature is changing and we know that resistor depends on temperature which makes
the resistor value to vary that’s why reference current changes.
4. Beta Multiplier:

Code: -
.include cmosedu_models.txt
Vdd 1 0 DC 5
MSU1 2 3 0 0 N_1u W=10u L=2u
MSU2 2 2 1 1 P_1u W=10u L=100u
MSU3 4 2 3 0 N_1u W=10u L=1u
M1 3 3 0 0 N_1u W=10u L=2u
M2 4 3 5 0 N_1u W=40u L=2u
M3 3 4 1 1 P_1u W=30u L=2u
M4 4 4 1 1 P_1u W=30u L=2u
R1 5 6 6.5K
Vx 6 0 DC 0
.dc Vdd 4.5 5.5 0.01
.control
destroy all
run
plot i(Vx)
.endc
.end
Output

Q5

Start-up Circuit

Beta multiplier is a self-bias circuit and any self-bias circuit has two operating points, the one
which is desired and the unwanted one where zero current flows in the circuit. Thus Start-up
circuit is needed to somehow push the beta multiplier to desired operating point and once it is
in desired state there should be no interference from the start-up circuit.

Working
The unwanted state occurs when M1, M2 gate is grounded and M3, M4 gates are at VDD.
MSU1 is also grounded and its NMOS so it’s off. The gate of M2 is at Vdd- Vthp. MSU3 is
NMOS, and it will switch on leaks current into gates of M1/M2 from the gates of M3/M4.
This causes the current to snap back to the desired output current.
Conclusion: -
 We studied and simulated PMOS current mirror and NMOS current
mirror. PMOS used had thrice the width of NMOS for the same reference
current. The output current varies with temperature; however, this
variation is tolerable, Output current also varies with supply voltage
variation. IREF itself varies from 17 to 21 μA wherein its ideal value
should be 20μA when supply voltage is varied from +-10%. It’s fairly a
large variation and it will also affect the output current in the same way.
 We simulated β-multiplier reference circuit along with the start-up
circuit. We studied effect of supply variation and temperature variation.